Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 3/4] drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()
Date: Fri, 31 May 2024 14:41:00 +0300	[thread overview]
Message-ID: <20240531114101.19994-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20240531114101.19994-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow the caller of intel_dsb_prepare() to determine which DSB
engine (out of the three possible per pipe) to use. This will
let us utilize multiple DSB engines during the same commit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 2 +-
 drivers/gpu/drm/i915/display/intel_dsb.c   | 6 ++++--
 drivers/gpu/drm/i915/display/intel_dsb.h   | 1 +
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 9173caba3f0f..98553e8a5149 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1914,7 +1914,7 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
 	if (!crtc_state->pre_csc_lut && !crtc_state->post_csc_lut)
 		return;
 
-	crtc_state->dsb = intel_dsb_prepare(crtc_state, 1024);
+	crtc_state->dsb = intel_dsb_prepare(crtc_state, INTEL_DSB_0, 1024);
 	if (!crtc_state->dsb)
 		return;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index f3bfa5b1672c..014d695c13c9 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -436,6 +436,7 @@ void intel_dsb_wait(struct intel_dsb *dsb)
 /**
  * intel_dsb_prepare() - Allocate, pin and map the DSB command buffer.
  * @crtc_state: the CRTC state
+ * @dsb_id: the DSB engine to use
  * @max_cmds: number of commands we need to fit into command buffer
  *
  * This function prepare the command buffer which is used to store dsb
@@ -445,6 +446,7 @@ void intel_dsb_wait(struct intel_dsb *dsb)
  * DSB context, NULL on failure
  */
 struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state,
+				    enum intel_dsb_id dsb_id,
 				    unsigned int max_cmds)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -474,7 +476,7 @@ struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state,
 
 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
 
-	dsb->id = INTEL_DSB_0;
+	dsb->id = dsb_id;
 	dsb->crtc = crtc;
 	dsb->size = size / 4; /* in dwords */
 	dsb->free_pos = 0;
@@ -489,7 +491,7 @@ struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state,
 out:
 	drm_info_once(&i915->drm,
 		      "[CRTC:%d:%s] DSB %d queue setup failed, will fallback to MMIO for display HW programming\n",
-		      crtc->base.base.id, crtc->base.name, INTEL_DSB_0);
+		      crtc->base.base.id, crtc->base.name, dsb_id);
 
 	return NULL;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
index 5d7561ea65fa..36fdb130af6e 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.h
+++ b/drivers/gpu/drm/i915/display/intel_dsb.h
@@ -23,6 +23,7 @@ enum intel_dsb_id {
 };
 
 struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state,
+				    enum intel_dsb_id dsb_id,
 				    unsigned int max_cmds);
 void intel_dsb_finish(struct intel_dsb *dsb);
 void intel_dsb_cleanup(struct intel_dsb *dsb);
-- 
2.44.1


  parent reply	other threads:[~2024-05-31 11:41 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-31 11:40 [PATCH 0/4] drm/i915/dsb: A bit of polish Ville Syrjala
2024-05-31 11:40 ` [PATCH 1/4] drm/i915/dsb: Polish the DSB ID enum Ville Syrjala
2024-06-06 18:57   ` Manna, Animesh
2024-05-31 11:40 ` [PATCH 2/4] drm/i915/dsb: Move DSB ID definition to the header Ville Syrjala
2024-06-06 18:56   ` Manna, Animesh
2024-05-31 11:41 ` Ville Syrjala [this message]
2024-06-06 18:56   ` [PATCH 3/4] drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare() Manna, Animesh
2024-05-31 11:41 ` [PATCH 4/4] drm/i915/dsb: Use intel_color_uses_dsb() Ville Syrjala
2024-06-06 18:56   ` Manna, Animesh
2024-05-31 12:13 ` [PATCH 0/4] drm/i915/dsb: A bit of polish Rodrigo Vivi
2024-05-31 12:33 ` ✗ Fi.CI.SPARSE: warning for " Patchwork
2024-05-31 12:50 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-01 14:46 ` ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240531114101.19994-4-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox