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* [PATCH v6 00/26] Panel Replay eDP support
@ 2024-06-05 10:25 Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time Jouni Högander
                   ` (29 more replies)
  0 siblings, 30 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

This patch set is implementing eDP1.5 Panel Replay for Intel hw. Patch
to disable Region Early Transport by default is reverted as it is
needed by eDP Panel Replay.

Patches 1 - 14 are fixes and clean-ups for DP2.0 Panel Replay found while testing with eDP1.5 panel. Patches 15 - 26 are implementing Panel Replay eDP.

v6:
  - fix and rework sink enable
  - rework checking vblank length for LunarLake and Panel Replay
  - reorder patches
v5:
  - use psr->su_region_et_enabled instead of psr2_su_region_et_valid
  - do not check Vblank >= PSR2_CTL Block Count Number for Panel Replay
v4:
  - add some patch from "Panel Replay fixes" set here
  - check 128b/132b encoding and HDCP enable
  - use intel_alpm_aux_wake_supported instead of local variable
v3:
  - commit message modifications
  - s/intel_psr_psr_mode/intel_psr_print_mode/
  - remove extra space from "PSR mode:  disabled"
  - do not allow eDP Panel Replay when using 128b/132b encoding
  - do not allow eDP Panel Replay when HDCP is enabled
v2:
  - printout "Selective Update enabled (Early Transport)" instead of
    "Selective Update Early Transport enabled"
  - ensure that fastset is performed when the disable bit changes

Jouni Högander (26):
  drm/i915/alpm: Do not use fast_wake_lines for aux less wake time
  drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL
  drm/i915/display: Take panel replay into account in vsc sdp unpacking
  drm/i915/display: Skip Panel Replay on pipe comparison if no active
    planes
  drm/display: Add missing Panel Replay Enable SU Region ET bit
  drm/i915/psr: Split enabling sink for PSR and Panel Replay
  drm/i915/alpm: Make alpm support checks non-static
  drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local
    variable
  drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid
  drm/i915/psr: Print Panel Replay status instead of frame lock status
  drm/i915/psr: Move vblank length check to separate function
  drm/i915/psr: Take into account SU SDP scanline indication in vblank
    check
  drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake
  dmr/i915/psr: Wake time is aux less wake time for Panel Replay
  drm/i915/psr: Check panel ALPM capability for eDP Panel Replay
  drm/i915/psr: Inform Panel Replay source support on eDP as well
  drm/i915/psr: enable sink for eDP1.5 Panel Replay
  drm/i915/psr: Check panel Early Transport capability for eDP PR
  drm/i915/psr: Perfrom psr2 checks related to ALPM for Panel Replay
  drm/i915/psr: Add Panel Replay compute_config helper
  drm/i915/psr: 128b/132b Panel Replay is not supported on eDP
  drm/i915/psr: HW will not allow PR on eDP when HDCP enabled
  drm/i915/psr: Check Early Transport for Panel Replay as well
  drm/i915/psr: Modify dg2_activate_panel_replay to support eDP
  drm/i915/psr: Add new debug bit to disable Panel Replay
  Revert "drm/i915/psr: Disable early transport by default"

 drivers/gpu/drm/i915/display/intel_alpm.c     |  11 +-
 drivers/gpu/drm/i915/display/intel_alpm.h     |   2 +
 drivers/gpu/drm/i915/display/intel_display.c  |   4 +-
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_dp.c       |   5 +-
 drivers/gpu/drm/i915/display/intel_psr.c      | 309 ++++++++++++------
 include/drm/display/drm_dp.h                  |   1 +
 7 files changed, 223 insertions(+), 111 deletions(-)

-- 
2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06  8:47   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL Jouni Högander
                   ` (28 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

We want to have own variables for fast wake lines and aux less wake
time. It might be needed to choose if we can enable Panel Replay Selective
Update or PSR2.

Also currently aux less wake time is overwritten by calculated fast wake
time.

v2:use less wake time in intel_alpm_lobf_compute_config

Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c          | 4 ++--
 drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index a26716c14aa3..52a573367976 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -159,7 +159,7 @@ static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
 	if (i915->display.params.psr_safest_params)
 		aux_less_wake_lines = ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;
 
-	intel_dp->alpm_parameters.fast_wake_lines = aux_less_wake_lines;
+	intel_dp->alpm_parameters.aux_less_wake_lines = aux_less_wake_lines;
 	intel_dp->alpm_parameters.silence_period_sym_clocks = silence_period;
 	intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms = lfps_half_cycle;
 
@@ -298,7 +298,7 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 	if (intel_alpm_aux_less_wake_supported(intel_dp))
 		waketime_in_lines = intel_dp->alpm_parameters.io_wake_lines;
 	else
-		waketime_in_lines = intel_dp->alpm_parameters.fast_wake_lines;
+		waketime_in_lines = intel_dp->alpm_parameters.aux_less_wake_lines;
 
 	crtc_state->has_lobf = (context_latency + guardband) >
 		(first_sdp_position + waketime_in_lines);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 77609656317b..df29ec37ef28 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1847,6 +1847,7 @@ struct intel_dp {
 
 		/* LNL and beyond */
 		u8 check_entry_lines;
+		u8 aux_less_wake_lines;
 		u8 silence_period_sym_clocks;
 		u8 lfps_half_cycle_num_of_syms;
 	} alpm_parameters;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06  9:41   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 03/26] drm/i915/display: Take panel replay into account in vsc sdp unpacking Jouni Högander
                   ` (27 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Currently AUX Less Wake lines are not written into ALPM_CTL. Fix this.

Fixes: 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel replay")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 52a573367976..18c1c5803670 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -323,7 +323,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 	    (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp))) {
 		alpm_ctl = ALPM_CTL_ALPM_ENABLE |
 			ALPM_CTL_ALPM_AUX_LESS_ENABLE |
-			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
+			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
+			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);
 
 		intel_de_write(dev_priv,
 			       PORT_ALPM_CTL(dev_priv, cpu_transcoder),
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 03/26] drm/i915/display: Take panel replay into account in vsc sdp unpacking
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06  9:59   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes Jouni Högander
                   ` (26 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Currently intel_dp_vsc_sdp_unpack is not taking into account Panel Replay
vsc sdp. Fix this by adding vsc sdp revision 0x6 and length 0x10 into
intel_dp_vsc_sdp_unpack

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index fd054e16850d..286119eb77f8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4438,7 +4438,8 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
 	vsc->length = sdp->sdp_header.HB3;
 
 	if ((sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) ||
-	    (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe)) {
+	    (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe) ||
+	    (sdp->sdp_header.HB2 == 0x6 && sdp->sdp_header.HB3 == 0x10)) {
 		/*
 		 * - HB2 = 0x2, HB3 = 0x8
 		 *   VSC SDP supporting 3D stereo + PSR
@@ -4446,6 +4447,8 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
 		 *   VSC SDP supporting 3D stereo + PSR2 with Y-coordinate of
 		 *   first scan line of the SU region (applies to eDP v1.4b
 		 *   and higher).
+		 * - HB2 = 0x6, HB3 = 0x10
+		 *   VSC SDP supporting 3D stereo + Panel Replay.
 		 */
 		return 0;
 	} else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 == 0x13) {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (2 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 03/26] drm/i915/display: Take panel replay into account in vsc sdp unpacking Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 13:02   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU Region ET bit Jouni Högander
                   ` (25 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Panel Replay is not enabled if there are no active planes. Do not compare
it on pipe comparison. Otherwise we get pipe mismatch.

Fixes: ac9ef327327b ("drm/i915/psr: Panel replay has to be enabled before link training")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7370acdd6b8b..2747dd01bb0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5331,7 +5331,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	 * Panel replay has to be enabled before link training. PSR doesn't have
 	 * this requirement -> check these only if using panel replay
 	 */
-	if (current_config->has_panel_replay || pipe_config->has_panel_replay) {
+	if (current_config->active_planes &&
+	    (current_config->has_panel_replay ||
+	     pipe_config->has_panel_replay)) {
 		PIPE_CONF_CHECK_BOOL(has_psr);
 		PIPE_CONF_CHECK_BOOL(has_sel_update);
 		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU Region ET bit
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (3 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 13:04   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay Jouni Högander
                   ` (24 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Add missing Panel Replay Enable SU Region ET bit defined in DP2.1
specification.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 include/drm/display/drm_dp.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index f246fa03a3cb..173548c6473a 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -743,6 +743,7 @@
 # define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
 # define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
 # define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
+# define DP_PANEL_REPLAY_ENABLE_SU_REGION_ET            (1 << 7) /* DP 2.1 */
 
 #define PANEL_REPLAY_CONFIG2                                     0x1b1 /* eDP 1.5 */
 # define DP_PANEL_REPLAY_SINK_REFRESH_RATE_UNLOCK_GRANTED	 (1 << 0)
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (4 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU Region ET bit Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-07 11:59   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static Jouni Högander
                   ` (23 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Current intel_psr_enable_sink is a mess due to partly reusing PSR bit
definitions for Panel Replay. Even thought PSR and Panel Replay enable
registers do have common bits they still have also different bits and same
bits with different meaning. For sake of clarity split enabling sink to PSR
and Panel Replay specific parts.

Also fix issue caused by using psr->panel_replay_enabled to early.

Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 81 +++++++++++++-----------
 1 file changed, 44 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4a4124a92a0d..3cc38ba2f954 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -686,56 +686,62 @@ static bool psr2_su_region_et_valid(struct intel_dp *intel_dp)
 	return false;
 }
 
-static unsigned int intel_psr_get_enable_sink_offset(struct intel_dp *intel_dp)
+static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
+				     const struct intel_crtc_state *crtc_state)
 {
-	return intel_dp->psr.panel_replay_enabled ?
-		PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG;
+	u8 val = DP_PANEL_REPLAY_ENABLE |
+		DP_PANEL_REPLAY_VSC_SDP_CRC_EN |
+		DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
+		DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN |
+		DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN;
+
+	if (crtc_state->has_sel_update)
+		val |= DP_PANEL_REPLAY_SU_ENABLE;
+
+	if (crtc_state->enable_psr2_su_region_et)
+		val |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET;
+
+	drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG, val);
 }
 
-/*
- * Note: Most of the bits are same in PANEL_REPLAY_CONFIG and DP_PSR_EN_CFG. We
- * are relying on PSR definitions on these "common" bits.
- */
-void intel_psr_enable_sink(struct intel_dp *intel_dp,
-			   const struct intel_crtc_state *crtc_state)
+static void _psr_enable_sink(struct intel_dp *intel_dp,
+			    const struct intel_crtc_state *crtc_state)
 {
-	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	u8 dpcd_val = DP_PSR_ENABLE;
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	u8 val = DP_PSR_ENABLE;
 
 	if (crtc_state->has_sel_update) {
-		/* Enable ALPM at sink for psr2 */
-		if (!crtc_state->has_panel_replay) {
-			drm_dp_dpcd_writeb(&intel_dp->aux,
-					   DP_RECEIVER_ALPM_CONFIG,
-					   DP_ALPM_ENABLE |
-					   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
-
-			if (crtc_state->enable_psr2_su_region_et)
-				dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;
-		}
-
-		dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
+		val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
 	} else {
 		if (intel_dp->psr.link_standby)
-			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+			val |= DP_PSR_MAIN_LINK_ACTIVE;
 
-		if (!crtc_state->has_panel_replay && DISPLAY_VER(dev_priv) >= 8)
-			dpcd_val |= DP_PSR_CRC_VERIFICATION;
+		if (DISPLAY_VER(i915) >= 8)
+			val |= DP_PSR_CRC_VERIFICATION;
 	}
 
-	if (crtc_state->has_panel_replay)
-		dpcd_val |= DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
-			DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN;
-
-	if (crtc_state->req_psr2_sdp_prior_scanline)
-		dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE;
+	if (crtc_state->enable_psr2_su_region_et)
+		val |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET;
 
 	if (intel_dp->psr.entry_setup_frames > 0)
-		dpcd_val |= DP_PSR_FRAME_CAPTURE;
+		val |= DP_PSR_FRAME_CAPTURE;
 
-	drm_dp_dpcd_writeb(&intel_dp->aux,
-			   intel_psr_get_enable_sink_offset(intel_dp),
-			   dpcd_val);
+	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
+}
+
+void intel_psr_enable_sink(struct intel_dp *intel_dp,
+			   const struct intel_crtc_state *crtc_state)
+{
+	/* Enable ALPM at sink for psr2 */
+	if (!crtc_state->has_panel_replay && crtc_state->has_sel_update)
+		drm_dp_dpcd_writeb(&intel_dp->aux,
+				   DP_RECEIVER_ALPM_CONFIG,
+				   DP_ALPM_ENABLE |
+				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
+
+	crtc_state->has_panel_replay ?
+		_panel_replay_enable_sink(intel_dp, crtc_state) :
+		_psr_enable_sink(intel_dp, crtc_state);
 
 	if (intel_dp_is_edp(intel_dp))
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
@@ -1920,7 +1926,8 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 
 	/* Disable PSR on Sink */
 	drm_dp_dpcd_writeb(&intel_dp->aux,
-			   intel_psr_get_enable_sink_offset(intel_dp), 0);
+			   intel_dp->psr.panel_replay_enabled ?
+			   PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG, 0);
 
 	if (!intel_dp->psr.panel_replay_enabled &&
 	    intel_dp->psr.sel_update_enabled)
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (5 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 14:44   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 08/26] drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local variable Jouni Högander
                   ` (22 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

We want to use intel_alpm_aux_wake_supported and
intel_alpm_aux_less_wake_supported in intel_psr.c. Convert them as
non-static.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++--
 drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 18c1c5803670..90072f6e3a33 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -11,12 +11,12 @@
 #include "intel_dp_aux.h"
 #include "intel_psr_regs.h"
 
-static bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
+bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
 {
 	return intel_dp->alpm_dpcd & DP_ALPM_CAP;
 }
 
-static bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
+bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
 {
 	return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index c82ecc7b4001..d4fb60393c91 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -22,4 +22,6 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 void intel_alpm_configure(struct intel_dp *intel_dp,
 			  const struct intel_crtc_state *crtc_state);
 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
+bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
+bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
 #endif
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 08/26] drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local variable
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (6 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid Jouni Högander
                   ` (21 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

We have now intel_alpm_aux_wake_supported. Use that instead of local
variable.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 3cc38ba2f954..a3ad4488fcee 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -446,16 +446,6 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
 	}
 }
 
-static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp)
-{
-	u8 alpm_caps = 0;
-
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP,
-			      &alpm_caps) != 1)
-		return false;
-	return alpm_caps & DP_ALPM_CAP;
-}
-
 static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
@@ -600,7 +590,6 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp)
 	    intel_dp->psr_dpcd[0] >= DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {
 		bool y_req = intel_dp->psr_dpcd[1] &
 			     DP_PSR2_SU_Y_COORDINATE_REQUIRED;
-		bool alpm = intel_dp_get_alpm_status(intel_dp);
 
 		/*
 		 * All panels that supports PSR version 03h (PSR2 +
@@ -613,7 +602,8 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp)
 		 * Y-coordinate requirement panels we would need to enable
 		 * GTC first.
 		 */
-		intel_dp->psr.sink_psr2_support = y_req && alpm;
+		intel_dp->psr.sink_psr2_support = y_req &&
+			intel_alpm_aux_wake_supported(intel_dp);
 		drm_dbg_kms(&i915->drm, "PSR2 %ssupported\n",
 			    intel_dp->psr.sink_psr2_support ? "" : "not ");
 	}
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (7 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 08/26] drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local variable Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 15:01   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status Jouni Högander
                   ` (20 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Early Transport is possible and in our HW mandatory on eDP Panel
Replay. Add parameter to intel_psr2_config_et_valid to differentiate
validity check for Panel Replay.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a3ad4488fcee..7bdae0d0ea45 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -664,16 +664,17 @@ static void hsw_psr_setup_aux(struct intel_dp *intel_dp)
 		       aux_ctl);
 }
 
-static bool psr2_su_region_et_valid(struct intel_dp *intel_dp)
+static bool psr2_su_region_et_valid(struct intel_dp *intel_dp, bool panel_replay)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
-	if (DISPLAY_VER(i915) >= 20 &&
-	    intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
-	    !(intel_dp->psr.debug & I915_PSR_DEBUG_SU_REGION_ET_DISABLE))
-		return true;
+	if (DISPLAY_VER(i915) < 20 || !intel_dp_is_edp(intel_dp) ||
+	    intel_dp->psr.debug & I915_PSR_DEBUG_SU_REGION_ET_DISABLE)
+		return false;
 
-	return false;
+	return panel_replay ?
+		intel_dp->pr_dpcd & DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
+		intel_dp->psr_dpcd[0] != DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
 }
 
 static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
@@ -1351,7 +1352,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 
 	tgl_dc3co_exitline_compute_config(intel_dp, crtc_state);
 
-	if (psr2_su_region_et_valid(intel_dp))
+	if (psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay))
 		crtc_state->enable_psr2_su_region_et = true;
 
 	return true;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (8 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 14:35   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function Jouni Högander
                   ` (19 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Currently Panel Replay status printout is printing frame lock status. It
should print Panel Replay status instead. Panel Replay status register
field follows PSR status register field. Use existing PSR code for that.

Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for panel replay")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++-----------------
 1 file changed, 5 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 7bdae0d0ea45..3530e5f44096 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3579,16 +3579,9 @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)
 		"reserved",
 		"sink internal error",
 	};
-	static const char * const panel_replay_status[] = {
-		"Sink device frame is locked to the Source device",
-		"Sink device is coasting, using the VTotal target",
-		"Sink device is governing the frame rate (frame rate unlock is granted)",
-		"Sink device in the process of re-locking with the Source device",
-	};
 	const char *str;
 	int ret;
 	u8 status, error_status;
-	u32 idx;
 
 	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
 		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
@@ -3602,16 +3595,11 @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)
 	if (ret)
 		return ret;
 
-	str = "unknown";
-	if (intel_dp->psr.panel_replay_enabled) {
-		idx = (status & DP_SINK_FRAME_LOCKED_MASK) >> DP_SINK_FRAME_LOCKED_SHIFT;
-		if (idx < ARRAY_SIZE(panel_replay_status))
-			str = panel_replay_status[idx];
-	} else if (intel_dp->psr.enabled) {
-		idx = status & DP_PSR_SINK_STATE_MASK;
-		if (idx < ARRAY_SIZE(sink_status))
-			str = sink_status[idx];
-	}
+	status &= DP_PSR_SINK_STATE_MASK;
+	if (status < ARRAY_SIZE(sink_status))
+		str = sink_status[status];
+	else
+		str = "unknown";
 
 	seq_printf(m, "Sink %s status: 0x%x [%s]\n", psr_mode_str(intel_dp), status, str);
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (9 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 14:58   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline indication in vblank check Jouni Högander
                   ` (18 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

We are about to add more complexity to vblank length check. It makes sense
to move it to separate function for sake of clarity.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 3530e5f44096..23c3fed1f983 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1243,6 +1243,20 @@ static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
 	return entry_setup_frames;
 }
 
+static bool vblank_length_valid(struct intel_dp *intel_dp,
+				const struct intel_crtc_state *crtc_state)
+{
+	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
+		crtc_state->hw.adjusted_mode.crtc_vblank_start;
+	int wake_lines = psr2_block_count_lines(intel_dp);
+
+	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
+	if (vblank < wake_lines)
+		return false;
+
+	return true;
+}
+
 static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 				    struct intel_crtc_state *crtc_state)
 {
@@ -1333,9 +1347,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	}
 
 	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
-	if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
-	    crtc_state->hw.adjusted_mode.crtc_vblank_start <
-	    psr2_block_count_lines(intel_dp)) {
+	if (!vblank_length_valid(intel_dp, crtc_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "PSR2 not enabled, too short vblank time\n");
 		return false;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline indication in vblank check
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (10 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 15:02   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake Jouni Högander
                   ` (17 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

SU SDP scanline indication should be taken into account when checking
vblank length. In Bspec we have:

PSR2_CTL[ SU SDP scanline indication ] = 0: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start) > PSR2_CTL Block Count Number value in lines
PSR2_CTL[ SU SDP scanline indication ] = 1: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start- 1) > PSR2_CTL Block Count Number value in lines

Bspec: 49274

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 23c3fed1f983..471b60032304 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1250,6 +1250,9 @@ static bool vblank_length_valid(struct intel_dp *intel_dp,
 		crtc_state->hw.adjusted_mode.crtc_vblank_start;
 	int wake_lines = psr2_block_count_lines(intel_dp);
 
+	if (crtc_state->req_psr2_sdp_prior_scanline)
+		vblank -= 1;
+
 	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
 	if (vblank < wake_lines)
 		return false;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (11 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline indication in vblank check Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 14:55   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay Jouni Högander
                   ` (16 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

As Lunarlake doesn't have block count configuration vblank should be
checked against IO buffer wake time.

Bspec: 68920

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 471b60032304..c9fcb25184ee 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1246,9 +1246,13 @@ static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
 static bool vblank_length_valid(struct intel_dp *intel_dp,
 				const struct intel_crtc_state *crtc_state)
 {
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
 		crtc_state->hw.adjusted_mode.crtc_vblank_start;
-	int wake_lines = psr2_block_count_lines(intel_dp);
+	int wake_lines;
+
+	wake_lines = DISPLAY_VER(i915) < 20 ? psr2_block_count_lines(intel_dp) :
+		intel_dp->alpm_parameters.io_wake_lines;
 
 	if (crtc_state->req_psr2_sdp_prior_scanline)
 		vblank -= 1;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (12 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-06 13:26   ` Manna, Animesh
  2024-06-05 10:25 ` [PATCH v6 15/26] drm/i915/psr: Check panel ALPM capability for eDP " Jouni Högander
                   ` (15 subsequent siblings)
  29 siblings, 1 reply; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

When checking vblank length used wake time is aux less wake time for eDP
Panel Replay (vblank length is not checked for DP2.0 Panel Replay).

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index c9fcb25184ee..ccb7c022e364 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1251,8 +1251,12 @@ static bool vblank_length_valid(struct intel_dp *intel_dp,
 		crtc_state->hw.adjusted_mode.crtc_vblank_start;
 	int wake_lines;
 
-	wake_lines = DISPLAY_VER(i915) < 20 ? psr2_block_count_lines(intel_dp) :
-		intel_dp->alpm_parameters.io_wake_lines;
+	if (crtc_state->has_panel_replay)
+		wake_lines = intel_dp->alpm_parameters.aux_less_wake_lines;
+	else
+		wake_lines = DISPLAY_VER(i915) < 20 ?
+			psr2_block_count_lines(intel_dp) :
+			intel_dp->alpm_parameters.io_wake_lines;
 
 	if (crtc_state->req_psr2_sdp_prior_scanline)
 		vblank -= 1;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 15/26] drm/i915/psr: Check panel ALPM capability for eDP Panel Replay
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (13 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 16/26] drm/i915/psr: Inform Panel Replay source support on eDP as well Jouni Högander
                   ` (14 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check
panel support for this and prevent eDP panel replay if it doesn't exits.

Bspec: 68920

v2: use intel_alpm_aux_less_wake_supported

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ccb7c022e364..839171635b97 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -551,6 +551,13 @@ static void _panel_replay_init_dpcd(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
+	if (intel_dp_is_edp(intel_dp) &&
+	    (!intel_alpm_aux_less_wake_supported(intel_dp))) {
+		drm_dbg_kms(&i915->drm,
+			    "Panel doesn't support AUX-less ALPM, eDP Panel Replay not possible\n");
+		return;
+	}
+
 	intel_dp->psr.sink_panel_replay_support = true;
 
 	if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_SU_SUPPORT)
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 16/26] drm/i915/psr: Inform Panel Replay source support on eDP as well
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (14 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 15/26] drm/i915/psr: Check panel ALPM capability for eDP " Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 17/26] drm/i915/psr: enable sink for eDP1.5 Panel Replay Jouni Högander
                   ` (13 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Display version >= 20 support eDP 1.5. Inform Panel Replay source support
on eDP for display version >= 20.

Bspec: 68920

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 839171635b97..f13eb01966f5 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3078,9 +3078,11 @@ void intel_psr_init(struct intel_dp *intel_dp)
 		return;
 	}
 
-	if (HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp))
+	if ((HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp)) ||
+	    DISPLAY_VER(dev_priv) >= 20)
 		intel_dp->psr.source_panel_replay_support = true;
-	else
+
+	if (HAS_PSR(dev_priv) && intel_dp_is_edp(intel_dp))
 		intel_dp->psr.source_support = true;
 
 	/* Disable early transport for now */
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 17/26] drm/i915/psr: enable sink for eDP1.5 Panel Replay
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (15 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 16/26] drm/i915/psr: Inform Panel Replay source support on eDP as well Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 18/26] drm/i915/psr: Check panel Early Transport capability for eDP PR Jouni Högander
                   ` (12 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

eDP1.5 allows Panel Replay on eDP as well. Take this into account when
enabling sink PSR/Panel Replay. Write also PANEL_REPLAY_CONFIG2 register
accordingly.

v3:
  - set DP_PANEL_REPLAY_CRC_VERIFICATION in PANEL_REPLAY_CONFIG2
  - PANEL_REPLAY_CONFIG2 is available in DP2.1 as well
v2: do not configure ALPM for DP2.0 Panel Replay

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 36 ++++++++++++++++++++----
 1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f13eb01966f5..171ea2a03ed6 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -692,6 +692,7 @@ static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
 		DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
 		DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN |
 		DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN;
+	u8 panel_replay_config2 = DP_PANEL_REPLAY_CRC_VERIFICATION;
 
 	if (crtc_state->has_sel_update)
 		val |= DP_PANEL_REPLAY_SU_ENABLE;
@@ -699,7 +700,14 @@ static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
 	if (crtc_state->enable_psr2_su_region_et)
 		val |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET;
 
+	if (crtc_state->req_psr2_sdp_prior_scanline)
+		panel_replay_config2 |=
+			DP_PANEL_REPLAY_SU_REGION_SCANLINE_CAPTURE;
+
 	drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG, val);
+
+	drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG2,
+			   panel_replay_config2);
 }
 
 static void _psr_enable_sink(struct intel_dp *intel_dp,
@@ -727,15 +735,31 @@ static void _psr_enable_sink(struct intel_dp *intel_dp,
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
 }
 
+static void intel_psr_enable_sink_alpm(struct intel_dp *intel_dp,
+				       const struct intel_crtc_state *crtc_state)
+{
+	u8 val;
+
+	/*
+	 * eDP Panel Replay uses always ALPM
+	 * PSR2 uses ALPM but PSR1 doesn't
+	 */
+	if (!intel_dp_is_edp(intel_dp) || (!crtc_state->has_panel_replay &&
+					   !crtc_state->has_sel_update))
+		return;
+
+	val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE;
+
+	if (crtc_state->has_panel_replay)
+		val |= DP_ALPM_MODE_AUX_LESS;
+
+	drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val);
+}
+
 void intel_psr_enable_sink(struct intel_dp *intel_dp,
 			   const struct intel_crtc_state *crtc_state)
 {
-	/* Enable ALPM at sink for psr2 */
-	if (!crtc_state->has_panel_replay && crtc_state->has_sel_update)
-		drm_dp_dpcd_writeb(&intel_dp->aux,
-				   DP_RECEIVER_ALPM_CONFIG,
-				   DP_ALPM_ENABLE |
-				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
+	intel_psr_enable_sink_alpm(intel_dp, crtc_state);
 
 	crtc_state->has_panel_replay ?
 		_panel_replay_enable_sink(intel_dp, crtc_state) :
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 18/26] drm/i915/psr: Check panel Early Transport capability for eDP PR
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (16 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 17/26] drm/i915/psr: enable sink for eDP1.5 Panel Replay Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 19/26] drm/i915/psr: Perfrom psr2 checks related to ALPM for Panel Replay Jouni Högander
                   ` (11 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Our HW doesn't support panel replay without Early Transport on eDP.

Bspec: 68920

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 171ea2a03ed6..bc8c822094e7 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -551,11 +551,18 @@ static void _panel_replay_init_dpcd(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
-	if (intel_dp_is_edp(intel_dp) &&
-	    (!intel_alpm_aux_less_wake_supported(intel_dp))) {
-		drm_dbg_kms(&i915->drm,
-			    "Panel doesn't support AUX-less ALPM, eDP Panel Replay not possible\n");
-		return;
+	if (intel_dp_is_edp(intel_dp)) {
+		if (!intel_alpm_aux_less_wake_supported(intel_dp)) {
+			drm_dbg_kms(&i915->drm,
+				    "Panel doesn't support AUX-less ALPM, eDP Panel Replay not possible\n");
+			return;
+		}
+
+		if (!(intel_dp->pr_dpcd & DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT)) {
+			drm_dbg_kms(&i915->drm,
+				    "Panel doesn't support early transport, eDP Panel Replay not possible\n");
+			return;
+		}
 	}
 
 	intel_dp->psr.sink_panel_replay_support = true;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 19/26] drm/i915/psr: Perfrom psr2 checks related to ALPM for Panel Replay
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (17 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 18/26] drm/i915/psr: Check panel Early Transport capability for eDP PR Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 20/26] drm/i915/psr: Add Panel Replay compute_config helper Jouni Högander
                   ` (10 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

eDP1.5 support ALPM with Panel Replay as well. We need to check ALPM
related things for Panel Replay as well.

Bspec: 68920

v3: move vblank check as well
v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count
    check

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 40 +++++++++++++-----------
 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bc8c822094e7..f8a8f98eb44e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1383,25 +1383,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR2 not enabled, PSR2 SDP indication do not fit in hblank\n");
-		return false;
-	}
-
-	if (!intel_alpm_compute_params(intel_dp, crtc_state)) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR2 not enabled, Unable to use long enough wake times\n");
-		return false;
-	}
-
-	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
-	if (!vblank_length_valid(intel_dp, crtc_state)) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR2 not enabled, too short vblank time\n");
-		return false;
-	}
-
 	if (!crtc_state->enable_psr2_sel_fetch &&
 	    (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) {
 		drm_dbg_kms(&dev_priv->drm,
@@ -1440,6 +1421,27 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
 	if (!crtc_state->has_panel_replay && !intel_psr2_config_valid(intel_dp, crtc_state))
 		goto unsupported;
 
+	if (intel_dp_is_edp(intel_dp)) {
+		if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp,
+								 crtc_state)) {
+			drm_dbg_kms(&dev_priv->drm,
+				    "Selective update not enabled, SDP indication do not fit in hblank\n");
+			goto unsupported;
+		}
+
+		if (!intel_alpm_compute_params(intel_dp, crtc_state)) {
+			drm_dbg_kms(&dev_priv->drm,
+				    "Selective update not enabled, Unable to use long enough wake times\n");
+			goto unsupported;
+		}
+
+		if (!vblank_length_valid(intel_dp, crtc_state)) {
+			drm_dbg_kms(&dev_priv->drm,
+				    "Selective update not enabled, too short vblank time\n");
+			goto unsupported;
+		}
+	}
+
 	if (crtc_state->has_panel_replay && (DISPLAY_VER(dev_priv) < 14 ||
 					     !intel_dp->psr.sink_panel_replay_su_support))
 		goto unsupported;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 20/26] drm/i915/psr: Add Panel Replay compute_config helper
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (18 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 19/26] drm/i915/psr: Perfrom psr2 checks related to ALPM for Panel Replay Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 21/26] drm/i915/psr: 128b/132b Panel Replay is not supported on eDP Jouni Högander
                   ` (9 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

We are about to add more checks for Panel Replay. Due to that it makes
sense to add now Panel Replay compute config helper.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f8a8f98eb44e..8c881a7cad3f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1495,6 +1495,14 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
 	return true;
 }
 
+static bool _panel_replay_compute_config(struct intel_dp *intel_dp)
+{
+	if (!CAN_PANEL_REPLAY(intel_dp))
+		return false;
+
+	return true;
+}
+
 void intel_psr_compute_config(struct intel_dp *intel_dp,
 			      struct intel_crtc_state *crtc_state,
 			      struct drm_connector_state *conn_state)
@@ -1530,8 +1538,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 	}
 
-	if (CAN_PANEL_REPLAY(intel_dp))
-		crtc_state->has_panel_replay = true;
+	crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp);
 
 	crtc_state->has_psr = crtc_state->has_panel_replay ? true :
 		_psr_compute_config(intel_dp, crtc_state);
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 21/26] drm/i915/psr: 128b/132b Panel Replay is not supported on eDP
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (19 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 20/26] drm/i915/psr: Add Panel Replay compute_config helper Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 22/26] drm/i915/psr: HW will not allow PR on eDP when HDCP enabled Jouni Högander
                   ` (8 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Take into account that 128b/132b Panel Replay is not supported on eDP.

Bspec: 68920

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8c881a7cad3f..01bc5b76d398 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1495,11 +1495,22 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
 	return true;
 }
 
-static bool _panel_replay_compute_config(struct intel_dp *intel_dp)
+static bool
+_panel_replay_compute_config(struct intel_dp *intel_dp,
+			     const struct intel_crtc_state *crtc_state)
 {
 	if (!CAN_PANEL_REPLAY(intel_dp))
 		return false;
 
+	if (!intel_dp_is_edp(intel_dp))
+		return true;
+
+	/* Remaining checks are for eDP only */
+
+	/* 128b/132b Panel Replay is not supported on eDP */
+	if (intel_dp_is_uhbr(crtc_state))
+		return false;
+
 	return true;
 }
 
@@ -1538,7 +1549,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 	}
 
-	crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp);
+	crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp,
+								    crtc_state);
 
 	crtc_state->has_psr = crtc_state->has_panel_replay ? true :
 		_psr_compute_config(intel_dp, crtc_state);
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 22/26] drm/i915/psr: HW will not allow PR on eDP when HDCP enabled
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (20 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 21/26] drm/i915/psr: 128b/132b Panel Replay is not supported on eDP Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 23/26] drm/i915/psr: Check Early Transport for Panel Replay as well Jouni Högander
                   ` (7 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Take into account in Panel Replay compute config that  HW will not allow PR
on eDP when HDCP enabled.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 01bc5b76d398..3aec56d005ef 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1497,8 +1497,13 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
 
 static bool
 _panel_replay_compute_config(struct intel_dp *intel_dp,
-			     const struct intel_crtc_state *crtc_state)
+			     const struct intel_crtc_state *crtc_state,
+			     const struct drm_connector_state *conn_state)
 {
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
+	struct intel_hdcp *hdcp = &connector->hdcp;
+
 	if (!CAN_PANEL_REPLAY(intel_dp))
 		return false;
 
@@ -1511,6 +1516,14 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 	if (intel_dp_is_uhbr(crtc_state))
 		return false;
 
+	/* HW will not allow Panel Replay on eDP when HDCP enabled */
+	if (conn_state->content_protection ==
+	    DRM_MODE_CONTENT_PROTECTION_DESIRED ||
+	    (conn_state->content_protection ==
+	     DRM_MODE_CONTENT_PROTECTION_ENABLED && hdcp->value ==
+	     DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+		return false;
+
 	return true;
 }
 
@@ -1550,7 +1563,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	}
 
 	crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp,
-								    crtc_state);
+								    crtc_state,
+								    conn_state);
 
 	crtc_state->has_psr = crtc_state->has_panel_replay ? true :
 		_psr_compute_config(intel_dp, crtc_state);
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 23/26] drm/i915/psr: Check Early Transport for Panel Replay as well
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (21 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 22/26] drm/i915/psr: HW will not allow PR on eDP when HDCP enabled Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 24/26] drm/i915/psr: Modify dg2_activate_panel_replay to support eDP Jouni Högander
                   ` (6 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Move Early Transport validity check to be performed for Panel Replay as
well and use Early Transport for eDP Panel Replay always.

v2:set crtc_state->enable_psr2_su_region_et directly (not in if block)

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 3aec56d005ef..97d1e4ef6ca5 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1394,9 +1394,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 
 	tgl_dc3co_exitline_compute_config(intel_dp, crtc_state);
 
-	if (psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay))
-		crtc_state->enable_psr2_su_region_et = true;
-
 	return true;
 }
 
@@ -1458,6 +1455,9 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
 		goto unsupported;
 	}
 
+	crtc_state->enable_psr2_su_region_et =
+		psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay);
+
 	return true;
 
 unsupported:
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 24/26] drm/i915/psr: Modify dg2_activate_panel_replay to support eDP
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (22 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 23/26] drm/i915/psr: Check Early Transport for Panel Replay as well Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 25/26] drm/i915/psr: Add new debug bit to disable Panel Replay Jouni Högander
                   ` (5 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

There are couple of bits in PSR2_CTL which needs to be written in case of
eDP Panel Replay

Bspec: 68920

v2: use boolean instead of assuming eDP Panel Replay mean Early Transport

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 97d1e4ef6ca5..a10d9383cc87 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -927,6 +927,19 @@ static u8 frames_before_su_entry(struct intel_dp *intel_dp)
 static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	struct intel_psr *psr = &intel_dp->psr;
+	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+
+	if (intel_dp_is_edp(intel_dp) && psr->sel_update_enabled) {
+		u32 val = psr->su_region_et_enabled ?
+			LNL_EDP_PSR2_SU_REGION_ET_ENABLE : 0;
+
+		if (intel_dp->psr.req_psr2_sdp_prior_scanline)
+			val |= EDP_PSR2_SU_SDP_SCANLINE;
+
+		intel_de_write(dev_priv, EDP_PSR2_CTL(dev_priv, cpu_transcoder),
+			       val);
+	}
 
 	intel_de_rmw(dev_priv,
 		     PSR2_MAN_TRK_CTL(dev_priv, intel_dp->psr.transcoder),
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 25/26] drm/i915/psr: Add new debug bit to disable Panel Replay
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (23 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 24/26] drm/i915/psr: Modify dg2_activate_panel_replay to support eDP Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 10:25 ` [PATCH v6 26/26] Revert "drm/i915/psr: Disable early transport by default" Jouni Högander
                   ` (4 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

Currently there is no way to disable Panel Replay without disabling
PSR. Add new debug bit to be used with i915_edp_psr_debug debugfs
interface.

v2: ensure that fastset is performed when the bit changes

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c           | 11 +++++++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index df29ec37ef28..089c53d5f3c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1690,6 +1690,7 @@ struct intel_psr {
 #define I915_PSR_DEBUG_ENABLE_SEL_FETCH		0x4
 #define I915_PSR_DEBUG_IRQ			0x10
 #define I915_PSR_DEBUG_SU_REGION_ET_DISABLE	0x20
+#define I915_PSR_DEBUG_PANEL_REPLAY_DISABLE	0x40
 
 	u32 debug;
 	bool sink_support;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a10d9383cc87..b4cd7a8b17bc 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1520,6 +1520,9 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 	if (!CAN_PANEL_REPLAY(intel_dp))
 		return false;
 
+	if (intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE)
+		return false;
+
 	if (!intel_dp_is_edp(intel_dp))
 		return true;
 
@@ -2845,11 +2848,13 @@ int intel_psr_debug_set(struct intel_dp *intel_dp, u64 val)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	const u32 mode = val & I915_PSR_DEBUG_MODE_MASK;
-	const u32 disable_bits = val & I915_PSR_DEBUG_SU_REGION_ET_DISABLE;
+	const u32 disable_bits = val & (I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+					I915_PSR_DEBUG_PANEL_REPLAY_DISABLE);
 	u32 old_mode, old_disable_bits;
 	int ret;
 
 	if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+		    I915_PSR_DEBUG_PANEL_REPLAY_DISABLE |
 		    I915_PSR_DEBUG_MODE_MASK) ||
 	    mode > I915_PSR_DEBUG_ENABLE_SEL_FETCH) {
 		drm_dbg_kms(&dev_priv->drm, "Invalid debug mask %llx\n", val);
@@ -2862,7 +2867,9 @@ int intel_psr_debug_set(struct intel_dp *intel_dp, u64 val)
 
 	old_mode = intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK;
 	old_disable_bits = intel_dp->psr.debug &
-		I915_PSR_DEBUG_SU_REGION_ET_DISABLE;
+		(I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+		 I915_PSR_DEBUG_PANEL_REPLAY_DISABLE);
+
 	intel_dp->psr.debug = val;
 
 	/*
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* [PATCH v6 26/26] Revert "drm/i915/psr: Disable early transport by default"
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (24 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 25/26] drm/i915/psr: Add new debug bit to disable Panel Replay Jouni Högander
@ 2024-06-05 10:25 ` Jouni Högander
  2024-06-05 13:42 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP support (rev7) Patchwork
                   ` (3 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Jouni Högander @ 2024-06-05 10:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: animesh.manna, mika.kahola, Jouni Högander

This reverts commit f3c2031db7dfdf470a2d9bf3bd1efa6edfa72d8d.

We want to notice possible issues faced with PSR2 Region Early Transport as
early as possible -> let's revert patch disabling Region Early Transport by
default. Also eDP 1.5 Panel Replay requires Early Transport.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b4cd7a8b17bc..36dedd8e9a9c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3171,9 +3171,6 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	if (HAS_PSR(dev_priv) && intel_dp_is_edp(intel_dp))
 		intel_dp->psr.source_support = true;
 
-	/* Disable early transport for now */
-	intel_dp->psr.debug |= I915_PSR_DEBUG_SU_REGION_ET_DISABLE;
-
 	/* Set link_standby x link_off defaults */
 	if (DISPLAY_VER(dev_priv) < 12)
 		/* For new platforms up to TGL let's respect VBT back again */
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 57+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP support (rev7)
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (25 preceding siblings ...)
  2024-06-05 10:25 ` [PATCH v6 26/26] Revert "drm/i915/psr: Disable early transport by default" Jouni Högander
@ 2024-06-05 13:42 ` Patchwork
  2024-06-05 13:42 ` ✗ Fi.CI.SPARSE: " Patchwork
                   ` (2 subsequent siblings)
  29 siblings, 0 replies; 57+ messages in thread
From: Patchwork @ 2024-06-05 13:42 UTC (permalink / raw)
  To: Jouni Högander; +Cc: intel-gfx

== Series Details ==

Series: Panel Replay eDP support (rev7)
URL   : https://patchwork.freedesktop.org/series/133684/
State : warning

== Summary ==

Error: dim checkpatch failed
58d77df5a406 drm/i915/alpm: Do not use fast_wake_lines for aux less wake time
c88c51ffc880 drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL
8a6da99681bf drm/i915/display: Take panel replay into account in vsc sdp unpacking
d30d994293ae drm/i915/display: Skip Panel Replay on pipe comparison if no active planes
dbeae5c71686 drm/display: Add missing Panel Replay Enable SU Region ET bit
08d039c5fae8 drm/i915/psr: Split enabling sink for PSR and Panel Replay
-:30: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#30: FILE: drivers/gpu/drm/i915/display/intel_psr.c:690:
+static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
+				     const struct intel_crtc_state *crtc_state)

-:56: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#56: FILE: drivers/gpu/drm/i915/display/intel_psr.c:708:
+static void _psr_enable_sink(struct intel_dp *intel_dp,
+			    const struct intel_crtc_state *crtc_state)

total: 0 errors, 0 warnings, 2 checks, 107 lines checked
aa55db234d5a drm/i915/alpm: Make alpm support checks non-static
6508138be2bb drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local variable
781f9c969607 drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid
3a3ff5d7aacd drm/i915/psr: Print Panel Replay status instead of frame lock status
93a47fc8f4c6 drm/i915/psr: Move vblank length check to separate function
cdbb50bbd2c4 drm/i915/psr: Take into account SU SDP scanline indication in vblank check
-:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#13: 
PSR2_CTL[ SU SDP scanline indication ] = 0: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start) > PSR2_CTL Block Count Number value in lines

total: 0 errors, 1 warnings, 0 checks, 9 lines checked
0528a2f1ae66 drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake
6c7064b1eae4 dmr/i915/psr: Wake time is aux less wake time for Panel Replay
eb51bbcf2f64 drm/i915/psr: Check panel ALPM capability for eDP Panel Replay
9fc7c1222152 drm/i915/psr: Inform Panel Replay source support on eDP as well
0b76eb0066f2 drm/i915/psr: enable sink for eDP1.5 Panel Replay
1171daebc2e8 drm/i915/psr: Check panel Early Transport capability for eDP PR
d3edd4407ff8 drm/i915/psr: Perfrom psr2 checks related to ALPM for Panel Replay
e452c662970e drm/i915/psr: Add Panel Replay compute_config helper
6e181aaea9f3 drm/i915/psr: 128b/132b Panel Replay is not supported on eDP
6b139f7228ad drm/i915/psr: HW will not allow PR on eDP when HDCP enabled
a316167dae81 drm/i915/psr: Check Early Transport for Panel Replay as well
22ac33c073dc drm/i915/psr: Modify dg2_activate_panel_replay to support eDP
0514724f5b34 drm/i915/psr: Add new debug bit to disable Panel Replay
f89f919cb3aa Revert "drm/i915/psr: Disable early transport by default"



^ permalink raw reply	[flat|nested] 57+ messages in thread

* ✗ Fi.CI.SPARSE: warning for Panel Replay eDP support (rev7)
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (26 preceding siblings ...)
  2024-06-05 13:42 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP support (rev7) Patchwork
@ 2024-06-05 13:42 ` Patchwork
  2024-06-05 13:50 ` ✓ Fi.CI.BAT: success " Patchwork
  2024-06-05 17:32 ` ✗ Fi.CI.IGT: failure " Patchwork
  29 siblings, 0 replies; 57+ messages in thread
From: Patchwork @ 2024-06-05 13:42 UTC (permalink / raw)
  To: Jouni Högander; +Cc: intel-gfx

== Series Details ==

Series: Panel Replay eDP support (rev7)
URL   : https://patchwork.freedesktop.org/series/133684/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.



^ permalink raw reply	[flat|nested] 57+ messages in thread

* ✓ Fi.CI.BAT: success for Panel Replay eDP support (rev7)
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (27 preceding siblings ...)
  2024-06-05 13:42 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2024-06-05 13:50 ` Patchwork
  2024-06-05 17:32 ` ✗ Fi.CI.IGT: failure " Patchwork
  29 siblings, 0 replies; 57+ messages in thread
From: Patchwork @ 2024-06-05 13:50 UTC (permalink / raw)
  To: Jouni Högander; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 2824 bytes --]

== Series Details ==

Series: Panel Replay eDP support (rev7)
URL   : https://patchwork.freedesktop.org/series/133684/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14881 -> Patchwork_133684v7
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/index.html

Participating hosts (38 -> 35)
------------------------------

  Additional (1): fi-kbl-8809g 
  Missing    (4): bat-kbl-2 bat-dg2-11 fi-snb-2520m bat-arls-3 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_133684v7:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@load:
    - {bat-mtlp-9}:       [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/bat-mtlp-9/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/bat-mtlp-9/igt@i915_module_load@load.html

  
Known issues
------------

  Here are the changes found in Patchwork_133684v7 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/fi-kbl-8809g/igt@gem_lmem_swapping@basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][5] +30 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/fi-kbl-8809g/igt@kms_force_connector_basic@force-load-detect.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613


Build changes
-------------

  * Linux: CI_DRM_14881 -> Patchwork_133684v7

  CI-20190529: 20190529
  CI_DRM_14881: a494545483635d3d93d19e8f483f61e7d4198383 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7878: eecd5683bd98cee3fc6bd3f26a1f053c897f6bdf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_133684v7: a494545483635d3d93d19e8f483f61e7d4198383 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/index.html

[-- Attachment #2: Type: text/html, Size: 3524 bytes --]

^ permalink raw reply	[flat|nested] 57+ messages in thread

* ✗ Fi.CI.IGT: failure for Panel Replay eDP support (rev7)
  2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
                   ` (28 preceding siblings ...)
  2024-06-05 13:50 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2024-06-05 17:32 ` Patchwork
  29 siblings, 0 replies; 57+ messages in thread
From: Patchwork @ 2024-06-05 17:32 UTC (permalink / raw)
  To: Jouni Högander; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 68164 bytes --]

== Series Details ==

Series: Panel Replay eDP support (rev7)
URL   : https://patchwork.freedesktop.org/series/133684/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14881_full -> Patchwork_133684v7_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_133684v7_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_133684v7_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_133684v7_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a3:
    - shard-dg1:          NOTRUN -> [FAIL][1] +6 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a3.html

  * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [FAIL][2] +10 other tests fail
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-d-hdmi-a-1.html

  
Known issues
------------

  Here are the changes found in Patchwork_133684v7_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@drm_fdinfo@all-busy-idle-check-all:
    - shard-mtlp:         NOTRUN -> [SKIP][3] ([i915#8414])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@drm_fdinfo@all-busy-idle-check-all.html

  * igt@drm_fdinfo@busy-idle@bcs0:
    - shard-dg2:          NOTRUN -> [SKIP][4] ([i915#8414]) +6 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@drm_fdinfo@busy-idle@bcs0.html

  * igt@drm_fdinfo@isolation@vecs0:
    - shard-dg1:          NOTRUN -> [SKIP][5] ([i915#8414]) +9 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@drm_fdinfo@isolation@vecs0.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-dg1:          NOTRUN -> [SKIP][6] ([i915#9323])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-dg1:          NOTRUN -> [SKIP][7] ([i915#3555] / [i915#9323]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-rkl:          [PASS][8] -> [FAIL][9] ([i915#6268])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-rkl-5/igt@gem_ctx_exec@basic-nohangcheck.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-3/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - shard-dg1:          NOTRUN -> [FAIL][10] ([i915#10086]) +4 other tests fail
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@gem_ctx_persistence@heartbeat-many:
    - shard-dg1:          NOTRUN -> [SKIP][11] ([i915#8555])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gem_ctx_persistence@heartbeat-many.html

  * igt@gem_ctx_persistence@heartbeat-stop:
    - shard-mtlp:         NOTRUN -> [SKIP][12] ([i915#8555]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gem_ctx_persistence@heartbeat-stop.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-dg1:          NOTRUN -> [SKIP][13] ([i915#280])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          NOTRUN -> [ABORT][14] ([i915#10030] / [i915#7975] / [i915#8213])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_eio@hibernate.html

  * igt@gem_eio@kms:
    - shard-tglu:         [PASS][15] -> [INCOMPLETE][16] ([i915#10513])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-3/igt@gem_eio@kms.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-7/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@bonded-false-hang:
    - shard-dg1:          NOTRUN -> [SKIP][17] ([i915#4812]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_exec_balancer@bonded-false-hang.html

  * igt@gem_exec_balancer@noheartbeat:
    - shard-dg2:          NOTRUN -> [SKIP][18] ([i915#8555])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_exec_balancer@noheartbeat.html

  * igt@gem_exec_capture@capture@vecs0-lmem0:
    - shard-dg2:          NOTRUN -> [FAIL][19] ([i915#10386]) +3 other tests fail
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_exec_capture@capture@vecs0-lmem0.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          NOTRUN -> [FAIL][20] ([i915#2846])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk9/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][21] ([i915#2842]) +1 other test fail
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk4/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@gem_exec_fair@basic-pace-share:
    - shard-dg2:          NOTRUN -> [SKIP][22] ([i915#3539] / [i915#4852]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_exec_fair@basic-pace-share.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-rkl:          [PASS][23] -> [FAIL][24] ([i915#2842])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-3/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fence@submit3:
    - shard-dg2:          NOTRUN -> [SKIP][25] ([i915#4812])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_exec_fence@submit3.html

  * igt@gem_exec_flush@basic-batch-kernel-default-wb:
    - shard-dg1:          NOTRUN -> [SKIP][26] ([i915#3539] / [i915#4852]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gem_exec_flush@basic-batch-kernel-default-wb.html

  * igt@gem_exec_reloc@basic-gtt-read:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#3281]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_exec_reloc@basic-gtt-read.html

  * igt@gem_exec_reloc@basic-range:
    - shard-mtlp:         NOTRUN -> [SKIP][28] ([i915#3281]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gem_exec_reloc@basic-range.html

  * igt@gem_exec_reloc@basic-wc-cpu-noreloc:
    - shard-dg1:          NOTRUN -> [SKIP][29] ([i915#3281]) +11 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_exec_reloc@basic-wc-cpu-noreloc.html

  * igt@gem_exec_suspend@basic-s3-devices@lmem0:
    - shard-dg1:          NOTRUN -> [FAIL][30] ([i915#11269]) +2 other tests fail
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_exec_suspend@basic-s3-devices@lmem0.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-dg2:          NOTRUN -> [SKIP][31] ([i915#4860])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_fence_thrash@bo-copy.html
    - shard-dg1:          NOTRUN -> [SKIP][32] ([i915#4860]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_lmem_swapping@heavy-random@lmem0:
    - shard-dg1:          NOTRUN -> [FAIL][33] ([i915#10378])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@gem_lmem_swapping@heavy-random@lmem0.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][34] ([i915#4565]) +1 other test skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html
    - shard-dg2:          NOTRUN -> [FAIL][35] ([i915#10378])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          NOTRUN -> [TIMEOUT][36] ([i915#5493])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_lmem_swapping@verify-ccs:
    - shard-glk:          NOTRUN -> [SKIP][37] ([i915#4613]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk4/igt@gem_lmem_swapping@verify-ccs.html

  * igt@gem_mmap@pf-nonblock:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([i915#4083]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_mmap@pf-nonblock.html

  * igt@gem_mmap_gtt@basic-small-bo:
    - shard-dg2:          NOTRUN -> [SKIP][39] ([i915#4077]) +3 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_mmap_gtt@basic-small-bo.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-mtlp:         NOTRUN -> [SKIP][40] ([i915#4077]) +2 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_mmap_gtt@medium-copy-odd:
    - shard-dg1:          NOTRUN -> [SKIP][41] ([i915#4077]) +7 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_mmap_gtt@medium-copy-odd.html

  * igt@gem_mmap_wc@invalid-flags:
    - shard-mtlp:         NOTRUN -> [SKIP][42] ([i915#4083])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gem_mmap_wc@invalid-flags.html

  * igt@gem_mmap_wc@write-cpu-read-wc-unflushed:
    - shard-dg1:          NOTRUN -> [SKIP][43] ([i915#4083]) +5 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gem_mmap_wc@write-cpu-read-wc-unflushed.html

  * igt@gem_partial_pwrite_pread@reads-snoop:
    - shard-dg1:          NOTRUN -> [SKIP][44] ([i915#3282]) +6 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_partial_pwrite_pread@reads-snoop.html

  * igt@gem_partial_pwrite_pread@write:
    - shard-mtlp:         NOTRUN -> [SKIP][45] ([i915#3282])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gem_partial_pwrite_pread@write.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-glk:          NOTRUN -> [WARN][46] ([i915#2658])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk9/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-dg1:          NOTRUN -> [SKIP][47] ([i915#4270]) +3 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
    - shard-dg2:          NOTRUN -> [SKIP][48] ([i915#4270])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-tglu:         NOTRUN -> [SKIP][49] ([i915#4270])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
    - shard-mtlp:         NOTRUN -> [SKIP][50] ([i915#4270])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_readwrite@read-bad-handle:
    - shard-dg2:          NOTRUN -> [SKIP][51] ([i915#3282])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_readwrite@read-bad-handle.html

  * igt@gem_render_copy@yf-tiled-ccs-to-y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][52] ([i915#5190] / [i915#8428])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_render_copy@yf-tiled-ccs-to-y-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#4079])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_render_tiled_blits@basic.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-dg1:          NOTRUN -> [SKIP][54] ([i915#4079])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_softpin@evict-snoop-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][55] ([i915#4885])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gem_softpin@evict-snoop-interruptible.html

  * igt@gem_userptr_blits@forbidden-operations:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#3282] / [i915#3297])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-dg2:          NOTRUN -> [SKIP][57] ([i915#3297]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_userptr_blits@unsync-unmap:
    - shard-dg1:          NOTRUN -> [SKIP][58] ([i915#3297]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gem_userptr_blits@unsync-unmap.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-dg2:          NOTRUN -> [FAIL][59] ([i915#10177])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@gem_workarounds@suspend-resume-fd.html
    - shard-dg1:          NOTRUN -> [FAIL][60] ([i915#10177])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@gem_workarounds@suspend-resume-fd.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#2856]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-6/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-dg1:          NOTRUN -> [SKIP][62] ([i915#2527]) +3 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-mtlp:         NOTRUN -> [SKIP][63] ([i915#2856])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@gen9_exec_parse@bb-start-param.html

  * igt@i915_fb_tiling:
    - shard-dg2:          NOTRUN -> [SKIP][64] ([i915#4881])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@i915_fb_tiling.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [PASS][65] -> [ABORT][66] ([i915#10131] / [i915#9820])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-mtlp-4/igt@i915_module_load@reload-with-fault-injection.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-6/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_freq_mult@media-freq@gt0:
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#6590])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@i915_pm_freq_mult@media-freq@gt0.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0:
    - shard-tglu:         NOTRUN -> [WARN][68] ([i915#2681]) +3 other tests warn
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0:
    - shard-dg1:          NOTRUN -> [FAIL][69] ([i915#3591])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-mtlp:         NOTRUN -> [SKIP][70] +8 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-dg2:          NOTRUN -> [FAIL][71] ([i915#11269])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@i915_pm_rps@basic-api:
    - shard-dg1:          NOTRUN -> [SKIP][72] ([i915#6621])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@i915_pm_rps@basic-api.html

  * igt@i915_pm_rps@min-max-config-idle:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#6621])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@i915_pm_rps@min-max-config-idle.html

  * igt@i915_selftest@mock@memory_region:
    - shard-glk:          NOTRUN -> [DMESG-WARN][74] ([i915#9311])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk9/igt@i915_selftest@mock@memory_region.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - shard-dg2:          NOTRUN -> [FAIL][75] ([i915#10031])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-rkl:          [PASS][76] -> [FAIL][77] ([i915#10031])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-rkl-6/igt@i915_suspend@basic-s3-without-i915.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-3/igt@i915_suspend@basic-s3-without-i915.html

  * igt@i915_suspend@debugfs-reader:
    - shard-dg1:          NOTRUN -> [FAIL][78] ([i915#10031]) +1 other test fail
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@i915_suspend@debugfs-reader.html

  * igt@kms_addfb_basic@clobberred-modifier:
    - shard-dg1:          NOTRUN -> [SKIP][79] ([i915#4212])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_addfb_basic@clobberred-modifier.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][80] ([i915#4538] / [i915#5286]) +6 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][81] ([i915#3638]) +3 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-dg2:          NOTRUN -> [SKIP][82] ([i915#4538] / [i915#5190]) +2 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][83] ([i915#4538]) +4 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_joiner@basic:
    - shard-dg1:          NOTRUN -> [SKIP][84] ([i915#10656])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_big_joiner@basic.html

  * igt@kms_big_joiner@invalid-modeset-force-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][85] ([i915#10656]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-5/igt@kms_big_joiner@invalid-modeset-force-joiner.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][86] ([i915#10307] / [i915#10434] / [i915#6095]) +5 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-8/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][87] ([i915#6095]) +53 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-1/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][88] ([i915#6095]) +11 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-b-edp-1.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][89] ([i915#10307] / [i915#6095]) +181 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][90] ([i915#6095]) +87 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-16/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][91] ([i915#10278])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-dg1:          NOTRUN -> [SKIP][92] ([i915#3742])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][93] ([i915#7213]) +3 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-6/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][94] ([i915#4087]) +3 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-dg1:          NOTRUN -> [SKIP][95] ([i915#7828]) +7 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-dg2:          NOTRUN -> [SKIP][96] ([i915#7828]) +1 other test skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][97] ([i915#7828]) +1 other test skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_content_protection@atomic:
    - shard-dg2:          NOTRUN -> [SKIP][98] ([i915#7118] / [i915#9424])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-5/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@content-type-change:
    - shard-dg2:          NOTRUN -> [SKIP][99] ([i915#9424])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg1:          NOTRUN -> [SKIP][100] ([i915#3299])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_content_protection@dp-mst-type-1.html
    - shard-tglu:         NOTRUN -> [SKIP][101] ([i915#3116] / [i915#3299])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-0:
    - shard-dg1:          NOTRUN -> [SKIP][102] ([i915#9424])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@srm:
    - shard-dg1:          NOTRUN -> [SKIP][103] ([i915#7116])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-mtlp:         NOTRUN -> [SKIP][104] ([i915#3359])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][105] ([i915#3359]) +1 other test skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_cursor_crc@cursor-onscreen-512x170.html
    - shard-dg1:          NOTRUN -> [SKIP][106] ([i915#3359]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-256x85:
    - shard-mtlp:         NOTRUN -> [SKIP][107] ([i915#8814])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_cursor_crc@cursor-random-256x85.html

  * igt@kms_cursor_crc@cursor-random-32x10:
    - shard-tglu:         NOTRUN -> [SKIP][108] ([i915#3555])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@kms_cursor_crc@cursor-random-32x10.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-mtlp:         NOTRUN -> [SKIP][109] ([i915#9809]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][110] ([i915#4103] / [i915#4213])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_cursor_legacy@torture-move@pipe-a:
    - shard-dg1:          NOTRUN -> [DMESG-WARN][111] ([i915#10166])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_cursor_legacy@torture-move@pipe-a.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#9227])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][113] ([i915#9723])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-1/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-2.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-dg1:          NOTRUN -> [SKIP][114] ([i915#9723])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg2:          NOTRUN -> [SKIP][115] ([i915#3555]) +2 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][116] ([i915#3804])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          NOTRUN -> [SKIP][117] ([i915#1257])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-basic:
    - shard-dg1:          NOTRUN -> [SKIP][118] ([i915#3555] / [i915#3840])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_dsc@dsc-basic.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg1:          NOTRUN -> [SKIP][119] ([i915#3469])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#4854])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_feature_discovery@chamelium.html
    - shard-dg1:          NOTRUN -> [SKIP][121] ([i915#4854])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-4x:
    - shard-dg1:          NOTRUN -> [SKIP][122] ([i915#1839])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg1:          NOTRUN -> [SKIP][123] ([i915#9337])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr1:
    - shard-dg1:          NOTRUN -> [SKIP][124] ([i915#658])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_feature_discovery@psr1.html

  * igt@kms_fence_pin_leak:
    - shard-dg1:          NOTRUN -> [SKIP][125] ([i915#4881]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][126] +7 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-mtlp:         NOTRUN -> [SKIP][127] ([i915#3637]) +1 other test skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-dg1:          NOTRUN -> [SKIP][128] ([i915#9934]) +9 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@flip-vs-fences:
    - shard-mtlp:         NOTRUN -> [SKIP][129] ([i915#8381])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_flip@flip-vs-fences.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a1:
    - shard-dg2:          NOTRUN -> [FAIL][130] ([i915#10545]) +1 other test fail
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-8/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg1:          NOTRUN -> [SKIP][131] ([i915#2587] / [i915#2672]) +3 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][132] ([i915#2672]) +2 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][133] ([i915#3555] / [i915#8810])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-snb:          [PASS][134] -> [SKIP][135] +1 other test skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-snb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#1825]) +7 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-msflip-blt:
    - shard-dg2:          NOTRUN -> [SKIP][137] ([i915#5354]) +10 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#8708]) +7 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][139] ([i915#3458]) +5 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][140] ([i915#8708]) +20 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][141] ([i915#3458]) +17 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite.html
    - shard-tglu:         NOTRUN -> [SKIP][142] +5 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-dg1:          NOTRUN -> [SKIP][143] ([i915#3555] / [i915#8228]) +2 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@static-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([i915#3555] / [i915#8228])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@kms_hdr@static-toggle.html

  * igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][145] ([i915#9457]) +3 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][146] ([i915#10647]) +1 other test fail
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk9/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#9423]) +7 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-dp-4.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][148] ([i915#5176]) +3 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d-edp-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][149] ([i915#9423]) +9 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][150] ([i915#5235]) +7 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][151] ([i915#5235]) +2 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-edp-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][152] ([i915#3555] / [i915#5235])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-edp-1.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][153] ([i915#5235] / [i915#9423]) +19 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][154] ([i915#5235]) +15 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][155] +236 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-1.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg1:          NOTRUN -> [SKIP][156] ([i915#9519])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-dg2:          [PASS][157] -> [SKIP][158] ([i915#9519]) +2 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-7/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-dg1:          NOTRUN -> [SKIP][159] ([i915#6524]) +1 other test skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@fbc-cursor-plane-update-sf:
    - shard-dg1:          NOTRUN -> [SKIP][160] +39 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-18/igt@kms_psr2_sf@fbc-cursor-plane-update-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg1:          NOTRUN -> [SKIP][161] ([i915#9683])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-pr-cursor-mmap-cpu:
    - shard-tglu:         NOTRUN -> [SKIP][162] ([i915#9732])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@kms_psr@fbc-pr-cursor-mmap-cpu.html

  * igt@kms_psr@fbc-psr-primary-mmap-gtt@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][163] ([i915#9688]) +2 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_psr@fbc-psr-primary-mmap-gtt@edp-1.html

  * igt@kms_psr@fbc-psr2-sprite-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][164] ([i915#1072] / [i915#9732]) +23 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_psr@fbc-psr2-sprite-mmap-gtt.html

  * igt@kms_psr@pr-primary-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#1072] / [i915#9732]) +6 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_psr@pr-primary-mmap-cpu.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2:          NOTRUN -> [SKIP][166] ([i915#9685])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-mtlp:         NOTRUN -> [SKIP][167] ([i915#4235])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-dg2:          NOTRUN -> [SKIP][168] ([i915#4235] / [i915#5190])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
    - shard-dg1:          NOTRUN -> [SKIP][169] ([i915#5289])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-dg1:          NOTRUN -> [SKIP][170] ([i915#3555]) +10 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-snb:          NOTRUN -> [SKIP][171]
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-snb2/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_sysfs_edid_timing:
    - shard-dg2:          NOTRUN -> [FAIL][172] ([IGT#2])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_sysfs_edid_timing.html
    - shard-dg1:          NOTRUN -> [FAIL][173] ([IGT#2] / [i915#6493])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_sysfs_edid_timing.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-2:
    - shard-rkl:          [PASS][174] -> [FAIL][175] ([i915#9196])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-rkl-6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-2.html
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-2.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1:
    - shard-mtlp:         [PASS][176] -> [FAIL][177] ([i915#9196])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1:
    - shard-tglu:         [PASS][178] -> [FAIL][179] ([i915#9196])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html

  * igt@kms_vrr@max-min:
    - shard-dg1:          NOTRUN -> [SKIP][180] ([i915#9906])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@kms_vrr@max-min.html
    - shard-dg2:          NOTRUN -> [SKIP][181] ([i915#9906])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@kms_vrr@max-min.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-dg1:          NOTRUN -> [SKIP][182] ([i915#2437] / [i915#9412])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@perf_pmu@busy-double-start@rcs0:
    - shard-mtlp:         [PASS][183] -> [FAIL][184] ([i915#4349])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-mtlp-6/igt@perf_pmu@busy-double-start@rcs0.html
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-5/igt@perf_pmu@busy-double-start@rcs0.html

  * igt@perf_pmu@frequency@gt0:
    - shard-dg1:          NOTRUN -> [FAIL][185] ([i915#6806])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@perf_pmu@frequency@gt0.html

  * igt@prime_vgem@basic-fence-read:
    - shard-dg1:          NOTRUN -> [SKIP][186] ([i915#3708]) +1 other test skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-read:
    - shard-dg2:          NOTRUN -> [SKIP][187] ([i915#3291] / [i915#3708])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@prime_vgem@basic-read.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each:
    - shard-dg1:          NOTRUN -> [SKIP][188] ([i915#9917])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@sriov_basic@enable-vfs-bind-unbind-each.html

  * igt@syncobj_timeline@invalid-wait-zero-handles:
    - shard-dg2:          NOTRUN -> [FAIL][189] ([i915#9781])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-7/igt@syncobj_timeline@invalid-wait-zero-handles.html

  * igt@syncobj_wait@invalid-wait-zero-handles:
    - shard-dg2:          NOTRUN -> [FAIL][190] ([i915#9779])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@syncobj_wait@invalid-wait-zero-handles.html
    - shard-dg1:          NOTRUN -> [FAIL][191] ([i915#9779])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@syncobj_wait@invalid-wait-zero-handles.html
    - shard-glk:          NOTRUN -> [FAIL][192] ([i915#9779])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk1/igt@syncobj_wait@invalid-wait-zero-handles.html

  * igt@v3d/v3d_create_bo@create-bo-0:
    - shard-dg2:          NOTRUN -> [SKIP][193] ([i915#2575]) +3 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@v3d/v3d_create_bo@create-bo-0.html

  * igt@v3d/v3d_perfmon@create-perfmon-invalid-counters:
    - shard-mtlp:         NOTRUN -> [SKIP][194] ([i915#2575]) +2 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@v3d/v3d_perfmon@create-perfmon-invalid-counters.html

  * igt@v3d/v3d_submit_cl@bad-extension:
    - shard-dg1:          NOTRUN -> [SKIP][195] ([i915#2575]) +14 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@v3d/v3d_submit_cl@bad-extension.html

  * igt@vc4/vc4_label_bo@set-bad-name:
    - shard-dg1:          NOTRUN -> [SKIP][196] ([i915#7711]) +7 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-17/igt@vc4/vc4_label_bo@set-bad-name.html

  * igt@vc4/vc4_mmap@mmap-bo:
    - shard-tglu:         NOTRUN -> [SKIP][197] ([i915#2575]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@vc4/vc4_mmap@mmap-bo.html

  * igt@vc4/vc4_purgeable_bo@mark-willneed:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#7711]) +2 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-10/igt@vc4/vc4_purgeable_bo@mark-willneed.html

  * igt@vc4/vc4_wait_bo@used-bo-0ns:
    - shard-mtlp:         NOTRUN -> [SKIP][199] ([i915#7711]) +1 other test skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-mtlp-7/igt@vc4/vc4_wait_bo@used-bo-0ns.html

  
#### Possible fixes ####

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-tglu:         [FAIL][200] ([i915#6268]) -> [PASS][201]
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-10/igt@gem_ctx_exec@basic-nohangcheck.html
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-8/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglu:         [FAIL][202] ([i915#2842]) -> [PASS][203]
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-10/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0:
    - shard-dg2:          [FAIL][204] ([i915#10378]) -> [PASS][205] +1 other test pass
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-6/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-8/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-tglu:         [INCOMPLETE][206] ([i915#10047] / [i915#9820]) -> [PASS][207]
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-5/igt@i915_module_load@reload-with-fault-injection.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [FAIL][208] ([i915#2346]) -> [PASS][209]
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@torture-move@pipe-a:
    - shard-tglu:         [DMESG-WARN][210] ([i915#10166] / [i915#1982]) -> [PASS][211]
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-5/igt@kms_cursor_legacy@torture-move@pipe-a.html
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-9/igt@kms_cursor_legacy@torture-move@pipe-a.html

  * igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1:
    - shard-snb:          [FAIL][212] ([i915#2122]) -> [PASS][213]
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-snb7/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-snb5/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt:
    - shard-dg2:          [FAIL][214] ([i915#6880]) -> [PASS][215]
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [FAIL][216] ([i915#9295]) -> [PASS][217]
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-tglu-7/igt@kms_pm_dc@dc6-dpms.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-tglu-4/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-dg2:          [SKIP][218] ([i915#9519]) -> [PASS][219]
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-8/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@i2c:
    - shard-dg2:          [FAIL][220] ([i915#8717]) -> [PASS][221]
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-2/igt@kms_pm_rpm@i2c.html
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-8/igt@kms_pm_rpm@i2c.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [SKIP][222] ([i915#9519]) -> [PASS][223] +4 other tests pass
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-snb:          [FAIL][224] ([i915#9196]) -> [PASS][225]
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-snb5/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-snb2/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  
#### Warnings ####

  * igt@gem_eio@kms:
    - shard-dg1:          [INCOMPLETE][226] ([i915#10513] / [i915#1982]) -> [INCOMPLETE][227] ([i915#10513])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg1-16/igt@gem_eio@kms.html
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg1-13/igt@gem_eio@kms.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2:          [TIMEOUT][228] ([i915#5493]) -> [DMESG-WARN][229] ([i915#1982] / [i915#4936] / [i915#5493])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-4/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-6/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [INCOMPLETE][230] ([i915#1982] / [i915#9820] / [i915#9849]) -> [INCOMPLETE][231] ([i915#9849])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
    - shard-dg2:          [SKIP][232] ([i915#10433] / [i915#3458]) -> [SKIP][233] ([i915#3458])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-dg2:          [SKIP][234] ([i915#3458]) -> [SKIP][235] ([i915#10433] / [i915#3458]) +5 other tests skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_psr@psr-cursor-render:
    - shard-dg2:          [SKIP][236] ([i915#1072] / [i915#9732]) -> [SKIP][237] ([i915#1072] / [i915#9673] / [i915#9732]) +14 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-4/igt@kms_psr@psr-cursor-render.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-11/igt@kms_psr@psr-cursor-render.html

  * igt@kms_psr@psr2-cursor-plane-move:
    - shard-dg2:          [SKIP][238] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][239] ([i915#1072] / [i915#9732]) +3 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14881/shard-dg2-11/igt@kms_psr@psr2-cursor-plane-move.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/shard-dg2-5/igt@kms_psr@psr2-cursor-plane-move.html

  
  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [i915#10030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10030
  [i915#10031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10031
  [i915#10047]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10047
  [i915#10086]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10086
  [i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
  [i915#10166]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10166
  [i915#10177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10177
  [i915#10278]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10278
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
  [i915#10386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10386
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10513]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10513
  [i915#10545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10545
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11269]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11269
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4881
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#4936]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4936
  [i915#5176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6268]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6268
  [i915#6493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6493
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#6806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6806
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
  [i915#7711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7711
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8717
  [i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9227]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9227
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9457]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9457
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9779]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9779
  [i915#9781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9781
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9849
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_14881 -> Patchwork_133684v7

  CI-20190529: 20190529
  CI_DRM_14881: a494545483635d3d93d19e8f483f61e7d4198383 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7878: eecd5683bd98cee3fc6bd3f26a1f053c897f6bdf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_133684v7: a494545483635d3d93d19e8f483f61e7d4198383 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133684v7/index.html

[-- Attachment #2: Type: text/html, Size: 82400 bytes --]

^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time
  2024-06-05 10:25 ` [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time Jouni Högander
@ 2024-06-06  8:47   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06  8:47 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:55 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for
> aux less wake time
> 
> We want to have own variables for fast wake lines and aux less wake time. It
> might be needed to choose if we can enable Panel Replay Selective Update or
> PSR2.
> 
> Also currently aux less wake time is overwritten by calculated fast wake time.
> 
> v2:use less wake time in intel_alpm_lobf_compute_config

Typo aux_less_*. With this fixed,
Reviewed-by: Animesh Manna <animesh.manna@intel.com>

Regards,
Animesh
> 
> Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time")
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c          | 4 ++--
>  drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index a26716c14aa3..52a573367976 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -159,7 +159,7 @@ static int
> _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
>  	if (i915->display.params.psr_safest_params)
>  		aux_less_wake_lines =
> ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;
> 
> -	intel_dp->alpm_parameters.fast_wake_lines = aux_less_wake_lines;
> +	intel_dp->alpm_parameters.aux_less_wake_lines =
> aux_less_wake_lines;
>  	intel_dp->alpm_parameters.silence_period_sym_clocks =
> silence_period;
>  	intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms =
> lfps_half_cycle;
> 
> @@ -298,7 +298,7 @@ void intel_alpm_lobf_compute_config(struct intel_dp
> *intel_dp,
>  	if (intel_alpm_aux_less_wake_supported(intel_dp))
>  		waketime_in_lines = intel_dp-
> >alpm_parameters.io_wake_lines;
>  	else
> -		waketime_in_lines = intel_dp-
> >alpm_parameters.fast_wake_lines;
> +		waketime_in_lines = intel_dp-
> >alpm_parameters.aux_less_wake_lines;
> 
>  	crtc_state->has_lobf = (context_latency + guardband) >
>  		(first_sdp_position + waketime_in_lines); diff --git
> a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 77609656317b..df29ec37ef28 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1847,6 +1847,7 @@ struct intel_dp {
> 
>  		/* LNL and beyond */
>  		u8 check_entry_lines;
> +		u8 aux_less_wake_lines;
>  		u8 silence_period_sym_clocks;
>  		u8 lfps_half_cycle_num_of_syms;
>  	} alpm_parameters;
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL
  2024-06-05 10:25 ` [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL Jouni Högander
@ 2024-06-06  9:41   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06  9:41 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:55 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines
> into ALPM_CTL
> 
> Currently AUX Less Wake lines are not written into ALPM_CTL. Fix this.
> 
> Fixes: 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP
> Panel replay")
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 52a573367976..18c1c5803670 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -323,7 +323,8 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp,
>  	    (crtc_state->has_lobf &&
> intel_alpm_aux_less_wake_supported(intel_dp))) {
>  		alpm_ctl = ALPM_CTL_ALPM_ENABLE |
>  			ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> -
> 	ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
> +
> 	ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
> +			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp-
> >alpm_parameters.aux_less_wake_lines);
> 
>  		intel_de_write(dev_priv,
>  			       PORT_ALPM_CTL(dev_priv, cpu_transcoder),
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 03/26] drm/i915/display: Take panel replay into account in vsc sdp unpacking
  2024-06-05 10:25 ` [PATCH v6 03/26] drm/i915/display: Take panel replay into account in vsc sdp unpacking Jouni Högander
@ 2024-06-06  9:59   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06  9:59 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 03/26] drm/i915/display: Take panel replay into account
> in vsc sdp unpacking
> 
> Currently intel_dp_vsc_sdp_unpack is not taking into account Panel Replay
> vsc sdp. Fix this by adding vsc sdp revision 0x6 and length 0x10 into
> intel_dp_vsc_sdp_unpack
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index fd054e16850d..286119eb77f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4438,7 +4438,8 @@ static int intel_dp_vsc_sdp_unpack(struct
> drm_dp_vsc_sdp *vsc,
>  	vsc->length = sdp->sdp_header.HB3;
> 
>  	if ((sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8)
> ||
> -	    (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe)) {
> +	    (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe) ||
> +	    (sdp->sdp_header.HB2 == 0x6 && sdp->sdp_header.HB3 == 0x10))
> {
>  		/*
>  		 * - HB2 = 0x2, HB3 = 0x8
>  		 *   VSC SDP supporting 3D stereo + PSR
> @@ -4446,6 +4447,8 @@ static int intel_dp_vsc_sdp_unpack(struct
> drm_dp_vsc_sdp *vsc,
>  		 *   VSC SDP supporting 3D stereo + PSR2 with Y-coordinate of
>  		 *   first scan line of the SU region (applies to eDP v1.4b
>  		 *   and higher).
> +		 * - HB2 = 0x6, HB3 = 0x10
> +		 *   VSC SDP supporting 3D stereo + Panel Replay.
>  		 */
>  		return 0;
>  	} else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 ==
> 0x13) {
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes
  2024-06-05 10:25 ` [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes Jouni Högander
@ 2024-06-06 13:02   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 13:02 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe
> comparison if no active planes
> 
> Panel Replay is not enabled if there are no active planes. Do not compare it
> on pipe comparison. Otherwise we get pipe mismatch.
> 
> Fixes: ac9ef327327b ("drm/i915/psr: Panel replay has to be enabled before
> link training")
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7370acdd6b8b..2747dd01bb0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5331,7 +5331,9 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>  	 * Panel replay has to be enabled before link training. PSR doesn't
> have
>  	 * this requirement -> check these only if using panel replay
>  	 */
> -	if (current_config->has_panel_replay || pipe_config-
> >has_panel_replay) {
> +	if (current_config->active_planes &&
> +	    (current_config->has_panel_replay ||
> +	     pipe_config->has_panel_replay)) {
>  		PIPE_CONF_CHECK_BOOL(has_psr);
>  		PIPE_CONF_CHECK_BOOL(has_sel_update);
>  		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU Region ET bit
  2024-06-05 10:25 ` [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU Region ET bit Jouni Högander
@ 2024-06-06 13:04   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 13:04 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU
> Region ET bit
> 
> Add missing Panel Replay Enable SU Region ET bit defined in DP2.1
> specification.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  include/drm/display/drm_dp.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index f246fa03a3cb..173548c6473a 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -743,6 +743,7 @@
>  # define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
>  # define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
>  # define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
> +# define DP_PANEL_REPLAY_ENABLE_SU_REGION_ET            (1 << 7) /* DP
> 2.1 */
> 
>  #define PANEL_REPLAY_CONFIG2                                     0x1b1 /* eDP 1.5 */
>  # define DP_PANEL_REPLAY_SINK_REFRESH_RATE_UNLOCK_GRANTED	 (1 <<
> 0)
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay
  2024-06-05 10:25 ` [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay Jouni Högander
@ 2024-06-06 13:26   ` Manna, Animesh
  2024-06-06 15:47     ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 13:26 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for
> Panel Replay
> 
> When checking vblank length used wake time is aux less wake time for eDP
> Panel Replay (vblank length is not checked for DP2.0 Panel Replay).
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index c9fcb25184ee..ccb7c022e364 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1251,8 +1251,12 @@ static bool vblank_length_valid(struct intel_dp
> *intel_dp,
>  		crtc_state->hw.adjusted_mode.crtc_vblank_start;
>  	int wake_lines;
> 
> -	wake_lines = DISPLAY_VER(i915) < 20 ?
> psr2_block_count_lines(intel_dp) :
> -		intel_dp->alpm_parameters.io_wake_lines;
> +	if (crtc_state->has_panel_replay)
> +		wake_lines = intel_dp-
> >alpm_parameters.aux_less_wake_lines;

Existing code can take care for EDP panel replay as EDP panel replay is supported from LNL onwards.
Not sure why this change is needed.

Regards,
Animesh
  
> +	else
> +		wake_lines = DISPLAY_VER(i915) < 20 ?
> +			psr2_block_count_lines(intel_dp) :
> +			intel_dp->alpm_parameters.io_wake_lines;
> 
>  	if (crtc_state->req_psr2_sdp_prior_scanline)
>  		vblank -= 1;
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-05 10:25 ` [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status Jouni Högander
@ 2024-06-06 14:35   ` Manna, Animesh
  2024-06-06 15:37     ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 14:35 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of
> frame lock status
> 
> Currently Panel Replay status printout is printing frame lock status. It
> should print Panel Replay status instead. Panel Replay status register
> field follows PSR status register field. Use existing PSR code for that.
> 
> Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for panel
> replay")
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++-----------------
>  1 file changed, 5 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 7bdae0d0ea45..3530e5f44096 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -3579,16 +3579,9 @@ static int i915_psr_sink_status_show(struct
> seq_file *m, void *data)
>  		"reserved",
>  		"sink internal error",
>  	};
> -	static const char * const panel_replay_status[] = {
> -		"Sink device frame is locked to the Source device",
> -		"Sink device is coasting, using the VTotal target",
> -		"Sink device is governing the frame rate (frame rate unlock is
> granted)",
> -		"Sink device in the process of re-locking with the Source
> device",
> -	};
>  	const char *str;
>  	int ret;
>  	u8 status, error_status;
> -	u32 idx;
> 
>  	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
>  		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> @@ -3602,16 +3595,11 @@ static int i915_psr_sink_status_show(struct
> seq_file *m, void *data)
>  	if (ret)
>  		return ret;
> 
> -	str = "unknown";
> -	if (intel_dp->psr.panel_replay_enabled) {
> -		idx = (status & DP_SINK_FRAME_LOCKED_MASK) >>
> DP_SINK_FRAME_LOCKED_SHIFT;
> -		if (idx < ARRAY_SIZE(panel_replay_status))
> -			str = panel_replay_status[idx];
> -	} else if (intel_dp->psr.enabled) {
> -		idx = status & DP_PSR_SINK_STATE_MASK;
> -		if (idx < ARRAY_SIZE(sink_status))
> -			str = sink_status[idx];
> -	}
> +	status &= DP_PSR_SINK_STATE_MASK;
> +	if (status < ARRAY_SIZE(sink_status))
> +		str = sink_status[status];
> +	else
> +		str = "unknown";

psr_get_status_and_error_status() is returning frame-locked-status for panel replay, Its different dpcd DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like psr.

Regards,
Animesh

> 
>  	seq_printf(m, "Sink %s status: 0x%x [%s]\n", psr_mode_str(intel_dp),
> status, str);
> 
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static
  2024-06-05 10:25 ` [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static Jouni Högander
@ 2024-06-06 14:44   ` Manna, Animesh
  2024-06-06 15:49     ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 14:44 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-
> static
> 
> We want to use intel_alpm_aux_wake_supported and
> intel_alpm_aux_less_wake_supported in intel_psr.c. Convert them as non-
> static.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 18c1c5803670..90072f6e3a33 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -11,12 +11,12 @@
>  #include "intel_dp_aux.h"
>  #include "intel_psr_regs.h"
> 
> -static bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
> +bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
>  {
>  	return intel_dp->alpm_dpcd & DP_ALPM_CAP;  }
> 
> -static bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
> +bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
>  {
>  	return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;  } diff --git
> a/drivers/gpu/drm/i915/display/intel_alpm.h
> b/drivers/gpu/drm/i915/display/intel_alpm.h
> index c82ecc7b4001..d4fb60393c91 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -22,4 +22,6 @@ void intel_alpm_lobf_compute_config(struct intel_dp
> *intel_dp,  void intel_alpm_configure(struct intel_dp *intel_dp,
>  			  const struct intel_crtc_state *crtc_state);  void
> intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> +bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool
> +intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);

The usage is implemented in patch 8, patch 7 and 8 can be squashed together.

Regards,
Animesh

>  #endif
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake
  2024-06-05 10:25 ` [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake Jouni Högander
@ 2024-06-06 14:55   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 14:55 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake
> time on Lunarlake
> 
> As Lunarlake doesn't have block count configuration vblank should be
> checked against IO buffer wake time.
> 
> Bspec: 68920
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 471b60032304..c9fcb25184ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1246,9 +1246,13 @@ static int intel_psr_entry_setup_frames(struct
> intel_dp *intel_dp,  static bool vblank_length_valid(struct intel_dp *intel_dp,
>  				const struct intel_crtc_state *crtc_state)  {
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
>  		crtc_state->hw.adjusted_mode.crtc_vblank_start;
> -	int wake_lines = psr2_block_count_lines(intel_dp);
> +	int wake_lines;
> +
> +	wake_lines = DISPLAY_VER(i915) < 20 ?
> psr2_block_count_lines(intel_dp) :
> +		intel_dp->alpm_parameters.io_wake_lines;
> 
>  	if (crtc_state->req_psr2_sdp_prior_scanline)
>  		vblank -= 1;
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
  2024-06-05 10:25 ` [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function Jouni Högander
@ 2024-06-06 14:58   ` Manna, Animesh
  2024-06-06 15:41     ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 14:58 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to
> separate function
> 
> We are about to add more complexity to vblank length check. It makes sense
> to move it to separate function for sake of clarity.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 3530e5f44096..23c3fed1f983 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1243,6 +1243,20 @@ static int intel_psr_entry_setup_frames(struct
> intel_dp *intel_dp,
>  	return entry_setup_frames;
>  }
> 
> +static bool vblank_length_valid(struct intel_dp *intel_dp,
> +				const struct intel_crtc_state *crtc_state) {

As this function specific to psr2, maybe good to have name as psr2_vblank_length_valid(). Otherwise the changes looks ok to me.

Regards,
Animesh
> +	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
> +		crtc_state->hw.adjusted_mode.crtc_vblank_start;
> +	int wake_lines = psr2_block_count_lines(intel_dp);
> +
> +	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
> +	if (vblank < wake_lines)
> +		return false;
> +
> +	return true;
> +}
> +
>  static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  				    struct intel_crtc_state *crtc_state)  { @@ -
> 1333,9 +1347,7 @@ static bool intel_psr2_config_valid(struct intel_dp
> *intel_dp,
>  	}
> 
>  	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
> -	if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
> -	    crtc_state->hw.adjusted_mode.crtc_vblank_start <
> -	    psr2_block_count_lines(intel_dp)) {
> +	if (!vblank_length_valid(intel_dp, crtc_state)) {
>  		drm_dbg_kms(&dev_priv->drm,
>  			    "PSR2 not enabled, too short vblank time\n");
>  		return false;
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid
  2024-06-05 10:25 ` [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid Jouni Högander
@ 2024-06-06 15:01   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 15:01 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to
> intel_psr2_config_et_valid
> 
> Early Transport is possible and in our HW mandatory on eDP Panel Replay.
> Add parameter to intel_psr2_config_et_valid to differentiate validity check
> for Panel Replay.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index a3ad4488fcee..7bdae0d0ea45 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -664,16 +664,17 @@ static void hsw_psr_setup_aux(struct intel_dp
> *intel_dp)
>  		       aux_ctl);
>  }
> 
> -static bool psr2_su_region_et_valid(struct intel_dp *intel_dp)
> +static bool psr2_su_region_et_valid(struct intel_dp *intel_dp, bool
> +panel_replay)
>  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> 
> -	if (DISPLAY_VER(i915) >= 20 &&
> -	    intel_dp->psr_dpcd[0] ==
> DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
> -	    !(intel_dp->psr.debug &
> I915_PSR_DEBUG_SU_REGION_ET_DISABLE))
> -		return true;
> +	if (DISPLAY_VER(i915) < 20 || !intel_dp_is_edp(intel_dp) ||
> +	    intel_dp->psr.debug & I915_PSR_DEBUG_SU_REGION_ET_DISABLE)
> +		return false;
> 
> -	return false;
> +	return panel_replay ?
> +		intel_dp->pr_dpcd &
> DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
> +		intel_dp->psr_dpcd[0] !=
> DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
>  }
> 
>  static void _panel_replay_enable_sink(struct intel_dp *intel_dp, @@ -
> 1351,7 +1352,7 @@ static bool intel_psr2_config_valid(struct intel_dp
> *intel_dp,
> 
>  	tgl_dc3co_exitline_compute_config(intel_dp, crtc_state);
> 
> -	if (psr2_su_region_et_valid(intel_dp))
> +	if (psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay))
>  		crtc_state->enable_psr2_su_region_et = true;
> 
>  	return true;
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline indication in vblank check
  2024-06-05 10:25 ` [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline indication in vblank check Jouni Högander
@ 2024-06-06 15:02   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-06 15:02 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline
> indication in vblank check
> 
> SU SDP scanline indication should be taken into account when checking
> vblank length. In Bspec we have:
> 
> PSR2_CTL[ SU SDP scanline indication ] = 0: (TRANS_VBLANK Vertical Blank
> End- TRANS_VBLANK Vertical Blank Start) > PSR2_CTL Block Count Number
> value in lines
> PSR2_CTL[ SU SDP scanline indication ] = 1: (TRANS_VBLANK Vertical Blank
> End- TRANS_VBLANK Vertical Blank Start- 1) > PSR2_CTL Block Count Number
> value in lines
> 
> Bspec: 49274
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 23c3fed1f983..471b60032304 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1250,6 +1250,9 @@ static bool vblank_length_valid(struct intel_dp
> *intel_dp,
>  		crtc_state->hw.adjusted_mode.crtc_vblank_start;
>  	int wake_lines = psr2_block_count_lines(intel_dp);
> 
> +	if (crtc_state->req_psr2_sdp_prior_scanline)
> +		vblank -= 1;
> +
>  	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
>  	if (vblank < wake_lines)
>  		return false;
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-06 14:35   ` Manna, Animesh
@ 2024-06-06 15:37     ` Hogander, Jouni
  2024-06-07  9:59       ` Manna, Animesh
  0 siblings, 1 reply; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-06 15:37 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Thu, 2024-06-06 at 14:35 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Wednesday, June 5, 2024 3:56 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status
> > instead of
> > frame lock status
> > 
> > Currently Panel Replay status printout is printing frame lock
> > status. It
> > should print Panel Replay status instead. Panel Replay status
> > register
> > field follows PSR status register field. Use existing PSR code for
> > that.
> > 
> > Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for
> > panel
> > replay")
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++---------------
> > --
> >  1 file changed, 5 insertions(+), 17 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 7bdae0d0ea45..3530e5f44096 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -3579,16 +3579,9 @@ static int i915_psr_sink_status_show(struct
> > seq_file *m, void *data)
> >                 "reserved",
> >                 "sink internal error",
> >         };
> > -       static const char * const panel_replay_status[] = {
> > -               "Sink device frame is locked to the Source device",
> > -               "Sink device is coasting, using the VTotal target",
> > -               "Sink device is governing the frame rate (frame
> > rate unlock is
> > granted)",
> > -               "Sink device in the process of re-locking with the
> > Source
> > device",
> > -       };
> >         const char *str;
> >         int ret;
> >         u8 status, error_status;
> > -       u32 idx;
> > 
> >         if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> >                 seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > @@ -3602,16 +3595,11 @@ static int i915_psr_sink_status_show(struct
> > seq_file *m, void *data)
> >         if (ret)
> >                 return ret;
> > 
> > -       str = "unknown";
> > -       if (intel_dp->psr.panel_replay_enabled) {
> > -               idx = (status & DP_SINK_FRAME_LOCKED_MASK) >>
> > DP_SINK_FRAME_LOCKED_SHIFT;
> > -               if (idx < ARRAY_SIZE(panel_replay_status))
> > -                       str = panel_replay_status[idx];
> > -       } else if (intel_dp->psr.enabled) {
> > -               idx = status & DP_PSR_SINK_STATE_MASK;
> > -               if (idx < ARRAY_SIZE(sink_status))
> > -                       str = sink_status[idx];
> > -       }
> > +       status &= DP_PSR_SINK_STATE_MASK;
> > +       if (status < ARRAY_SIZE(sink_status))
> > +               str = sink_status[status];
> > +       else
> > +               str = "unknown";
> 
> psr_get_status_and_error_status() is returning frame-locked-status
> for panel replay, Its different dpcd
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like psr.

Panel Replay STATUS ~= PSR STATUS if you look at description of the
registers. Frame lock status is completely different thing. I don't
understand why psr sink status debugfs interface should print frame
lock status for Panel Replay?

BR,

Jouni Högander

> 
> Regards,
> Animesh
> 
> > 
> >         seq_printf(m, "Sink %s status: 0x%x [%s]\n",
> > psr_mode_str(intel_dp),
> > status, str);
> > 
> > --
> > 2.34.1
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
  2024-06-06 14:58   ` Manna, Animesh
@ 2024-06-06 15:41     ` Hogander, Jouni
  2024-06-07 11:09       ` Manna, Animesh
  0 siblings, 1 reply; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-06 15:41 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Thu, 2024-06-06 at 14:58 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Wednesday, June 5, 2024 3:56 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > Subject: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to
> > separate function
> > 
> > We are about to add more complexity to vblank length check. It
> > makes sense
> > to move it to separate function for sake of clarity.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 18 +++++++++++++++---
> >  1 file changed, 15 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 3530e5f44096..23c3fed1f983 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1243,6 +1243,20 @@ static int
> > intel_psr_entry_setup_frames(struct
> > intel_dp *intel_dp,
> >         return entry_setup_frames;
> >  }
> > 
> > +static bool vblank_length_valid(struct intel_dp *intel_dp,
> > +                               const struct intel_crtc_state
> > *crtc_state) {
> 
> As this function specific to psr2, maybe good to have name as
> psr2_vblank_length_valid(). Otherwise the changes looks ok to me.

Please check patch 19. That is actually moving this to be common for
Panel Replay and PSR.

BR,

Jouni Högander

> 
> Regards,
> Animesh
> > +       int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
> > +               crtc_state->hw.adjusted_mode.crtc_vblank_start;
> > +       int wake_lines = psr2_block_count_lines(intel_dp);
> > +
> > +       /* Vblank >= PSR2_CTL Block Count Number maximum line count
> > */
> > +       if (vblank < wake_lines)
> > +               return false;
> > +
> > +       return true;
> > +}
> > +
> >  static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> >                                     struct intel_crtc_state
> > *crtc_state)  { @@ -
> > 1333,9 +1347,7 @@ static bool intel_psr2_config_valid(struct
> > intel_dp
> > *intel_dp,
> >         }
> > 
> >         /* Vblank >= PSR2_CTL Block Count Number maximum line count
> > */
> > -       if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
> > -           crtc_state->hw.adjusted_mode.crtc_vblank_start <
> > -           psr2_block_count_lines(intel_dp)) {
> > +       if (!vblank_length_valid(intel_dp, crtc_state)) {
> >                 drm_dbg_kms(&dev_priv->drm,
> >                             "PSR2 not enabled, too short vblank
> > time\n");
> >                 return false;
> > --
> > 2.34.1
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay
  2024-06-06 13:26   ` Manna, Animesh
@ 2024-06-06 15:47     ` Hogander, Jouni
  2024-06-07 11:14       ` Manna, Animesh
  0 siblings, 1 reply; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-06 15:47 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Thu, 2024-06-06 at 13:26 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Wednesday, June 5, 2024 3:56 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > Subject: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake
> > time for
> > Panel Replay
> > 
> > When checking vblank length used wake time is aux less wake time
> > for eDP
> > Panel Replay (vblank length is not checked for DP2.0 Panel Replay).
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++++--
> >  1 file changed, 6 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index c9fcb25184ee..ccb7c022e364 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1251,8 +1251,12 @@ static bool vblank_length_valid(struct
> > intel_dp
> > *intel_dp,
> >                 crtc_state->hw.adjusted_mode.crtc_vblank_start;
> >         int wake_lines;
> > 
> > -       wake_lines = DISPLAY_VER(i915) < 20 ?
> > psr2_block_count_lines(intel_dp) :
> > -               intel_dp->alpm_parameters.io_wake_lines;
> > +       if (crtc_state->has_panel_replay)
> > +               wake_lines = intel_dp-
> > > alpm_parameters.aux_less_wake_lines;
> 
> Existing code can take care for EDP panel replay as EDP panel replay
> is supported from LNL onwards.
> Not sure why this change is needed.

Panel Replay eDP --> aux less wake lines is used for the check

LunarLake PSR2 --> io wake lines is used for the check

Prior LunarLake PSR2 --> psr2_block_count_lines is used for the check

Existing code is taking care of last two cases. Change is taking care
of the first one.

BR,

Jouni Högander

> 
> Regards,
> Animesh
>   
> > +       else
> > +               wake_lines = DISPLAY_VER(i915) < 20 ?
> > +                       psr2_block_count_lines(intel_dp) :
> > +                       intel_dp->alpm_parameters.io_wake_lines;
> > 
> >         if (crtc_state->req_psr2_sdp_prior_scanline)
> >                 vblank -= 1;
> > --
> > 2.34.1
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static
  2024-06-06 14:44   ` Manna, Animesh
@ 2024-06-06 15:49     ` Hogander, Jouni
  0 siblings, 0 replies; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-06 15:49 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Thu, 2024-06-06 at 14:44 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Wednesday, June 5, 2024 3:56 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > Subject: [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks
> > non-
> > static
> > 
> > We want to use intel_alpm_aux_wake_supported and
> > intel_alpm_aux_less_wake_supported in intel_psr.c. Convert them as
> > non-
> > static.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++
> >  2 files changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 18c1c5803670..90072f6e3a33 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -11,12 +11,12 @@
> >  #include "intel_dp_aux.h"
> >  #include "intel_psr_regs.h"
> > 
> > -static bool intel_alpm_aux_wake_supported(struct intel_dp
> > *intel_dp)
> > +bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
> >  {
> >         return intel_dp->alpm_dpcd & DP_ALPM_CAP;  }
> > 
> > -static bool intel_alpm_aux_less_wake_supported(struct intel_dp
> > *intel_dp)
> > +bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
> >  {
> >         return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;  } diff
> > --git
> > a/drivers/gpu/drm/i915/display/intel_alpm.h
> > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > index c82ecc7b4001..d4fb60393c91 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > @@ -22,4 +22,6 @@ void intel_alpm_lobf_compute_config(struct
> > intel_dp
> > *intel_dp,  void intel_alpm_configure(struct intel_dp *intel_dp,
> >                           const struct intel_crtc_state
> > *crtc_state);  void
> > intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> > +bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
> > bool
> > +intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
> 
> The usage is implemented in patch 8, patch 7 and 8 can be squashed
> together.

I'm fine squashing these. Just thought splitting made sense as they are
touching different source files.

BR,

Jouni Högander

> 
> Regards,
> Animesh
> 
> >  #endif
> > --
> > 2.34.1
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-06 15:37     ` Hogander, Jouni
@ 2024-06-07  9:59       ` Manna, Animesh
  2024-06-07 10:03         ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-07  9:59 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, June 6, 2024 9:08 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Kahola, Mika <mika.kahola@intel.com>
> Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead
> of frame lock status
> 
> On Thu, 2024-06-06 at 14:35 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > > Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status
> > > instead of frame lock status
> > >
> > > Currently Panel Replay status printout is printing frame lock
> > > status. It should print Panel Replay status instead. Panel Replay
> > > status register field follows PSR status register field. Use
> > > existing PSR code for that.
> > >
> > > Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for
> > > panel
> > > replay")
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++---------------
> > > --
> > >  1 file changed, 5 insertions(+), 17 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 7bdae0d0ea45..3530e5f44096 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -3579,16 +3579,9 @@ static int i915_psr_sink_status_show(struct
> > > seq_file *m, void *data)
> > >                 "reserved",
> > >                 "sink internal error",
> > >         };
> > > -       static const char * const panel_replay_status[] = {
> > > -               "Sink device frame is locked to the Source device",
> > > -               "Sink device is coasting, using the VTotal target",
> > > -               "Sink device is governing the frame rate (frame rate
> > > unlock is granted)",
> > > -               "Sink device in the process of re-locking with the
> > > Source device",
> > > -       };
> > >         const char *str;
> > >         int ret;
> > >         u8 status, error_status;
> > > -       u32 idx;
> > >
> > >         if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > >                 seq_puts(m, "PSR/Panel-Replay Unsupported\n"); @@
> > > -3602,16 +3595,11 @@ static int i915_psr_sink_status_show(struct
> > > seq_file *m, void *data)
> > >         if (ret)
> > >                 return ret;
> > >
> > > -       str = "unknown";
> > > -       if (intel_dp->psr.panel_replay_enabled) {
> > > -               idx = (status & DP_SINK_FRAME_LOCKED_MASK) >>
> > > DP_SINK_FRAME_LOCKED_SHIFT;
> > > -               if (idx < ARRAY_SIZE(panel_replay_status))
> > > -                       str = panel_replay_status[idx];
> > > -       } else if (intel_dp->psr.enabled) {
> > > -               idx = status & DP_PSR_SINK_STATE_MASK;
> > > -               if (idx < ARRAY_SIZE(sink_status))
> > > -                       str = sink_status[idx];
> > > -       }
> > > +       status &= DP_PSR_SINK_STATE_MASK;
> > > +       if (status < ARRAY_SIZE(sink_status))
> > > +               str = sink_status[status];
> > > +       else
> > > +               str = "unknown";
> >
> > psr_get_status_and_error_status() is returning frame-locked-status for
> > panel replay, Its different dpcd
> > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like psr.
> 
> Panel Replay STATUS ~= PSR STATUS if you look at description of the
> registers. Frame lock status is completely different thing. I don't understand
> why psr sink status debugfs interface should print frame lock status for Panel
> Replay?

If we do not want to print DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS the psr_get_status_and_error_status() need to be modified. Do you agree?

Regards,
Animesh 
> 
> BR,
> 
> Jouni Högander
> 
> >
> > Regards,
> > Animesh
> >
> > >
> > >         seq_printf(m, "Sink %s status: 0x%x [%s]\n",
> > > psr_mode_str(intel_dp), status, str);
> > >
> > > --
> > > 2.34.1
> >


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-07  9:59       ` Manna, Animesh
@ 2024-06-07 10:03         ` Hogander, Jouni
  2024-06-07 10:09           ` Manna, Animesh
  0 siblings, 1 reply; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-07 10:03 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Fri, 2024-06-07 at 09:59 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Thursday, June 6, 2024 9:08 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: Kahola, Mika <mika.kahola@intel.com>
> > Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > status instead
> > of frame lock status
> > 
> > On Thu, 2024-06-06 at 14:35 +0000, Manna, Animesh wrote:
> > > 
> > > 
> > > > -----Original Message-----
> > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > > To: intel-gfx@lists.freedesktop.org
> > > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > > <mika.kahola@intel.com>; Hogander, Jouni
> > > > <jouni.hogander@intel.com>
> > > > Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > > status
> > > > instead of frame lock status
> > > > 
> > > > Currently Panel Replay status printout is printing frame lock
> > > > status. It should print Panel Replay status instead. Panel
> > > > Replay
> > > > status register field follows PSR status register field. Use
> > > > existing PSR code for that.
> > > > 
> > > > Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for
> > > > panel
> > > > replay")
> > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++-----------
> > > > ----
> > > > --
> > > >  1 file changed, 5 insertions(+), 17 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 7bdae0d0ea45..3530e5f44096 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -3579,16 +3579,9 @@ static int
> > > > i915_psr_sink_status_show(struct
> > > > seq_file *m, void *data)
> > > >                 "reserved",
> > > >                 "sink internal error",
> > > >         };
> > > > -       static const char * const panel_replay_status[] = {
> > > > -               "Sink device frame is locked to the Source
> > > > device",
> > > > -               "Sink device is coasting, using the VTotal
> > > > target",
> > > > -               "Sink device is governing the frame rate (frame
> > > > rate
> > > > unlock is granted)",
> > > > -               "Sink device in the process of re-locking with
> > > > the
> > > > Source device",
> > > > -       };
> > > >         const char *str;
> > > >         int ret;
> > > >         u8 status, error_status;
> > > > -       u32 idx;
> > > > 
> > > >         if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
> > > > {
> > > >                 seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > > > @@
> > > > -3602,16 +3595,11 @@ static int
> > > > i915_psr_sink_status_show(struct
> > > > seq_file *m, void *data)
> > > >         if (ret)
> > > >                 return ret;
> > > > 
> > > > -       str = "unknown";
> > > > -       if (intel_dp->psr.panel_replay_enabled) {
> > > > -               idx = (status & DP_SINK_FRAME_LOCKED_MASK) >>
> > > > DP_SINK_FRAME_LOCKED_SHIFT;
> > > > -               if (idx < ARRAY_SIZE(panel_replay_status))
> > > > -                       str = panel_replay_status[idx];
> > > > -       } else if (intel_dp->psr.enabled) {
> > > > -               idx = status & DP_PSR_SINK_STATE_MASK;
> > > > -               if (idx < ARRAY_SIZE(sink_status))
> > > > -                       str = sink_status[idx];
> > > > -       }
> > > > +       status &= DP_PSR_SINK_STATE_MASK;
> > > > +       if (status < ARRAY_SIZE(sink_status))
> > > > +               str = sink_status[status];
> > > > +       else
> > > > +               str = "unknown";
> > > 
> > > psr_get_status_and_error_status() is returning frame-locked-
> > > status for
> > > panel replay, Its different dpcd
> > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like psr.
> > 
> > Panel Replay STATUS ~= PSR STATUS if you look at description of the
> > registers. Frame lock status is completely different thing. I don't
> > understand
> > why psr sink status debugfs interface should print frame lock
> > status for Panel
> > Replay?
> 
> If we do not want to print DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS
> the psr_get_status_and_error_status() need to be modified. Do you
> agree?

Yes, and this what I'm doing in this patch? Or can you elaborate a bit
what do you mean?

BR,

Jouni Högander
> 
> Regards,
> Animesh 
> > 
> > BR,
> > 
> > Jouni Högander
> > 
> > > 
> > > Regards,
> > > Animesh
> > > 
> > > > 
> > > >         seq_printf(m, "Sink %s status: 0x%x [%s]\n",
> > > > psr_mode_str(intel_dp), status, str);
> > > > 
> > > > --
> > > > 2.34.1
> > > 
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-07 10:03         ` Hogander, Jouni
@ 2024-06-07 10:09           ` Manna, Animesh
  2024-06-07 10:10             ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-07 10:09 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Friday, June 7, 2024 3:34 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Kahola, Mika <mika.kahola@intel.com>
> Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead
> of frame lock status
> 
> On Fri, 2024-06-07 at 09:59 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Thursday, June 6, 2024 9:08 PM
> > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > gfx@lists.freedesktop.org
> > > Cc: Kahola, Mika <mika.kahola@intel.com>
> > > Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > status instead of frame lock status
> > >
> > > On Thu, 2024-06-06 at 14:35 +0000, Manna, Animesh wrote:
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > > > To: intel-gfx@lists.freedesktop.org
> > > > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > > > <mika.kahola@intel.com>; Hogander, Jouni
> > > > > <jouni.hogander@intel.com>
> > > > > Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > > > status instead of frame lock status
> > > > >
> > > > > Currently Panel Replay status printout is printing frame lock
> > > > > status. It should print Panel Replay status instead. Panel
> > > > > Replay status register field follows PSR status register field.
> > > > > Use existing PSR code for that.
> > > > >
> > > > > Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for
> > > > > panel
> > > > > replay")
> > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++-----------
> > > > > ----
> > > > > --
> > > > >  1 file changed, 5 insertions(+), 17 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > index 7bdae0d0ea45..3530e5f44096 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > @@ -3579,16 +3579,9 @@ static int
> > > > > i915_psr_sink_status_show(struct seq_file *m, void *data)
> > > > >                 "reserved",
> > > > >                 "sink internal error",
> > > > >         };
> > > > > -       static const char * const panel_replay_status[] = {
> > > > > -               "Sink device frame is locked to the Source
> > > > > device",
> > > > > -               "Sink device is coasting, using the VTotal
> > > > > target",
> > > > > -               "Sink device is governing the frame rate (frame
> > > > > rate unlock is granted)",
> > > > > -               "Sink device in the process of re-locking with
> > > > > the Source device",
> > > > > -       };
> > > > >         const char *str;
> > > > >         int ret;
> > > > >         u8 status, error_status;
> > > > > -       u32 idx;
> > > > >
> > > > >         if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
> > > > > {
> > > > >                 seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > > > > @@
> > > > > -3602,16 +3595,11 @@ static int
> > > > > i915_psr_sink_status_show(struct seq_file *m, void *data)
> > > > >         if (ret)
> > > > >                 return ret;
> > > > >
> > > > > -       str = "unknown";
> > > > > -       if (intel_dp->psr.panel_replay_enabled) {
> > > > > -               idx = (status & DP_SINK_FRAME_LOCKED_MASK) >>
> > > > > DP_SINK_FRAME_LOCKED_SHIFT;
> > > > > -               if (idx < ARRAY_SIZE(panel_replay_status))
> > > > > -                       str = panel_replay_status[idx];
> > > > > -       } else if (intel_dp->psr.enabled) {
> > > > > -               idx = status & DP_PSR_SINK_STATE_MASK;
> > > > > -               if (idx < ARRAY_SIZE(sink_status))
> > > > > -                       str = sink_status[idx];
> > > > > -       }
> > > > > +       status &= DP_PSR_SINK_STATE_MASK;
> > > > > +       if (status < ARRAY_SIZE(sink_status))
> > > > > +               str = sink_status[status];
> > > > > +       else
> > > > > +               str = "unknown";
> > > >
> > > > psr_get_status_and_error_status() is returning frame-locked-
> > > > status for panel replay, Its different dpcd
> > > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like psr.
> > >
> > > Panel Replay STATUS ~= PSR STATUS if you look at description of the
> > > registers. Frame lock status is completely different thing. I don't
> > > understand why psr sink status debugfs interface should print frame
> > > lock status for Panel Replay?
> >
> > If we do not want to print
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS
> > the psr_get_status_and_error_status() need to be modified. Do you
> > agree?
> 
> Yes, and this what I'm doing in this patch? Or can you elaborate a bit what do
> you mean?

I do not see any change in psr_get_status_and_error_status() in this patch.
Just adding below the code-snippet where based on panel_replay_enabled flag offset is assigned to DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS.

static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
                                           u8 *status, u8 *error_status)
{
        struct drm_dp_aux *aux = &intel_dp->aux;
        int ret;
        unsigned int offset;

        offset = intel_dp->psr.panel_replay_enabled ?
                 DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS : DP_PSR_STATUS;

        ret = drm_dp_dpcd_readb(aux, offset, status);
        if (ret != 1)
                return ret;
...
...
...

Regards,
Animesh

> 
> BR,
> 
> Jouni Högander
> >
> > Regards,
> > Animesh
> > >
> > > BR,
> > >
> > > Jouni Högander
> > >
> > > >
> > > > Regards,
> > > > Animesh
> > > >
> > > > >
> > > > >         seq_printf(m, "Sink %s status: 0x%x [%s]\n",
> > > > > psr_mode_str(intel_dp), status, str);
> > > > >
> > > > > --
> > > > > 2.34.1
> > > >
> >


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-07 10:09           ` Manna, Animesh
@ 2024-06-07 10:10             ` Hogander, Jouni
  2024-06-07 10:53               ` Manna, Animesh
  0 siblings, 1 reply; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-07 10:10 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Fri, 2024-06-07 at 10:09 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Friday, June 7, 2024 3:34 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: Kahola, Mika <mika.kahola@intel.com>
> > Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > status instead
> > of frame lock status
> > 
> > On Fri, 2024-06-07 at 09:59 +0000, Manna, Animesh wrote:
> > > 
> > > 
> > > > -----Original Message-----
> > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > Sent: Thursday, June 6, 2024 9:08 PM
> > > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > > gfx@lists.freedesktop.org
> > > > Cc: Kahola, Mika <mika.kahola@intel.com>
> > > > Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > > status instead of frame lock status
> > > > 
> > > > On Thu, 2024-06-06 at 14:35 +0000, Manna, Animesh wrote:
> > > > > 
> > > > > 
> > > > > > -----Original Message-----
> > > > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > > > > To: intel-gfx@lists.freedesktop.org
> > > > > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > > > > <mika.kahola@intel.com>; Hogander, Jouni
> > > > > > <jouni.hogander@intel.com>
> > > > > > Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > > > > status instead of frame lock status
> > > > > > 
> > > > > > Currently Panel Replay status printout is printing frame
> > > > > > lock
> > > > > > status. It should print Panel Replay status instead. Panel
> > > > > > Replay status register field follows PSR status register
> > > > > > field.
> > > > > > Use existing PSR code for that.
> > > > > > 
> > > > > > Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support
> > > > > > for
> > > > > > panel
> > > > > > replay")
> > > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > > ---
> > > > > >  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++-------
> > > > > > ----
> > > > > > ----
> > > > > > --
> > > > > >  1 file changed, 5 insertions(+), 17 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > index 7bdae0d0ea45..3530e5f44096 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > @@ -3579,16 +3579,9 @@ static int
> > > > > > i915_psr_sink_status_show(struct seq_file *m, void *data)
> > > > > >                 "reserved",
> > > > > >                 "sink internal error",
> > > > > >         };
> > > > > > -       static const char * const panel_replay_status[] = {
> > > > > > -               "Sink device frame is locked to the Source
> > > > > > device",
> > > > > > -               "Sink device is coasting, using the VTotal
> > > > > > target",
> > > > > > -               "Sink device is governing the frame rate
> > > > > > (frame
> > > > > > rate unlock is granted)",
> > > > > > -               "Sink device in the process of re-locking
> > > > > > with
> > > > > > the Source device",
> > > > > > -       };
> > > > > >         const char *str;
> > > > > >         int ret;
> > > > > >         u8 status, error_status;
> > > > > > -       u32 idx;
> > > > > > 
> > > > > >         if (!(CAN_PSR(intel_dp) ||
> > > > > > CAN_PANEL_REPLAY(intel_dp)))
> > > > > > {
> > > > > >                 seq_puts(m, "PSR/Panel-Replay
> > > > > > Unsupported\n");
> > > > > > @@
> > > > > > -3602,16 +3595,11 @@ static int
> > > > > > i915_psr_sink_status_show(struct seq_file *m, void *data)
> > > > > >         if (ret)
> > > > > >                 return ret;
> > > > > > 
> > > > > > -       str = "unknown";
> > > > > > -       if (intel_dp->psr.panel_replay_enabled) {
> > > > > > -               idx = (status & DP_SINK_FRAME_LOCKED_MASK)
> > > > > > >>
> > > > > > DP_SINK_FRAME_LOCKED_SHIFT;
> > > > > > -               if (idx < ARRAY_SIZE(panel_replay_status))
> > > > > > -                       str = panel_replay_status[idx];
> > > > > > -       } else if (intel_dp->psr.enabled) {
> > > > > > -               idx = status & DP_PSR_SINK_STATE_MASK;
> > > > > > -               if (idx < ARRAY_SIZE(sink_status))
> > > > > > -                       str = sink_status[idx];
> > > > > > -       }
> > > > > > +       status &= DP_PSR_SINK_STATE_MASK;
> > > > > > +       if (status < ARRAY_SIZE(sink_status))
> > > > > > +               str = sink_status[status];
> > > > > > +       else
> > > > > > +               str = "unknown";
> > > > > 
> > > > > psr_get_status_and_error_status() is returning frame-locked-
> > > > > status for panel replay, Its different dpcd
> > > > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like psr.
> > > > 
> > > > Panel Replay STATUS ~= PSR STATUS if you look at description of
> > > > the
> > > > registers. Frame lock status is completely different thing. I
> > > > don't
> > > > understand why psr sink status debugfs interface should print
> > > > frame
> > > > lock status for Panel Replay?
> > > 
> > > If we do not want to print
> > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS
> > > the psr_get_status_and_error_status() need to be modified. Do you
> > > agree?
> > 
> > Yes, and this what I'm doing in this patch? Or can you elaborate a
> > bit what do
> > you mean?
> 
> I do not see any change in psr_get_status_and_error_status() in this
> patch.
> Just adding below the code-snippet where based on
> panel_replay_enabled flag offset is assigned to
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS.
> 
> static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
>                                            u8 *status, u8
> *error_status)
> {
>         struct drm_dp_aux *aux = &intel_dp->aux;
>         int ret;
>         unsigned int offset;
> 
>         offset = intel_dp->psr.panel_replay_enabled ?
>                  DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS :
> DP_PSR_STATUS;
> 
>         ret = drm_dp_dpcd_readb(aux, offset, status);
>         if (ret != 1)
>                 return ret;
> ...
> ...
> ...
> 

DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS contains two fields. "Sink
Device Panel Replay Status" and "SINK FRAME LOCKED". Currently we are
printing latter.   "SINK FRAME LOCKED" is not actually that much
related to psr status debugfs interface. This patch is changing the
interface to print out "Sink Device Panel Replay Status".

BR,

Jouni Högander

> Regards,
> Animesh
> 
> > 
> > BR,
> > 
> > Jouni Högander
> > > 
> > > Regards,
> > > Animesh
> > > > 
> > > > BR,
> > > > 
> > > > Jouni Högander
> > > > 
> > > > > 
> > > > > Regards,
> > > > > Animesh
> > > > > 
> > > > > > 
> > > > > >         seq_printf(m, "Sink %s status: 0x%x [%s]\n",
> > > > > > psr_mode_str(intel_dp), status, str);
> > > > > > 
> > > > > > --
> > > > > > 2.34.1
> > > > > 
> > > 
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
  2024-06-07 10:10             ` Hogander, Jouni
@ 2024-06-07 10:53               ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-07 10:53 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Friday, June 7, 2024 3:41 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Kahola, Mika <mika.kahola@intel.com>
> Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead
> of frame lock status
> 
> On Fri, 2024-06-07 at 10:09 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Friday, June 7, 2024 3:34 PM
> > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > gfx@lists.freedesktop.org
> > > Cc: Kahola, Mika <mika.kahola@intel.com>
> > > Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > status instead of frame lock status
> > >
> > > On Fri, 2024-06-07 at 09:59 +0000, Manna, Animesh wrote:
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > > Sent: Thursday, June 6, 2024 9:08 PM
> > > > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > > > gfx@lists.freedesktop.org
> > > > > Cc: Kahola, Mika <mika.kahola@intel.com>
> > > > > Subject: Re: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > > > status instead of frame lock status
> > > > >
> > > > > On Thu, 2024-06-06 at 14:35 +0000, Manna, Animesh wrote:
> > > > > >
> > > > > >
> > > > > > > -----Original Message-----
> > > > > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > > > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > > > > > To: intel-gfx@lists.freedesktop.org
> > > > > > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > > > > > <mika.kahola@intel.com>; Hogander, Jouni
> > > > > > > <jouni.hogander@intel.com>
> > > > > > > Subject: [PATCH v6 10/26] drm/i915/psr: Print Panel Replay
> > > > > > > status instead of frame lock status
> > > > > > >
> > > > > > > Currently Panel Replay status printout is printing frame
> > > > > > > lock status. It should print Panel Replay status instead.
> > > > > > > Panel Replay status register field follows PSR status
> > > > > > > register field.
> > > > > > > Use existing PSR code for that.
> > > > > > >
> > > > > > > Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support
> > > > > > > for panel
> > > > > > > replay")
> > > > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > > > ---
> > > > > > >  drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++-------
> > > > > > > ----
> > > > > > > ----
> > > > > > > --
> > > > > > >  1 file changed, 5 insertions(+), 17 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > > index 7bdae0d0ea45..3530e5f44096 100644
> > > > > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > > > @@ -3579,16 +3579,9 @@ static int
> > > > > > > i915_psr_sink_status_show(struct seq_file *m, void *data)
> > > > > > >                 "reserved",
> > > > > > >                 "sink internal error",
> > > > > > >         };
> > > > > > > -       static const char * const panel_replay_status[] = {
> > > > > > > -               "Sink device frame is locked to the Source
> > > > > > > device",
> > > > > > > -               "Sink device is coasting, using the VTotal
> > > > > > > target",
> > > > > > > -               "Sink device is governing the frame rate
> > > > > > > (frame rate unlock is granted)",
> > > > > > > -               "Sink device in the process of re-locking
> > > > > > > with the Source device",
> > > > > > > -       };
> > > > > > >         const char *str;
> > > > > > >         int ret;
> > > > > > >         u8 status, error_status;
> > > > > > > -       u32 idx;
> > > > > > >
> > > > > > >         if (!(CAN_PSR(intel_dp) ||
> > > > > > > CAN_PANEL_REPLAY(intel_dp))) {
> > > > > > >                 seq_puts(m, "PSR/Panel-Replay
> > > > > > > Unsupported\n"); @@
> > > > > > > -3602,16 +3595,11 @@ static int
> > > > > > > i915_psr_sink_status_show(struct seq_file *m, void *data)
> > > > > > >         if (ret)
> > > > > > >                 return ret;
> > > > > > >
> > > > > > > -       str = "unknown";
> > > > > > > -       if (intel_dp->psr.panel_replay_enabled) {
> > > > > > > -               idx = (status & DP_SINK_FRAME_LOCKED_MASK)
> > > > > > > >>
> > > > > > > DP_SINK_FRAME_LOCKED_SHIFT;
> > > > > > > -               if (idx < ARRAY_SIZE(panel_replay_status))
> > > > > > > -                       str = panel_replay_status[idx];
> > > > > > > -       } else if (intel_dp->psr.enabled) {
> > > > > > > -               idx = status & DP_PSR_SINK_STATE_MASK;
> > > > > > > -               if (idx < ARRAY_SIZE(sink_status))
> > > > > > > -                       str = sink_status[idx];
> > > > > > > -       }
> > > > > > > +       status &= DP_PSR_SINK_STATE_MASK;
> > > > > > > +       if (status < ARRAY_SIZE(sink_status))
> > > > > > > +               str = sink_status[status];
> > > > > > > +       else
> > > > > > > +               str = "unknown";
> > > > > >
> > > > > > psr_get_status_and_error_status() is returning frame-locked-
> > > > > > status for panel replay, Its different dpcd
> > > > > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, not same like
> psr.
> > > > >
> > > > > Panel Replay STATUS ~= PSR STATUS if you look at description of
> > > > > the registers. Frame lock status is completely different thing.
> > > > > I don't understand why psr sink status debugfs interface should
> > > > > print frame lock status for Panel Replay?
> > > >
> > > > If we do not want to print
> > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS
> > > > the psr_get_status_and_error_status() need to be modified. Do you
> > > > agree?
> > >
> > > Yes, and this what I'm doing in this patch? Or can you elaborate a
> > > bit what do you mean?
> >
> > I do not see any change in psr_get_status_and_error_status() in this
> > patch.
> > Just adding below the code-snippet where based on panel_replay_enabled
> > flag offset is assigned to DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS.
> >
> > static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
> >                                            u8 *status, u8
> > *error_status)
> > {
> >         struct drm_dp_aux *aux = &intel_dp->aux;
> >         int ret;
> >         unsigned int offset;
> >
> >         offset = intel_dp->psr.panel_replay_enabled ?
> >                  DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS :
> > DP_PSR_STATUS;
> >
> >         ret = drm_dp_dpcd_readb(aux, offset, status);
> >         if (ret != 1)
> >                 return ret;
> > ...
> > ...
> > ...
> >
> 
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS contains two fields. "Sink
> Device Panel Replay Status" and "SINK FRAME LOCKED". Currently we are
> printing latter.   "SINK FRAME LOCKED" is not actually that much
> related to psr status debugfs interface. This patch is changing the interface to
> print out "Sink Device Panel Replay Status".

Thanks for clarifying, the name of DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS confused me.
No objection from myside.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

Regards,
Animesh

> 
> BR,
> 
> Jouni Högander
> 
> > Regards,
> > Animesh
> >
> > >
> > > BR,
> > >
> > > Jouni Högander
> > > >
> > > > Regards,
> > > > Animesh
> > > > >
> > > > > BR,
> > > > >
> > > > > Jouni Högander
> > > > >
> > > > > >
> > > > > > Regards,
> > > > > > Animesh
> > > > > >
> > > > > > >
> > > > > > >         seq_printf(m, "Sink %s status: 0x%x [%s]\n",
> > > > > > > psr_mode_str(intel_dp), status, str);
> > > > > > >
> > > > > > > --
> > > > > > > 2.34.1
> > > > > >
> > > >
> >


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
  2024-06-06 15:41     ` Hogander, Jouni
@ 2024-06-07 11:09       ` Manna, Animesh
  2024-06-07 13:19         ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Manna, Animesh @ 2024-06-07 11:09 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, June 6, 2024 9:12 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Kahola, Mika <mika.kahola@intel.com>
> Subject: Re: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to
> separate function
> 
> On Thu, 2024-06-06 at 14:58 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > > Subject: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to
> > > separate function
> > >
> > > We are about to add more complexity to vblank length check. It makes
> > > sense to move it to separate function for sake of clarity.
> > >
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 18 +++++++++++++++---
> > >  1 file changed, 15 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 3530e5f44096..23c3fed1f983 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1243,6 +1243,20 @@ static int
> > > intel_psr_entry_setup_frames(struct
> > > intel_dp *intel_dp,
> > >         return entry_setup_frames;
> > >  }
> > >
> > > +static bool vblank_length_valid(struct intel_dp *intel_dp,
> > > +                               const struct intel_crtc_state
> > > *crtc_state) {
> >
> > As this function specific to psr2, maybe good to have name as
> > psr2_vblank_length_valid(). Otherwise the changes looks ok to me.
> 
> Please check patch 19. That is actually moving this to be common for Panel
> Replay and PSR.

How about su_vblank_length_valid() ? this function is specific to psr2/pr and the name sounds generic to me.

Regards,
Animesh

> 
> BR,
> 
> Jouni Högander
> 
> >
> > Regards,
> > Animesh
> > > +       int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
> > > +               crtc_state->hw.adjusted_mode.crtc_vblank_start;
> > > +       int wake_lines = psr2_block_count_lines(intel_dp);
> > > +
> > > +       /* Vblank >= PSR2_CTL Block Count Number maximum line count
> > > */
> > > +       if (vblank < wake_lines)
> > > +               return false;
> > > +
> > > +       return true;
> > > +}
> > > +
> > >  static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> > >                                     struct intel_crtc_state
> > > *crtc_state)  { @@ -
> > > 1333,9 +1347,7 @@ static bool intel_psr2_config_valid(struct
> > > intel_dp *intel_dp,
> > >         }
> > >
> > >         /* Vblank >= PSR2_CTL Block Count Number maximum line count
> > > */
> > > -       if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
> > > -           crtc_state->hw.adjusted_mode.crtc_vblank_start <
> > > -           psr2_block_count_lines(intel_dp)) {
> > > +       if (!vblank_length_valid(intel_dp, crtc_state)) {
> > >                 drm_dbg_kms(&dev_priv->drm,
> > >                             "PSR2 not enabled, too short vblank
> > > time\n");
> > >                 return false;
> > > --
> > > 2.34.1
> >


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay
  2024-06-06 15:47     ` Hogander, Jouni
@ 2024-06-07 11:14       ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-07 11:14 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, June 6, 2024 9:18 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Kahola, Mika <mika.kahola@intel.com>
> Subject: Re: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time
> for Panel Replay
> 
> On Thu, 2024-06-06 at 13:26 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > > Subject: [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake
> > > time for Panel Replay
> > >
> > > When checking vblank length used wake time is aux less wake time for
> > > eDP Panel Replay (vblank length is not checked for DP2.0 Panel
> > > Replay).
> > >
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++++--
> > >  1 file changed, 6 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index c9fcb25184ee..ccb7c022e364 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1251,8 +1251,12 @@ static bool vblank_length_valid(struct
> > > intel_dp *intel_dp,
> > >                 crtc_state->hw.adjusted_mode.crtc_vblank_start;
> > >         int wake_lines;
> > >
> > > -       wake_lines = DISPLAY_VER(i915) < 20 ?
> > > psr2_block_count_lines(intel_dp) :
> > > -               intel_dp->alpm_parameters.io_wake_lines;
> > > +       if (crtc_state->has_panel_replay)
> > > +               wake_lines = intel_dp-
> > > > alpm_parameters.aux_less_wake_lines;
> >
> > Existing code can take care for EDP panel replay as EDP panel replay
> > is supported from LNL onwards.
> > Not sure why this change is needed.
> 
> Panel Replay eDP --> aux less wake lines is used for the check
> 
> LunarLake PSR2 --> io wake lines is used for the check
> 
> Prior LunarLake PSR2 --> psr2_block_count_lines is used for the check
> 
> Existing code is taking care of last two cases. Change is taking care of the first
> one.

Got it, thanks for clarifying.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> 
> BR,
> 
> Jouni Högander
> 
> >
> > Regards,
> > Animesh
> >
> > > +       else
> > > +               wake_lines = DISPLAY_VER(i915) < 20 ?
> > > +                       psr2_block_count_lines(intel_dp) :
> > > +                       intel_dp->alpm_parameters.io_wake_lines;
> > >
> > >         if (crtc_state->req_psr2_sdp_prior_scanline)
> > >                 vblank -= 1;
> > > --
> > > 2.34.1
> >


^ permalink raw reply	[flat|nested] 57+ messages in thread

* RE: [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay
  2024-06-05 10:25 ` [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay Jouni Högander
@ 2024-06-07 11:59   ` Manna, Animesh
  0 siblings, 0 replies; 57+ messages in thread
From: Manna, Animesh @ 2024-06-07 11:59 UTC (permalink / raw)
  To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, June 5, 2024 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel
> Replay
> 
> Current intel_psr_enable_sink is a mess due to partly reusing PSR bit
> definitions for Panel Replay. Even thought PSR and Panel Replay enable
> registers do have common bits they still have also different bits and same
> bits with different meaning. For sake of clarity split enabling sink to PSR and
> Panel Replay specific parts.
> 
> Also fix issue caused by using psr->panel_replay_enabled to early.
> 
> Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink")
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 81 +++++++++++++-----------
>  1 file changed, 44 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4a4124a92a0d..3cc38ba2f954 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -686,56 +686,62 @@ static bool psr2_su_region_et_valid(struct intel_dp
> *intel_dp)
>  	return false;
>  }
> 
> -static unsigned int intel_psr_get_enable_sink_offset(struct intel_dp
> *intel_dp)
> +static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
> +				     const struct intel_crtc_state *crtc_state)
>  {
> -	return intel_dp->psr.panel_replay_enabled ?
> -		PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG;
> +	u8 val = DP_PANEL_REPLAY_ENABLE |
> +		DP_PANEL_REPLAY_VSC_SDP_CRC_EN |
> +		DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
> +		DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN |
> +		DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN;
> +
> +	if (crtc_state->has_sel_update)
> +		val |= DP_PANEL_REPLAY_SU_ENABLE;
> +
> +	if (crtc_state->enable_psr2_su_region_et)
> +		val |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET;
> +
> +	drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG, val);
>  }
> 
> -/*
> - * Note: Most of the bits are same in PANEL_REPLAY_CONFIG and
> DP_PSR_EN_CFG. We
> - * are relying on PSR definitions on these "common" bits.
> - */
> -void intel_psr_enable_sink(struct intel_dp *intel_dp,
> -			   const struct intel_crtc_state *crtc_state)
> +static void _psr_enable_sink(struct intel_dp *intel_dp,
> +			    const struct intel_crtc_state *crtc_state)
>  {
> -	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	u8 dpcd_val = DP_PSR_ENABLE;
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 val = DP_PSR_ENABLE;
> 
>  	if (crtc_state->has_sel_update) {
> -		/* Enable ALPM at sink for psr2 */
> -		if (!crtc_state->has_panel_replay) {
> -			drm_dp_dpcd_writeb(&intel_dp->aux,
> -					   DP_RECEIVER_ALPM_CONFIG,
> -					   DP_ALPM_ENABLE |
> -
> DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> -
> -			if (crtc_state->enable_psr2_su_region_et)
> -				dpcd_val |=
> DP_PSR_ENABLE_SU_REGION_ET;
> -		}
> -
> -		dpcd_val |= DP_PSR_ENABLE_PSR2 |
> DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
> +		val |= DP_PSR_ENABLE_PSR2 |
> DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
>  	} else {
>  		if (intel_dp->psr.link_standby)
> -			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
> +			val |= DP_PSR_MAIN_LINK_ACTIVE;
> 
> -		if (!crtc_state->has_panel_replay && DISPLAY_VER(dev_priv)
> >= 8)
> -			dpcd_val |= DP_PSR_CRC_VERIFICATION;
> +		if (DISPLAY_VER(i915) >= 8)
> +			val |= DP_PSR_CRC_VERIFICATION;
>  	}
> 
> -	if (crtc_state->has_panel_replay)
> -		dpcd_val |=
> DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
> -			DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN;
> -
> -	if (crtc_state->req_psr2_sdp_prior_scanline)
> -		dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE;
> +	if (crtc_state->enable_psr2_su_region_et)
> +		val |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET;
> 
>  	if (intel_dp->psr.entry_setup_frames > 0)
> -		dpcd_val |= DP_PSR_FRAME_CAPTURE;
> +		val |= DP_PSR_FRAME_CAPTURE;
> 
> -	drm_dp_dpcd_writeb(&intel_dp->aux,
> -			   intel_psr_get_enable_sink_offset(intel_dp),
> -			   dpcd_val);
> +	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val); }
> +
> +void intel_psr_enable_sink(struct intel_dp *intel_dp,
> +			   const struct intel_crtc_state *crtc_state) {
> +	/* Enable ALPM at sink for psr2 */
> +	if (!crtc_state->has_panel_replay && crtc_state->has_sel_update)
> +		drm_dp_dpcd_writeb(&intel_dp->aux,
> +				   DP_RECEIVER_ALPM_CONFIG,
> +				   DP_ALPM_ENABLE |
> +
> DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> +
> +	crtc_state->has_panel_replay ?
> +		_panel_replay_enable_sink(intel_dp, crtc_state) :
> +		_psr_enable_sink(intel_dp, crtc_state);
> 
>  	if (intel_dp_is_edp(intel_dp))
>  		drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
> DP_SET_POWER_D0); @@ -1920,7 +1926,8 @@ static void
> intel_psr_disable_locked(struct intel_dp *intel_dp)
> 
>  	/* Disable PSR on Sink */
>  	drm_dp_dpcd_writeb(&intel_dp->aux,
> -			   intel_psr_get_enable_sink_offset(intel_dp), 0);
> +			   intel_dp->psr.panel_replay_enabled ?
> +			   PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG, 0);
> 
>  	if (!intel_dp->psr.panel_replay_enabled &&
>  	    intel_dp->psr.sel_update_enabled)
> --
> 2.34.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
  2024-06-07 11:09       ` Manna, Animesh
@ 2024-06-07 13:19         ` Hogander, Jouni
  2024-06-07 13:37           ` Hogander, Jouni
  0 siblings, 1 reply; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-07 13:19 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Fri, 2024-06-07 at 11:09 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Thursday, June 6, 2024 9:12 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: Kahola, Mika <mika.kahola@intel.com>
> > Subject: Re: [PATCH v6 11/26] drm/i915/psr: Move vblank length
> > check to
> > separate function
> > 
> > On Thu, 2024-06-06 at 14:58 +0000, Manna, Animesh wrote:
> > > 
> > > 
> > > > -----Original Message-----
> > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > > To: intel-gfx@lists.freedesktop.org
> > > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > > <mika.kahola@intel.com>; Hogander, Jouni
> > > > <jouni.hogander@intel.com>
> > > > Subject: [PATCH v6 11/26] drm/i915/psr: Move vblank length
> > > > check to
> > > > separate function
> > > > 
> > > > We are about to add more complexity to vblank length check. It
> > > > makes
> > > > sense to move it to separate function for sake of clarity.
> > > > 
> > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_psr.c | 18 +++++++++++++++-
> > > > --
> > > >  1 file changed, 15 insertions(+), 3 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 3530e5f44096..23c3fed1f983 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -1243,6 +1243,20 @@ static int
> > > > intel_psr_entry_setup_frames(struct
> > > > intel_dp *intel_dp,
> > > >         return entry_setup_frames;
> > > >  }
> > > > 
> > > > +static bool vblank_length_valid(struct intel_dp *intel_dp,
> > > > +                               const struct intel_crtc_state
> > > > *crtc_state) {
> > > 
> > > As this function specific to psr2, maybe good to have name as
> > > psr2_vblank_length_valid(). Otherwise the changes looks ok to me.
> > 
> > Please check patch 19. That is actually moving this to be common
> > for Panel
> > Replay and PSR.
> 
> How about su_vblank_length_valid() ? this function is specific to
> psr2/pr and the name sounds generic to me.

Ok, I will try to figure out something else...

BR,

Jouni Högander

> 
> Regards,
> Animesh
> 
> > 
> > BR,
> > 
> > Jouni Högander
> > 
> > > 
> > > Regards,
> > > Animesh
> > > > +       int vblank = crtc_state-
> > > > >hw.adjusted_mode.crtc_vblank_end -
> > > > +               crtc_state->hw.adjusted_mode.crtc_vblank_start;
> > > > +       int wake_lines = psr2_block_count_lines(intel_dp);
> > > > +
> > > > +       /* Vblank >= PSR2_CTL Block Count Number maximum line
> > > > count
> > > > */
> > > > +       if (vblank < wake_lines)
> > > > +               return false;
> > > > +
> > > > +       return true;
> > > > +}
> > > > +
> > > >  static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> > > >                                     struct intel_crtc_state
> > > > *crtc_state)  { @@ -
> > > > 1333,9 +1347,7 @@ static bool intel_psr2_config_valid(struct
> > > > intel_dp *intel_dp,
> > > >         }
> > > > 
> > > >         /* Vblank >= PSR2_CTL Block Count Number maximum line
> > > > count
> > > > */
> > > > -       if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
> > > > -           crtc_state->hw.adjusted_mode.crtc_vblank_start <
> > > > -           psr2_block_count_lines(intel_dp)) {
> > > > +       if (!vblank_length_valid(intel_dp, crtc_state)) {
> > > >                 drm_dbg_kms(&dev_priv->drm,
> > > >                             "PSR2 not enabled, too short vblank
> > > > time\n");
> > > >                 return false;
> > > > --
> > > > 2.34.1
> > > 
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
  2024-06-07 13:19         ` Hogander, Jouni
@ 2024-06-07 13:37           ` Hogander, Jouni
  0 siblings, 0 replies; 57+ messages in thread
From: Hogander, Jouni @ 2024-06-07 13:37 UTC (permalink / raw)
  To: Manna, Animesh, intel-gfx@lists.freedesktop.org; +Cc: Kahola, Mika

On Fri, 2024-06-07 at 16:19 +0300, Hogander, Jouni wrote:
> On Fri, 2024-06-07 at 11:09 +0000, Manna, Animesh wrote:
> > 
> > 
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Thursday, June 6, 2024 9:12 PM
> > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > gfx@lists.freedesktop.org
> > > Cc: Kahola, Mika <mika.kahola@intel.com>
> > > Subject: Re: [PATCH v6 11/26] drm/i915/psr: Move vblank length
> > > check to
> > > separate function
> > > 
> > > On Thu, 2024-06-06 at 14:58 +0000, Manna, Animesh wrote:
> > > > 
> > > > 
> > > > > -----Original Message-----
> > > > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > > > Sent: Wednesday, June 5, 2024 3:56 PM
> > > > > To: intel-gfx@lists.freedesktop.org
> > > > > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > > > > <mika.kahola@intel.com>; Hogander, Jouni
> > > > > <jouni.hogander@intel.com>
> > > > > Subject: [PATCH v6 11/26] drm/i915/psr: Move vblank length
> > > > > check to
> > > > > separate function
> > > > > 
> > > > > We are about to add more complexity to vblank length check.
> > > > > It
> > > > > makes
> > > > > sense to move it to separate function for sake of clarity.
> > > > > 
> > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/display/intel_psr.c | 18
> > > > > +++++++++++++++-
> > > > > --
> > > > >  1 file changed, 15 insertions(+), 3 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > index 3530e5f44096..23c3fed1f983 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > > @@ -1243,6 +1243,20 @@ static int
> > > > > intel_psr_entry_setup_frames(struct
> > > > > intel_dp *intel_dp,
> > > > >         return entry_setup_frames;
> > > > >  }
> > > > > 
> > > > > +static bool vblank_length_valid(struct intel_dp *intel_dp,
> > > > > +                               const struct intel_crtc_state
> > > > > *crtc_state) {
> > > > 
> > > > As this function specific to psr2, maybe good to have name as
> > > > psr2_vblank_length_valid(). Otherwise the changes looks ok to
> > > > me.
> > > 
> > > Please check patch 19. That is actually moving this to be common
> > > for Panel
> > > Replay and PSR.
> > 
> > How about su_vblank_length_valid() ? this function is specific to
> > psr2/pr and the name sounds generic to me.
> 
> Ok, I will try to figure out something else...

This actually revealed that patch 19 is wrong. This is not SU specific.
We should check this for eDP PR full frame update as well. I will take
care of fixing patch 19. Here I will change name to
wake_lines_fit_into_vblank.

BR,

Jouni Högander

> 
> BR,
> 
> Jouni Högander
> 
> > 
> > Regards,
> > Animesh
> > 
> > > 
> > > BR,
> > > 
> > > Jouni Högander
> > > 
> > > > 
> > > > Regards,
> > > > Animesh
> > > > > +       int vblank = crtc_state-
> > > > > > hw.adjusted_mode.crtc_vblank_end -
> > > > > +               crtc_state-
> > > > > >hw.adjusted_mode.crtc_vblank_start;
> > > > > +       int wake_lines = psr2_block_count_lines(intel_dp);
> > > > > +
> > > > > +       /* Vblank >= PSR2_CTL Block Count Number maximum line
> > > > > count
> > > > > */
> > > > > +       if (vblank < wake_lines)
> > > > > +               return false;
> > > > > +
> > > > > +       return true;
> > > > > +}
> > > > > +
> > > > >  static bool intel_psr2_config_valid(struct intel_dp
> > > > > *intel_dp,
> > > > >                                     struct intel_crtc_state
> > > > > *crtc_state)  { @@ -
> > > > > 1333,9 +1347,7 @@ static bool intel_psr2_config_valid(struct
> > > > > intel_dp *intel_dp,
> > > > >         }
> > > > > 
> > > > >         /* Vblank >= PSR2_CTL Block Count Number maximum line
> > > > > count
> > > > > */
> > > > > -       if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
> > > > > -           crtc_state->hw.adjusted_mode.crtc_vblank_start <
> > > > > -           psr2_block_count_lines(intel_dp)) {
> > > > > +       if (!vblank_length_valid(intel_dp, crtc_state)) {
> > > > >                 drm_dbg_kms(&dev_priv->drm,
> > > > >                             "PSR2 not enabled, too short
> > > > > vblank
> > > > > time\n");
> > > > >                 return false;
> > > > > --
> > > > > 2.34.1
> > > > 
> > 
> 


^ permalink raw reply	[flat|nested] 57+ messages in thread

end of thread, other threads:[~2024-06-07 13:37 UTC | newest]

Thread overview: 57+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-06-05 10:25 [PATCH v6 00/26] Panel Replay eDP support Jouni Högander
2024-06-05 10:25 ` [PATCH v6 01/26] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time Jouni Högander
2024-06-06  8:47   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 02/26] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL Jouni Högander
2024-06-06  9:41   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 03/26] drm/i915/display: Take panel replay into account in vsc sdp unpacking Jouni Högander
2024-06-06  9:59   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 04/26] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes Jouni Högander
2024-06-06 13:02   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 05/26] drm/display: Add missing Panel Replay Enable SU Region ET bit Jouni Högander
2024-06-06 13:04   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay Jouni Högander
2024-06-07 11:59   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 07/26] drm/i915/alpm: Make alpm support checks non-static Jouni Högander
2024-06-06 14:44   ` Manna, Animesh
2024-06-06 15:49     ` Hogander, Jouni
2024-06-05 10:25 ` [PATCH v6 08/26] drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local variable Jouni Högander
2024-06-05 10:25 ` [PATCH v6 09/26] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid Jouni Högander
2024-06-06 15:01   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status Jouni Högander
2024-06-06 14:35   ` Manna, Animesh
2024-06-06 15:37     ` Hogander, Jouni
2024-06-07  9:59       ` Manna, Animesh
2024-06-07 10:03         ` Hogander, Jouni
2024-06-07 10:09           ` Manna, Animesh
2024-06-07 10:10             ` Hogander, Jouni
2024-06-07 10:53               ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function Jouni Högander
2024-06-06 14:58   ` Manna, Animesh
2024-06-06 15:41     ` Hogander, Jouni
2024-06-07 11:09       ` Manna, Animesh
2024-06-07 13:19         ` Hogander, Jouni
2024-06-07 13:37           ` Hogander, Jouni
2024-06-05 10:25 ` [PATCH v6 12/26] drm/i915/psr: Take into account SU SDP scanline indication in vblank check Jouni Högander
2024-06-06 15:02   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 13/26] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake Jouni Högander
2024-06-06 14:55   ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay Jouni Högander
2024-06-06 13:26   ` Manna, Animesh
2024-06-06 15:47     ` Hogander, Jouni
2024-06-07 11:14       ` Manna, Animesh
2024-06-05 10:25 ` [PATCH v6 15/26] drm/i915/psr: Check panel ALPM capability for eDP " Jouni Högander
2024-06-05 10:25 ` [PATCH v6 16/26] drm/i915/psr: Inform Panel Replay source support on eDP as well Jouni Högander
2024-06-05 10:25 ` [PATCH v6 17/26] drm/i915/psr: enable sink for eDP1.5 Panel Replay Jouni Högander
2024-06-05 10:25 ` [PATCH v6 18/26] drm/i915/psr: Check panel Early Transport capability for eDP PR Jouni Högander
2024-06-05 10:25 ` [PATCH v6 19/26] drm/i915/psr: Perfrom psr2 checks related to ALPM for Panel Replay Jouni Högander
2024-06-05 10:25 ` [PATCH v6 20/26] drm/i915/psr: Add Panel Replay compute_config helper Jouni Högander
2024-06-05 10:25 ` [PATCH v6 21/26] drm/i915/psr: 128b/132b Panel Replay is not supported on eDP Jouni Högander
2024-06-05 10:25 ` [PATCH v6 22/26] drm/i915/psr: HW will not allow PR on eDP when HDCP enabled Jouni Högander
2024-06-05 10:25 ` [PATCH v6 23/26] drm/i915/psr: Check Early Transport for Panel Replay as well Jouni Högander
2024-06-05 10:25 ` [PATCH v6 24/26] drm/i915/psr: Modify dg2_activate_panel_replay to support eDP Jouni Högander
2024-06-05 10:25 ` [PATCH v6 25/26] drm/i915/psr: Add new debug bit to disable Panel Replay Jouni Högander
2024-06-05 10:25 ` [PATCH v6 26/26] Revert "drm/i915/psr: Disable early transport by default" Jouni Högander
2024-06-05 13:42 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP support (rev7) Patchwork
2024-06-05 13:42 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-05 13:50 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-05 17:32 ` ✗ Fi.CI.IGT: failure " Patchwork

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