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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com
Subject: [PATCH v16 7/9] drm/i915/display: Compute Adaptive sync SDP params
Date: Mon, 10 Jun 2024 12:52:00 +0530	[thread overview]
Message-ID: <20240610072203.24956-8-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20240610072203.24956-1-mitulkumar.ajitkumar.golani@intel.com>

Compute params for Adaptive Sync SDP when Fixed Average Vtotal
mode is enabled.

--v2:
Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit).

--v3:
- Since vrr.enable is set in case of cmrr also, handle
accordingly(Ankit).
- check cmrr.enable when CMRR flags are set during intel_dp_compute_as_sdp.

--v4:
- Use drm_mode_vrefresh instead of manual calculation (Ankit).

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ac81b172b1ec..b5915c23302f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2637,11 +2637,19 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
 	/* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */
 	as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC;
 	as_sdp->length = 0x9;
-	as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL;
-	as_sdp->vtotal = adjusted_mode->vtotal;
-	as_sdp->target_rr = 0;
 	as_sdp->duration_incr_ms = 0;
 	as_sdp->duration_incr_ms = 0;
+
+	if (crtc_state->cmrr.enable) {
+		as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED;
+		as_sdp->vtotal = adjusted_mode->vtotal;
+		as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode);
+		as_sdp->target_rr_divider = true;
+	} else {
+		as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL;
+		as_sdp->vtotal = adjusted_mode->vtotal;
+		as_sdp->target_rr = 0;
+	}
 }
 
 static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
-- 
2.45.2


  parent reply	other threads:[~2024-06-10  7:22 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-10  7:21 [PATCH v16 0/9] Implement CMRR Support Mitul Golani
2024-06-10  7:21 ` [PATCH v16 1/9] drm/i915: Update indentation for VRR registers and bits Mitul Golani
2024-06-10  7:21 ` [PATCH v16 2/9] drm/i915: Separate VRR related register definitions Mitul Golani
2024-06-11  2:57   ` Murthy, Arun R
2024-06-10  7:21 ` [PATCH v16 3/9] drm/i915: Define and compute Transcoder CMRR registers Mitul Golani
2024-06-10  7:21 ` [PATCH v16 4/9] drm/i915: Update trans_vrr_ctl flag when cmrr is computed Mitul Golani
2024-06-10  7:21 ` [PATCH v16 5/9] drm/dp: Add refresh rate divider to struct representing AS SDP Mitul Golani
2024-06-10  7:21 ` [PATCH v16 6/9] drm/i915/display: Add support for pack and unpack Mitul Golani
2024-06-10  7:22 ` Mitul Golani [this message]
2024-06-10  7:22 ` [PATCH v16 8/9] drm/i915/display: Compute vrr vsync params Mitul Golani
2024-06-10  7:22 ` [PATCH v16 9/9] drm/i915: Compute CMRR and calculate vtotal Mitul Golani
2024-06-19 15:42   ` Nathan Chancellor
2024-06-19 18:10     ` Golani, Mitulkumar Ajitkumar
2024-06-19 18:26       ` Nathan Chancellor
2024-06-20 10:05         ` Golani, Mitulkumar Ajitkumar
2024-06-20 12:59           ` Jani Nikula
2024-06-20 14:15             ` Nathan Chancellor
2024-06-10  7:57 ` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev17) Patchwork
2024-06-10  7:57 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-10  8:04 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-10  9:16 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-06-10 10:49 ` ✓ Fi.CI.IGT: success " Patchwork

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