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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com
Subject: [PATCH v16 8/9] drm/i915/display: Compute vrr vsync params
Date: Mon, 10 Jun 2024 12:52:01 +0530	[thread overview]
Message-ID: <20240610072203.24956-9-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20240610072203.24956-1-mitulkumar.ajitkumar.golani@intel.com>

Compute vrr vsync params in case of FAVT as well instead of
only to AVT mode of operation.

--v2:
- Remove redundant computation for vrr_vsync_start
and vrr_vsync_end(Ankit).

--v3:
- vrr.enable and cmrr.enable check together is not required as both
will be true at the same point in time. (Ankit)
- Replace vrr.enable flag to cmrr.enable, mistakenly added. (Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 19b364074de0..4ad99a54aa83 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -175,14 +175,15 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 	if (crtc_state->uapi.vrr_enabled) {
 		crtc_state->vrr.enable = true;
 		crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
-		if (intel_dp_as_sdp_supported(intel_dp)) {
-			crtc_state->vrr.vsync_start =
-				(crtc_state->hw.adjusted_mode.crtc_vtotal -
-					crtc_state->hw.adjusted_mode.vsync_start);
-			crtc_state->vrr.vsync_end =
-				(crtc_state->hw.adjusted_mode.crtc_vtotal -
-					crtc_state->hw.adjusted_mode.vsync_end);
-		}
+	}
+
+	if (intel_dp_as_sdp_supported(intel_dp)) {
+		crtc_state->vrr.vsync_start =
+			(crtc_state->hw.adjusted_mode.crtc_vtotal -
+			 crtc_state->hw.adjusted_mode.vsync_start);
+		crtc_state->vrr.vsync_end =
+			(crtc_state->hw.adjusted_mode.crtc_vtotal -
+			 crtc_state->hw.adjusted_mode.vsync_end);
 	}
 }
 
-- 
2.45.2


  parent reply	other threads:[~2024-06-10  7:22 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-10  7:21 [PATCH v16 0/9] Implement CMRR Support Mitul Golani
2024-06-10  7:21 ` [PATCH v16 1/9] drm/i915: Update indentation for VRR registers and bits Mitul Golani
2024-06-10  7:21 ` [PATCH v16 2/9] drm/i915: Separate VRR related register definitions Mitul Golani
2024-06-11  2:57   ` Murthy, Arun R
2024-06-10  7:21 ` [PATCH v16 3/9] drm/i915: Define and compute Transcoder CMRR registers Mitul Golani
2024-06-10  7:21 ` [PATCH v16 4/9] drm/i915: Update trans_vrr_ctl flag when cmrr is computed Mitul Golani
2024-06-10  7:21 ` [PATCH v16 5/9] drm/dp: Add refresh rate divider to struct representing AS SDP Mitul Golani
2024-06-10  7:21 ` [PATCH v16 6/9] drm/i915/display: Add support for pack and unpack Mitul Golani
2024-06-10  7:22 ` [PATCH v16 7/9] drm/i915/display: Compute Adaptive sync SDP params Mitul Golani
2024-06-10  7:22 ` Mitul Golani [this message]
2024-06-10  7:22 ` [PATCH v16 9/9] drm/i915: Compute CMRR and calculate vtotal Mitul Golani
2024-06-19 15:42   ` Nathan Chancellor
2024-06-19 18:10     ` Golani, Mitulkumar Ajitkumar
2024-06-19 18:26       ` Nathan Chancellor
2024-06-20 10:05         ` Golani, Mitulkumar Ajitkumar
2024-06-20 12:59           ` Jani Nikula
2024-06-20 14:15             ` Nathan Chancellor
2024-06-10  7:57 ` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev17) Patchwork
2024-06-10  7:57 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-10  8:04 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-10  9:16 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-06-10 10:49 ` ✓ Fi.CI.IGT: success " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2024-03-07  5:53 [PATCH v16 0/9] Enable Adaptive Sync SDP Support for DP Mitul Golani
2024-03-07  5:53 ` [PATCH v16 8/9] drm/i915/display: Compute vrr_vsync params Mitul Golani
2024-03-08  6:47   ` Nautiyal, Ankit K

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