From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Sagar Ghuge <sagar.ghuge@intel.com>,
Nanley Chery <nanley.g.chery@intel.com>,
Xi Ruoyao <xry111@xry111.site>
Subject: [PATCH 2/4] drm/i915/fb: Add debug spew for misaligned CC plane
Date: Fri, 29 Nov 2024 08:50:12 +0200 [thread overview]
Message-ID: <20241129065014.8363-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20241129065014.8363-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're currently failing to provide any debug output when the
user passes in a misaligned offset for the clear color plane.
Add some debugs prints to make debugging actually possible.
Cc: Sagar Ghuge <sagar.ghuge@intel.com>
Cc: Nanley Chery <nanley.g.chery@intel.com>
Cc: Xi Ruoyao <xry111@xry111.site>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 223c4218c019..e478d412785e 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -1694,10 +1694,14 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *
* arithmetic related to alignment and offset calculation.
*/
if (is_gen12_ccs_cc_plane(&fb->base, i)) {
- if (IS_ALIGNED(fb->base.offsets[i], 64))
- continue;
- else
+ if (!IS_ALIGNED(fb->base.offsets[i], 64)) {
+ drm_dbg_kms(&i915->drm,
+ "fb misaligned clear color plane %d offset (0x%x)\n",
+ i, fb->base.offsets[i]);
return -EINVAL;
+ }
+
+ continue;
}
intel_fb_plane_dims(fb, i, &width, &height);
--
2.45.2
next prev parent reply other threads:[~2024-11-29 6:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-29 6:50 [PATCH 0/4] drm/i915/fb: Deal with Mesa clear color alignment regression Ville Syrjala
2024-11-29 6:50 ` [PATCH 1/4] drm/i915/fb: Relax clear color alignment to 64 bytes Ville Syrjala
2024-11-29 13:45 ` Xi Ruoyao
2024-11-29 6:50 ` Ville Syrjala [this message]
2024-11-29 6:50 ` [PATCH 3/4] drm/i915/fb: Check that the clear color fits within the BO Ville Syrjala
2024-11-29 6:50 ` [PATCH 4/4] drm/uapi/fourcc: Document the Intel clear color alignment better Ville Syrjala
2025-01-10 15:43 ` Chery, Nanley G
2025-01-13 16:38 ` Ville Syrjälä
2024-11-29 7:11 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fb: Deal with Mesa clear color alignment regression Patchwork
2024-11-29 7:11 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-11-29 7:27 ` ✗ i915.CI.BAT: failure " Patchwork
2024-11-29 8:45 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fb: Deal with Mesa clear color alignment regression (rev2) Patchwork
2024-11-29 8:45 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-11-29 8:57 ` ✓ i915.CI.BAT: success " Patchwork
2024-11-29 11:17 ` ✗ i915.CI.Full: failure " Patchwork
2025-01-07 19:44 ` [PATCH 0/4] drm/i915/fb: Deal with Mesa clear color alignment regression Souza, Jose
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