From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com
Subject: [PATCH 3/3] drm/i915: move DDI_CLK_VALFREQ next to other Cx0 PHY registers
Date: Fri, 13 Dec 2024 13:51:11 +0200 [thread overview]
Message-ID: <20241213115111.335474-3-jani.nikula@intel.com> (raw)
In-Reply-To: <20241213115111.335474-1-jani.nikula@intel.com>
Relocate DDI_CLK_VALFREQ register definition next to other Cx0 PHY
register macros.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h | 5 +++++
drivers/gpu/drm/i915/i915_reg.h | 5 -----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
index c685479c9756..4dc6e179a774 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
@@ -9,6 +9,11 @@
#include "i915_reg_defs.h"
#include "intel_display_limits.h"
+/* DDI Buffer Control */
+#define _DDI_CLK_VALFREQ_A 0x64030
+#define _DDI_CLK_VALFREQ_B 0x64130
+#define DDI_CLK_VALFREQ(port) _MMIO_PORT(port, _DDI_CLK_VALFREQ_A, _DDI_CLK_VALFREQ_B)
+
/*
* Wrapper macro to convert from port number to the index used in some of the
* registers. For Display version 20 and above it converts the port number to a
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 33cfe07a9b2e..765e6c0528fb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1067,11 +1067,6 @@
#define CLKGATE_DIS_PSL_EXT(pipe) \
_MMIO_PIPE(pipe, _CLKGATE_DIS_PSL_EXT_A, _CLKGATE_DIS_PSL_EXT_B)
-/* DDI Buffer Control */
-#define _DDI_CLK_VALFREQ_A 0x64030
-#define _DDI_CLK_VALFREQ_B 0x64130
-#define DDI_CLK_VALFREQ(port) _MMIO_PORT(port, _DDI_CLK_VALFREQ_A, _DDI_CLK_VALFREQ_B)
-
/*
* Display engine regs
*/
--
2.39.5
next prev parent reply other threads:[~2024-12-13 11:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-13 11:51 [PATCH 1/3] drm/i915: split out i9xx_wm_regs.h Jani Nikula
2024-12-13 11:51 ` [PATCH 2/3] drm/i915: relocate _VGA_MSR_WRITE register definition Jani Nikula
2024-12-16 12:02 ` Luca Coelho
2024-12-13 11:51 ` Jani Nikula [this message]
2024-12-16 12:03 ` [PATCH 3/3] drm/i915: move DDI_CLK_VALFREQ next to other Cx0 PHY registers Luca Coelho
2024-12-13 12:20 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: split out i9xx_wm_regs.h Patchwork
2024-12-13 12:37 ` ✓ i915.CI.BAT: success " Patchwork
2024-12-13 15:59 ` ✗ i915.CI.Full: failure " Patchwork
2024-12-16 12:01 ` [PATCH 1/3] " Luca Coelho
2024-12-16 13:16 ` Jani Nikula
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