From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: Vinod Govindapillai <vinod.govindapillai@intel.com>
Subject: [PATCH 10/19] drm/i915/dp: Factor out compute_max_compressed_bpp_x16()
Date: Mon, 22 Dec 2025 17:35:38 +0200 [thread overview]
Message-ID: <20251222153547.713360-12-imre.deak@intel.com> (raw)
In-Reply-To: <20251222153547.713360-1-imre.deak@intel.com>
Factor out compute_max_compressed_bpp_x16() also used during mode
validation in a follow-up change.
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 82 +++++++++++++++----------
1 file changed, 49 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8aeb61441322d..d1139d6582e10 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2663,6 +2663,48 @@ static int compute_min_compressed_bpp_x16(struct intel_connector *connector,
return min_bpp_x16;
}
+static int compute_max_compressed_bpp_x16(struct intel_connector *connector,
+ int mode_clock, int mode_hdisplay,
+ int num_joined_pipes,
+ enum intel_output_format output_format,
+ int pipe_max_bpp, int max_link_bpp_x16)
+{
+ struct intel_display *display = to_intel_display(connector);
+ struct intel_dp *intel_dp = intel_attached_dp(connector);
+ int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
+ int throughput_max_bpp_x16;
+ int joiner_max_bpp;
+
+ dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp);
+ joiner_max_bpp = get_max_compressed_bpp_with_joiner(display,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector,
+ output_format,
+ pipe_max_bpp / 3);
+ dsc_max_bpp = min(dsc_sink_max_bpp, dsc_src_max_bpp);
+ dsc_max_bpp = min(dsc_max_bpp, joiner_max_bpp);
+
+ max_link_bpp_x16 = min(max_link_bpp_x16, fxp_q4_from_int(dsc_max_bpp));
+
+ throughput_max_bpp_x16 = dsc_throughput_quirk_max_bpp_x16(connector,
+ mode_clock);
+ if (throughput_max_bpp_x16 < max_link_bpp_x16) {
+ max_link_bpp_x16 = throughput_max_bpp_x16;
+
+ drm_dbg_kms(display->drm,
+ "[CONNECTOR:%d:%s] Decreasing link max bpp to " FXP_Q4_FMT " due to DSC throughput quirk\n",
+ connector->base.base.id, connector->base.name,
+ FXP_Q4_ARGS(max_link_bpp_x16));
+ }
+
+ max_link_bpp_x16 = align_max_compressed_bpp_x16(connector, output_format,
+ pipe_max_bpp, max_link_bpp_x16);
+
+ return max_link_bpp_x16;
+}
+
/*
* Calculate the output link min, max bpp values in limits based on the pipe bpp
* range, crtc_state and dsc mode. Return true on success.
@@ -2692,43 +2734,17 @@ intel_dp_compute_config_link_bpp_limits(struct intel_connector *connector,
limits->link.min_bpp_x16 = fxp_q4_from_int(limits->pipe.min_bpp);
} else {
- int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
- int throughput_max_bpp_x16;
- int joiner_max_bpp;
limits->link.min_bpp_x16 =
compute_min_compressed_bpp_x16(connector, crtc_state->output_format);
- dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp);
- joiner_max_bpp =
- get_max_compressed_bpp_with_joiner(display,
- adjusted_mode->crtc_clock,
- adjusted_mode->hdisplay,
- intel_crtc_num_joined_pipes(crtc_state));
- dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector,
- crtc_state->output_format,
- limits->pipe.max_bpp / 3);
- dsc_max_bpp = min(dsc_sink_max_bpp, dsc_src_max_bpp);
- dsc_max_bpp = min(dsc_max_bpp, joiner_max_bpp);
-
- max_link_bpp_x16 = min(max_link_bpp_x16, fxp_q4_from_int(dsc_max_bpp));
-
- throughput_max_bpp_x16 =
- dsc_throughput_quirk_max_bpp_x16(connector, adjusted_mode->crtc_clock);
- if (throughput_max_bpp_x16 < max_link_bpp_x16) {
- max_link_bpp_x16 = throughput_max_bpp_x16;
-
- drm_dbg_kms(display->drm,
- "[CRTC:%d:%s][CONNECTOR:%d:%s] Decreasing link max bpp to " FXP_Q4_FMT " due to DSC throughput quirk\n",
- crtc->base.base.id, crtc->base.name,
- connector->base.base.id, connector->base.name,
- FXP_Q4_ARGS(max_link_bpp_x16));
- }
-
max_link_bpp_x16 =
- align_max_compressed_bpp_x16(connector,
- crtc_state->output_format,
- limits->pipe.max_bpp,
- max_link_bpp_x16);
+ compute_max_compressed_bpp_x16(connector,
+ adjusted_mode->crtc_clock,
+ adjusted_mode->hdisplay,
+ intel_crtc_num_joined_pipes(crtc_state),
+ crtc_state->output_format,
+ limits->pipe.max_bpp,
+ max_link_bpp_x16);
}
limits->link.max_bpp_x16 = max_link_bpp_x16;
--
2.49.1
next prev parent reply other threads:[~2025-12-22 15:36 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-22 15:35 [PATCH 00/19] rm/i915/dp: Clean up link BW/DSC slice config computation (link BW) Imre Deak
2025-12-22 15:35 ` [PATCH 01/19] drm/i915/dp: Drop unused timeslots param from dsc_compute_link_config() Imre Deak
2025-12-22 15:35 ` [PATCH] drm/i915/dp: Fail state computation for invalid DSC source input BPP values Imre Deak
2025-12-22 15:35 ` [PATCH 02/19] drm/i915/dp: Factor out align_max_sink_dsc_input_bpp() Imre Deak
2025-12-22 15:35 ` [PATCH 03/19] drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 04/19] drm/i915/dp: Align min/max DSC input BPPs to sink caps Imre Deak
2025-12-22 15:35 ` [PATCH 05/19] drm/i915/dp: Align min/max compressed BPPs when calculating BPP limits Imre Deak
2025-12-22 15:35 ` [PATCH 06/19] drm/i915/dp: Drop intel_dp parameter from intel_dp_compute_config_link_bpp_limits() Imre Deak
2025-12-22 15:35 ` [PATCH 07/19] drm/i915/dp: Pass intel_output_format to intel_dp_dsc_sink_{min_max}_compressed_bpp() Imre Deak
2025-12-22 15:35 ` [PATCH 08/19] drm/i915/dp: Pass mode clock to dsc_throughput_quirk_max_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 09/19] drm/i915/dp: Factor out compute_min_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` Imre Deak [this message]
2025-12-22 15:35 ` [PATCH 11/19] drm/i915/dp: Add intel_dp_mode_valid_with_dsc() Imre Deak
2025-12-22 15:35 ` [PATCH 12/19] drm/i915/dp: Unify detect and compute time DSC mode BW validation Imre Deak
2025-12-22 15:35 ` [PATCH 13/19] drm/i915/dp: Use helpers to align min/max compressed BPPs Imre Deak
2025-12-22 15:35 ` [PATCH 14/19] drm/i915/dp: Simplify computing DSC BPPs for eDP Imre Deak
2025-12-22 15:35 ` [PATCH 15/19] drm/i915/dp: Simplify computing DSC BPPs for DP-SST Imre Deak
2025-12-22 15:35 ` [PATCH 16/19] drm/i915/dp: Simplify computing forced DSC BPP " Imre Deak
2025-12-22 15:35 ` [PATCH 17/19] drm/i915/dp: Unify computing compressed BPP for DP-SST and eDP Imre Deak
2025-12-22 15:35 ` [PATCH 18/19] drm/i915/dp: Simplify eDP vs. DP compressed BPP computation Imre Deak
2025-12-22 15:35 ` [PATCH 19/19] drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST Imre Deak
2025-12-22 16:55 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Fail state computation for invalid DSC source input BPP values Patchwork
2025-12-22 18:46 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Fail state computation for invalid DSC source input BPP values (rev2) Patchwork
2025-12-22 20:09 ` ✓ i915.CI.BAT: success for drm/i915/dp: Fail state computation for invalid DSC source input BPP values (rev3) Patchwork
2025-12-24 2:24 ` ✓ i915.CI.Full: " Patchwork
2026-01-13 17:33 ` Imre Deak
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