From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: Vinod Govindapillai <vinod.govindapillai@intel.com>
Subject: [PATCH 13/19] drm/i915/dp: Use helpers to align min/max compressed BPPs
Date: Mon, 22 Dec 2025 17:35:41 +0200 [thread overview]
Message-ID: <20251222153547.713360-15-imre.deak@intel.com> (raw)
In-Reply-To: <20251222153547.713360-1-imre.deak@intel.com>
The minimum/maximum compressed BPP values are aligned/bounded in
intel_dp_compute_link_bpp_limits() to the corresponding source limits.
The minimum compressed BPP value doesn't change afterwards, so no need
to align it again, remove that.
The maximum compressed BPP, which depends on the pipe BPP value still
needs to be aligned, since the pipe BPP value could change after the
above limits were computed, via intel_dp_force_dsc_pipe_bpp(). Use the
corresponding helper for this alignment instead of open-coding the same.
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 23 +++++------------------
1 file changed, 5 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e59c06b6e0b99..36cbb6aef2434 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2218,20 +2218,15 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
struct intel_display *display = to_intel_display(intel_dp);
const struct intel_connector *connector = to_intel_connector(conn_state->connector);
int min_bpp_x16, max_bpp_x16, bpp_step_x16;
- int link_bpp_x16;
int bpp_x16;
int ret;
+ min_bpp_x16 = limits->link.min_bpp_x16;
max_bpp_x16 = limits->link.max_bpp_x16;
bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector);
- /* Compressed BPP should be less than the Input DSC bpp */
- link_bpp_x16 = intel_dp_output_format_link_bpp_x16(pipe_config->output_format, pipe_bpp);
- max_bpp_x16 = min(max_bpp_x16, link_bpp_x16 - bpp_step_x16);
-
- drm_WARN_ON(display->drm, !is_power_of_2(bpp_step_x16));
- min_bpp_x16 = round_up(limits->link.min_bpp_x16, bpp_step_x16);
- max_bpp_x16 = round_down(max_bpp_x16, bpp_step_x16);
+ max_bpp_x16 = align_max_compressed_bpp_x16(connector, pipe_config->output_format,
+ pipe_bpp, max_bpp_x16);
for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) {
if (!intel_dp_dsc_valid_compressed_bpp(intel_dp, bpp_x16))
@@ -2347,8 +2342,6 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
struct intel_connector *connector =
to_intel_connector(conn_state->connector);
int pipe_bpp, forced_bpp;
- int dsc_min_bpp;
- int dsc_max_bpp;
forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, limits);
@@ -2368,15 +2361,9 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
pipe_config->port_clock = limits->max_rate;
pipe_config->lane_count = limits->max_lane_count;
- dsc_min_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16);
-
- dsc_max_bpp = fxp_q4_to_int(limits->link.max_bpp_x16);
-
- /* Compressed BPP should be less than the Input DSC bpp */
- dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1);
-
pipe_config->dsc.compressed_bpp_x16 =
- fxp_q4_from_int(max(dsc_min_bpp, dsc_max_bpp));
+ align_max_compressed_bpp_x16(connector, pipe_config->output_format,
+ pipe_bpp, limits->link.max_bpp_x16);
pipe_config->pipe_bpp = pipe_bpp;
--
2.49.1
next prev parent reply other threads:[~2025-12-22 15:36 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-22 15:35 [PATCH 00/19] rm/i915/dp: Clean up link BW/DSC slice config computation (link BW) Imre Deak
2025-12-22 15:35 ` [PATCH 01/19] drm/i915/dp: Drop unused timeslots param from dsc_compute_link_config() Imre Deak
2025-12-22 15:35 ` [PATCH] drm/i915/dp: Fail state computation for invalid DSC source input BPP values Imre Deak
2025-12-22 15:35 ` [PATCH 02/19] drm/i915/dp: Factor out align_max_sink_dsc_input_bpp() Imre Deak
2025-12-22 15:35 ` [PATCH 03/19] drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 04/19] drm/i915/dp: Align min/max DSC input BPPs to sink caps Imre Deak
2025-12-22 15:35 ` [PATCH 05/19] drm/i915/dp: Align min/max compressed BPPs when calculating BPP limits Imre Deak
2025-12-22 15:35 ` [PATCH 06/19] drm/i915/dp: Drop intel_dp parameter from intel_dp_compute_config_link_bpp_limits() Imre Deak
2025-12-22 15:35 ` [PATCH 07/19] drm/i915/dp: Pass intel_output_format to intel_dp_dsc_sink_{min_max}_compressed_bpp() Imre Deak
2025-12-22 15:35 ` [PATCH 08/19] drm/i915/dp: Pass mode clock to dsc_throughput_quirk_max_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 09/19] drm/i915/dp: Factor out compute_min_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 10/19] drm/i915/dp: Factor out compute_max_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 11/19] drm/i915/dp: Add intel_dp_mode_valid_with_dsc() Imre Deak
2025-12-22 15:35 ` [PATCH 12/19] drm/i915/dp: Unify detect and compute time DSC mode BW validation Imre Deak
2025-12-22 15:35 ` Imre Deak [this message]
2025-12-22 15:35 ` [PATCH 14/19] drm/i915/dp: Simplify computing DSC BPPs for eDP Imre Deak
2025-12-22 15:35 ` [PATCH 15/19] drm/i915/dp: Simplify computing DSC BPPs for DP-SST Imre Deak
2025-12-22 15:35 ` [PATCH 16/19] drm/i915/dp: Simplify computing forced DSC BPP " Imre Deak
2025-12-22 15:35 ` [PATCH 17/19] drm/i915/dp: Unify computing compressed BPP for DP-SST and eDP Imre Deak
2025-12-22 15:35 ` [PATCH 18/19] drm/i915/dp: Simplify eDP vs. DP compressed BPP computation Imre Deak
2025-12-22 15:35 ` [PATCH 19/19] drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST Imre Deak
2025-12-22 16:55 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Fail state computation for invalid DSC source input BPP values Patchwork
2025-12-22 18:46 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Fail state computation for invalid DSC source input BPP values (rev2) Patchwork
2025-12-22 20:09 ` ✓ i915.CI.BAT: success for drm/i915/dp: Fail state computation for invalid DSC source input BPP values (rev3) Patchwork
2025-12-24 2:24 ` ✓ i915.CI.Full: " Patchwork
2026-01-13 17:33 ` Imre Deak
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