From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: "Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 09/15] drm/i915/dp: Rename test_slice_count to slices_per_line
Date: Wed, 14 Jan 2026 18:22:26 +0200 [thread overview]
Message-ID: <20260114162232.92731-10-imre.deak@intel.com> (raw)
In-Reply-To: <20260114162232.92731-1-imre.deak@intel.com>
Rename test_slice_count to slices_per_line for clarity.
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index bd35a2ba30421..57abc13a02d2d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1037,7 +1037,7 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
/* Find the closest match to the valid slice count values */
for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
- int test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes;
+ int slices_per_line = valid_dsc_slicecount[i] * num_joined_pipes;
/*
* 3 DSC Slices per pipe need 3 DSC engines, which is supported only
@@ -1047,7 +1047,7 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
(!HAS_DSC_3ENGINES(display) || num_joined_pipes != 4))
continue;
- if (!(drm_dp_dsc_slice_count_to_mask(test_slice_count) &
+ if (!(drm_dp_dsc_slice_count_to_mask(slices_per_line) &
sink_slice_count_mask))
continue;
@@ -1059,11 +1059,11 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
if (num_joined_pipes > 1 && valid_dsc_slicecount[i] < 2)
continue;
- if (mode_hdisplay % test_slice_count)
+ if (mode_hdisplay % slices_per_line)
continue;
- if (min_slice_count <= test_slice_count)
- return test_slice_count;
+ if (min_slice_count <= slices_per_line)
+ return slices_per_line;
}
/* Print slice count 1,2,4,..24 if bit#0,1,3,..23 is set in the mask. */
--
2.49.1
next prev parent reply other threads:[~2026-01-14 16:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-14 16:22 [PATCH 00/15] drm/i915/dp: Clean up link BW/DSC slice config computation (DSC slice) Imre Deak
2026-01-14 16:22 ` [PATCH 01/15] drm/i915/dsc: Track the detaild DSC slice configuration Imre Deak
2026-01-14 16:22 ` [PATCH 02/15] drm/i915/dsc: Track the DSC stream count in the DSC slice config state Imre Deak
2026-01-14 16:22 ` [PATCH 03/15] drm/i915/dsi: Move initialization of DSI DSC streams-per-pipe to fill_dsc() Imre Deak
2026-01-14 16:22 ` [PATCH 04/15] drm/i915/dsi: Track the detailed DSC slice configuration Imre Deak
2026-01-14 16:22 ` [PATCH 05/15] drm/i915/dp: " Imre Deak
2026-01-14 16:22 ` [PATCH 06/15] drm/i915/dsc: Switch to using intel_dsc_line_slice_count() Imre Deak
2026-01-14 16:22 ` [PATCH 07/15] drm/i915/dp: Factor out intel_dp_dsc_min_slice_count() Imre Deak
2026-01-14 16:22 ` [PATCH 08/15] drm/i915/dp: Use int for DSC slice count variables Imre Deak
2026-01-14 16:22 ` Imre Deak [this message]
2026-01-14 16:22 ` [PATCH 10/15] drm/i915/dp: Simplify the DSC slice config loop's slices-per-pipe iteration Imre Deak
2026-01-14 16:22 ` [PATCH 11/15] drm/i915/dsc: Add intel_dsc_get_slice_config() Imre Deak
2026-01-14 16:22 ` [PATCH 12/15] drm/i915/dsi: Use intel_dsc_get_slice_config() Imre Deak
2026-01-14 16:22 ` [PATCH 13/15] drm/i915/dp: Unify DP and eDP slice count computation Imre Deak
2026-01-14 16:22 ` [PATCH 14/15] drm/i915/dp: Add intel_dp_dsc_get_slice_config() Imre Deak
2026-01-14 16:22 ` [PATCH 15/15] drm/i915/dp: Use intel_dp_dsc_get_slice_config() Imre Deak
2026-01-14 19:08 ` ✓ i915.CI.BAT: success for drm/i915/dp: Clean up link BW/DSC slice config computation (DSC slice) Patchwork
2026-01-14 23:56 ` ✗ i915.CI.Full: failure " Patchwork
2026-01-15 18:36 ` Imre Deak
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