From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com,
Uma Shankar <uma.shankar@intel.com>
Subject: [v3 08/19] drm/i915: Remove i915_reg.h from intel_display.c
Date: Fri, 30 Jan 2026 02:43:47 +0530 [thread overview]
Message-ID: <20260129211358.1240283-9-uma.shankar@intel.com> (raw)
In-Reply-To: <20260129211358.1240283-1-uma.shankar@intel.com>
Move CHICKEN_PIPESL_1 register definition to display header.
This allows intel_display.c free of i915_reg.h include.
v3: Fix commit header (Jani)
v2: Drop common header in include and use display_regs.h (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 1 -
.../gpu/drm/i915/display/intel_display_regs.h | 23 +++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 22 ------------------
3 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7491e00e3858..b7d4ac7e5ff9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -50,7 +50,6 @@
#include "g4x_hdmi.h"
#include "hsw_ips.h"
#include "i915_config.h"
-#include "i915_reg.h"
#include "i9xx_plane.h"
#include "i9xx_plane_regs.h"
#include "i9xx_wm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 0d7788db4a7f..706024c2a463 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1543,6 +1543,29 @@
#define CHICKEN_FBC_STRIDE_MASK REG_GENMASK(12, 0)
#define CHICKEN_FBC_STRIDE(x) REG_FIELD_PREP(CHICKEN_FBC_STRIDE_MASK, (x))
+#define _CHICKEN_PIPESL_1_A 0x420b0
+#define _CHICKEN_PIPESL_1_B 0x420b4
+#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
+#define HSW_PRI_STRETCH_MAX_MASK REG_GENMASK(28, 27)
+#define HSW_PRI_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 0)
+#define HSW_PRI_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 1)
+#define HSW_PRI_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 2)
+#define HSW_PRI_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 3)
+#define HSW_SPR_STRETCH_MAX_MASK REG_GENMASK(26, 25)
+#define HSW_SPR_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 0)
+#define HSW_SPR_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 1)
+#define HSW_SPR_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 2)
+#define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
+#define HSW_FBCQ_DIS REG_BIT(22)
+#define HSW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(15) /* hsw */
+#define SKL_PSR_MASK_PLANE_FLIP REG_BIT(11) /* skl+ */
+#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
+#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
+#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
+#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
+#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
+#define BDW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(0) /* bdw */
+
#define _CHICKEN_TRANS_A 0x420c0
#define _CHICKEN_TRANS_B 0x420c4
#define _CHICKEN_TRANS_C 0x420c8
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bc466d8c8c60..10928e8406dc 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -879,28 +879,6 @@
#define CHICKEN_PAR2_1 _MMIO(0x42090)
#define KVM_CONFIG_CHANGE_NOTIFICATION_SELECT REG_BIT(14)
-#define _CHICKEN_PIPESL_1_A 0x420b0
-#define _CHICKEN_PIPESL_1_B 0x420b4
-#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
-#define HSW_PRI_STRETCH_MAX_MASK REG_GENMASK(28, 27)
-#define HSW_PRI_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 0)
-#define HSW_PRI_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 1)
-#define HSW_PRI_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 2)
-#define HSW_PRI_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 3)
-#define HSW_SPR_STRETCH_MAX_MASK REG_GENMASK(26, 25)
-#define HSW_SPR_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 0)
-#define HSW_SPR_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 1)
-#define HSW_SPR_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 2)
-#define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
-#define HSW_FBCQ_DIS REG_BIT(22)
-#define HSW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(15) /* hsw */
-#define SKL_PSR_MASK_PLANE_FLIP REG_BIT(11) /* skl+ */
-#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
-#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
-#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
-#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
-#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
-#define BDW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(0) /* bdw */
#define DISP_ARB_CTL _MMIO(0x45000)
#define DISP_FBC_MEMORY_WAKE REG_BIT(31)
--
2.50.1
next prev parent reply other threads:[~2026-01-29 20:58 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-29 21:13 [v3 00/19] Make Display free from i915_reg.h Uma Shankar
2026-01-29 21:13 ` [v3 01/19] drm/i915: Extract display registers from i915_reg.h to display Uma Shankar
2026-01-29 21:13 ` [v3 02/19] drm/i915: Extract South chicken " Uma Shankar
2026-01-29 21:13 ` [v3 03/19] drm/i915: Extract display interrupt definitions Uma Shankar
2026-01-29 21:13 ` [v3 04/19] drm/i915: Extract DSPCLK_GATE_D from i915_reg to display Uma Shankar
2026-01-29 21:13 ` [v3 05/19] drm/{i915, xe}: Extract pcode definitions to common header Uma Shankar
2026-02-03 12:00 ` Jani Nikula
2026-01-29 21:13 ` [v3 06/19] drm/i915: Remove i915_reg.h from intel_display_device.c Uma Shankar
2026-02-03 12:06 ` Jani Nikula
2026-01-29 21:13 ` [v3 07/19] drm/i915: Remove i915_reg.h from intel_dram.c Uma Shankar
2026-02-03 11:50 ` Jani Nikula
2026-01-29 21:13 ` Uma Shankar [this message]
2026-01-29 21:13 ` [v3 09/19] drm/i915: Remove i915_reg.h from intel_overlay.c Uma Shankar
2026-02-03 12:39 ` Jani Nikula
2026-01-29 21:13 ` [v3 10/19] drm/i915: Remove i915_reg.h from g4x_dp.c Uma Shankar
2026-02-03 12:40 ` Jani Nikula
2026-02-05 7:29 ` Shankar, Uma
2026-01-29 21:13 ` [v3 11/19] drm/i915: Remove i915_reg.h from i9xx_wm.c Uma Shankar
2026-02-03 12:42 ` Jani Nikula
2026-02-05 7:31 ` Shankar, Uma
2026-02-03 16:27 ` Ville Syrjälä
2026-02-05 7:36 ` Shankar, Uma
2026-01-29 21:13 ` [v3 12/19] drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c Uma Shankar
2026-01-29 21:13 ` [v3 13/19] drm/i915: Remove i915_reg.h from intel_rom.c Uma Shankar
2026-02-03 16:22 ` Ville Syrjälä
2026-02-05 7:38 ` Shankar, Uma
2026-01-29 21:13 ` [v3 14/19] drm/i915: Remove i915_reg.h from intel_psr.c Uma Shankar
2026-01-29 21:13 ` [v3 15/19] drm/i915: Remove i915_reg.h from intel_fifo_underrun.c Uma Shankar
2026-02-03 12:47 ` Jani Nikula
2026-01-29 21:13 ` [v3 16/19] drm/i915: Remove i915_reg.h from intel_display_irq.c Uma Shankar
2026-01-29 21:13 ` [v3 17/19] drm/i915: Remove i915_reg.h from intel_display_power_well.c Uma Shankar
2026-02-03 12:49 ` Jani Nikula
2026-02-05 7:40 ` Shankar, Uma
2026-02-03 16:34 ` Ville Syrjälä
2026-02-05 7:44 ` Shankar, Uma
2026-01-29 21:13 ` [v3 18/19] drm/i915: Remove i915_reg.h from intel_modeset_setup.c Uma Shankar
2026-01-29 21:13 ` [v3 19/19] drm/{i915, xe}: Remove i915_reg.h from display Uma Shankar
2026-02-03 12:50 ` Jani Nikula
2026-02-05 7:48 ` Shankar, Uma
2026-01-29 22:13 ` ✓ i915.CI.BAT: success for Make Display free from i915_reg.h (rev3) Patchwork
2026-01-30 7:21 ` ✗ i915.CI.Full: failure " Patchwork
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