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From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jouni.hogander@intel.com, ville.syrjala@linux.intel.com,
	animesh.manna@intel.com, michal.grzelak@intel.com,
	Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: [RESEND 2/5] drm/i915/alpm: Allow LOBF only if window1 > alpm check_entry lines
Date: Wed,  4 Feb 2026 10:32:47 +0530	[thread overview]
Message-ID: <20260204050250.762718-3-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20260204050250.762718-1-ankit.k.nautiyal@intel.com>

LOBF must be disabled if the number of lines within Window 1 is not greater
than ALPM_CTL[ALPM Entry Check]

v2: Consider the case where SCL is in the active region. (Ville)

Bspec:71041
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 055184a3c7d5..27b26e5813dc 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -270,6 +270,23 @@ int intel_alpm_lobf_min_guardband(struct intel_crtc_state *crtc_state)
 	return first_sdp_position + waketime_in_lines + crtc_state->set_context_latency;
 }
 
+static bool intel_alpm_lobf_is_window1_sufficient(struct intel_crtc_state *crtc_state)
+{
+	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	int vblank = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay;
+	int window1;
+
+	/*
+	 * LOBF must be disabled if the number of lines within Window 1 is not
+	 * greater than ALPM_CTL[ALPM Entry Check]
+	 */
+	window1 = vblank - min(vblank,
+			       crtc_state->vrr.guardband +
+			       crtc_state->set_context_latency);
+
+	return window1 > crtc_state->alpm_state.check_entry_lines;
+}
+
 void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
 					 struct intel_crtc_state *crtc_state)
 {
@@ -279,6 +296,11 @@ void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
 	if (!crtc_state->has_lobf)
 		return;
 
+	if (!intel_alpm_lobf_is_window1_sufficient(crtc_state)) {
+		crtc_state->has_lobf = false;
+		return;
+	}
+
 	/*
 	 * LOBF can only be enabled if the time from the start of the SCL+Guardband
 	 * window to the position of the first SDP is greater than the time it takes
-- 
2.45.2


  parent reply	other threads:[~2026-02-04  5:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-04  5:02 [RESEND 0/5] LOBF fixes Ankit Nautiyal
2026-02-04  5:02 ` [RESEND 1/5] drm/i915/alpm: Compute LOBF late after guardband is already determined Ankit Nautiyal
2026-02-04  6:24   ` Hogander, Jouni
2026-02-04  5:02 ` Ankit Nautiyal [this message]
2026-02-04  5:02 ` [RESEND 3/5] drm/i915/alpm: Allow LOBF only for platform that have Always on VRR TG Ankit Nautiyal
2026-02-04  5:02 ` [RESEND 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update Ankit Nautiyal
2026-02-04  6:24   ` Hogander, Jouni
2026-02-04  5:02 ` [RESEND 5/5] drm/i915/alpm: Disable LOBF around transitioning for LRR/seamless MN Ankit Nautiyal
2026-02-04  6:26 ` ✓ i915.CI.BAT: success for LOBF fixes (rev5) Patchwork
2026-02-04 17:48 ` ✓ i915.CI.Full: " Patchwork
2026-02-05  9:20 ` [RESEND 0/5] LOBF fixes Nautiyal, Ankit K

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