From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jouni.hogander@intel.com, ville.syrjala@linux.intel.com,
animesh.manna@intel.com, michal.grzelak@intel.com,
Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: [RESEND 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update
Date: Wed, 4 Feb 2026 10:32:49 +0530 [thread overview]
Message-ID: <20260204050250.762718-5-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20260204050250.762718-1-ankit.k.nautiyal@intel.com>
The pre_plane_update and post_plane_update hooks essentially
disable/enable lobf feature. Use the existing _is_enabling/is_disabling
logic for this in the pre_plane_update and post_plane_update paths.
Also rename the helpers to intel_alpm_lobf_{en,dis}able().
v2: Remove redeundant checks during enabling/disabling. (Jouni)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 48 ++++++--------------
drivers/gpu/drm/i915/display/intel_alpm.h | 6 +--
drivers/gpu/drm/i915/display/intel_display.c | 25 +++++++++-
3 files changed, 38 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 3aeab4bebce2..e0a4a59dc025 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -452,25 +452,14 @@ void intel_alpm_port_configure(struct intel_dp *intel_dp,
intel_de_write(display, PORT_ALPM_LFPS_CTL(port), lfps_ctl_val);
}
-void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+void intel_alpm_lobf_disable(const struct intel_crtc_state *new_crtc_state)
{
- struct intel_display *display = to_intel_display(state);
- const struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- const struct intel_crtc_state *old_crtc_state =
- intel_atomic_get_old_crtc_state(state, crtc);
- enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ struct intel_display *display = to_intel_display(new_crtc_state);
+ enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
struct intel_encoder *encoder;
- if (DISPLAY_VER(display) < 20)
- return;
-
- if (crtc_state->has_lobf || crtc_state->has_lobf == old_crtc_state->has_lobf)
- return;
-
for_each_intel_encoder_mask(display->drm, encoder,
- crtc_state->uapi.encoder_mask) {
+ new_crtc_state->uapi.encoder_mask) {
struct intel_dp *intel_dp;
if (!intel_encoder_is_dp(encoder))
@@ -481,12 +470,10 @@ void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
if (!intel_dp_is_edp(intel_dp))
continue;
- if (old_crtc_state->has_lobf) {
- mutex_lock(&intel_dp->alpm.lock);
- intel_de_write(display, ALPM_CTL(display, cpu_transcoder), 0);
- drm_dbg_kms(display->drm, "Link off between frames (LOBF) disabled\n");
- mutex_unlock(&intel_dp->alpm.lock);
- }
+ mutex_lock(&intel_dp->alpm.lock);
+ intel_de_write(display, ALPM_CTL(display, cpu_transcoder), 0);
+ drm_dbg_kms(display->drm, "Link off between frames (LOBF) disabled\n");
+ mutex_unlock(&intel_dp->alpm.lock);
}
}
@@ -507,22 +494,13 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp,
drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val);
}
-void intel_alpm_post_plane_update(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+void intel_alpm_lobf_enable(const struct intel_crtc_state *new_crtc_state)
{
- struct intel_display *display = to_intel_display(state);
- const struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- const struct intel_crtc_state *old_crtc_state =
- intel_atomic_get_old_crtc_state(state, crtc);
+ struct intel_display *display = to_intel_display(new_crtc_state);
struct intel_encoder *encoder;
- if (crtc_state->has_psr || !crtc_state->has_lobf ||
- crtc_state->has_lobf == old_crtc_state->has_lobf)
- return;
-
for_each_intel_encoder_mask(display->drm, encoder,
- crtc_state->uapi.encoder_mask) {
+ new_crtc_state->uapi.encoder_mask) {
struct intel_dp *intel_dp;
if (!intel_encoder_is_dp(encoder))
@@ -531,8 +509,8 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
intel_dp = enc_to_intel_dp(encoder);
if (intel_dp_is_edp(intel_dp)) {
- intel_alpm_enable_sink(intel_dp, crtc_state);
- intel_alpm_configure(intel_dp, crtc_state);
+ intel_alpm_enable_sink(intel_dp, new_crtc_state);
+ intel_alpm_configure(intel_dp, new_crtc_state);
}
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index b698979d1f13..1cf70668ab1b 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -25,12 +25,10 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_alpm_enable_sink(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
-void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
+void intel_alpm_lobf_disable(const struct intel_crtc_state *new_crtc_state);
void intel_alpm_port_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
-void intel_alpm_post_plane_update(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
+void intel_alpm_lobf_enable(const struct intel_crtc_state *new_crtc_state);
void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 564d11925af3..739a0a74e008 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1008,6 +1008,24 @@ static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
return is_disabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
}
+static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
+ const struct intel_crtc_state *new_crtc_state)
+{
+ if (!new_crtc_state->hw.active)
+ return false;
+
+ return is_enabling(has_lobf, old_crtc_state, new_crtc_state);
+}
+
+static bool intel_crtc_lobf_disabling(const struct intel_crtc_state *old_crtc_state,
+ const struct intel_crtc_state *new_crtc_state)
+{
+ if (!old_crtc_state->hw.active)
+ return false;
+
+ return is_disabling(has_lobf, old_crtc_state, new_crtc_state);
+}
+
#undef is_disabling
#undef is_enabling
@@ -1055,7 +1073,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
adl_scaler_ecc_unmask(new_crtc_state);
}
- intel_alpm_post_plane_update(state, crtc);
+ if (intel_crtc_lobf_enabling(old_crtc_state, new_crtc_state))
+ intel_alpm_lobf_enable(new_crtc_state);
intel_psr_post_plane_update(state, crtc);
}
@@ -1152,7 +1171,9 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
- intel_alpm_pre_plane_update(state, crtc);
+ if (intel_crtc_lobf_disabling(old_crtc_state, new_crtc_state))
+ intel_alpm_lobf_disable(new_crtc_state);
+
intel_psr_pre_plane_update(state, crtc);
if (intel_crtc_vrr_disabling(state, crtc)) {
--
2.45.2
next prev parent reply other threads:[~2026-02-04 5:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-04 5:02 [RESEND 0/5] LOBF fixes Ankit Nautiyal
2026-02-04 5:02 ` [RESEND 1/5] drm/i915/alpm: Compute LOBF late after guardband is already determined Ankit Nautiyal
2026-02-04 6:24 ` Hogander, Jouni
2026-02-04 5:02 ` [RESEND 2/5] drm/i915/alpm: Allow LOBF only if window1 > alpm check_entry lines Ankit Nautiyal
2026-02-04 5:02 ` [RESEND 3/5] drm/i915/alpm: Allow LOBF only for platform that have Always on VRR TG Ankit Nautiyal
2026-02-04 5:02 ` Ankit Nautiyal [this message]
2026-02-04 6:24 ` [RESEND 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update Hogander, Jouni
2026-02-04 5:02 ` [RESEND 5/5] drm/i915/alpm: Disable LOBF around transitioning for LRR/seamless MN Ankit Nautiyal
2026-02-04 6:26 ` ✓ i915.CI.BAT: success for LOBF fixes (rev5) Patchwork
2026-02-04 17:48 ` ✓ i915.CI.Full: " Patchwork
2026-02-05 9:20 ` [RESEND 0/5] LOBF fixes Nautiyal, Ankit K
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260204050250.762718-5-ankit.k.nautiyal@intel.com \
--to=ankit.k.nautiyal@intel.com \
--cc=animesh.manna@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jouni.hogander@intel.com \
--cc=michal.grzelak@intel.com \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox