From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com,
Uma Shankar <uma.shankar@intel.com>
Subject: [v4 09/20] drm/i915: Remove i915_reg.h from intel_display.c
Date: Thu, 5 Feb 2026 15:13:30 +0530 [thread overview]
Message-ID: <20260205094341.1882816-10-uma.shankar@intel.com> (raw)
In-Reply-To: <20260205094341.1882816-1-uma.shankar@intel.com>
Move CHICKEN_PIPESL_1 register definition to display header.
This allows intel_display.c free of i915_reg.h include.
v3: Fix commit header (Jani)
v2: Drop common header in include and use display_regs.h (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 1 -
.../gpu/drm/i915/display/intel_display_regs.h | 23 +++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 22 ------------------
3 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 295f14416be7..bd93add5101b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -50,7 +50,6 @@
#include "g4x_hdmi.h"
#include "hsw_ips.h"
#include "i915_config.h"
-#include "i915_reg.h"
#include "i9xx_plane.h"
#include "i9xx_plane_regs.h"
#include "i9xx_wm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 42aef6300320..0ee7295e1d4e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1543,6 +1543,29 @@
#define CHICKEN_FBC_STRIDE_MASK REG_GENMASK(12, 0)
#define CHICKEN_FBC_STRIDE(x) REG_FIELD_PREP(CHICKEN_FBC_STRIDE_MASK, (x))
+#define _CHICKEN_PIPESL_1_A 0x420b0
+#define _CHICKEN_PIPESL_1_B 0x420b4
+#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
+#define HSW_PRI_STRETCH_MAX_MASK REG_GENMASK(28, 27)
+#define HSW_PRI_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 0)
+#define HSW_PRI_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 1)
+#define HSW_PRI_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 2)
+#define HSW_PRI_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 3)
+#define HSW_SPR_STRETCH_MAX_MASK REG_GENMASK(26, 25)
+#define HSW_SPR_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 0)
+#define HSW_SPR_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 1)
+#define HSW_SPR_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 2)
+#define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
+#define HSW_FBCQ_DIS REG_BIT(22)
+#define HSW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(15) /* hsw */
+#define SKL_PSR_MASK_PLANE_FLIP REG_BIT(11) /* skl+ */
+#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
+#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
+#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
+#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
+#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
+#define BDW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(0) /* bdw */
+
#define _CHICKEN_TRANS_A 0x420c0
#define _CHICKEN_TRANS_B 0x420c4
#define _CHICKEN_TRANS_C 0x420c8
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e905250f4fa5..2be799ffbc2b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -878,28 +878,6 @@
#define CHICKEN_PAR2_1 _MMIO(0x42090)
#define KVM_CONFIG_CHANGE_NOTIFICATION_SELECT REG_BIT(14)
-#define _CHICKEN_PIPESL_1_A 0x420b0
-#define _CHICKEN_PIPESL_1_B 0x420b4
-#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
-#define HSW_PRI_STRETCH_MAX_MASK REG_GENMASK(28, 27)
-#define HSW_PRI_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 0)
-#define HSW_PRI_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 1)
-#define HSW_PRI_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 2)
-#define HSW_PRI_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 3)
-#define HSW_SPR_STRETCH_MAX_MASK REG_GENMASK(26, 25)
-#define HSW_SPR_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 0)
-#define HSW_SPR_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 1)
-#define HSW_SPR_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 2)
-#define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
-#define HSW_FBCQ_DIS REG_BIT(22)
-#define HSW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(15) /* hsw */
-#define SKL_PSR_MASK_PLANE_FLIP REG_BIT(11) /* skl+ */
-#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
-#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
-#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
-#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
-#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
-#define BDW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(0) /* bdw */
#define DISP_ARB_CTL _MMIO(0x45000)
#define DISP_FBC_MEMORY_WAKE REG_BIT(31)
--
2.50.1
next prev parent reply other threads:[~2026-02-05 9:28 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 9:43 [v4 00/20] Make Display free from i915_reg.h Uma Shankar
2026-02-05 9:43 ` [v4 01/20] drm/i915: Extract display registers from i915_reg.h to display Uma Shankar
2026-02-05 9:43 ` [v4 02/20] drm/i915: Extract South chicken " Uma Shankar
2026-02-05 9:43 ` [v4 03/20] drm/i915: Extract display interrupt definitions Uma Shankar
2026-02-05 9:43 ` [v4 04/20] drm/i915: Extract DSPCLK_GATE_D from i915_reg to display Uma Shankar
2026-02-05 9:43 ` [v4 05/20] drm/{i915, xe}: Extract pcode definitions to common header Uma Shankar
2026-02-11 12:44 ` Jani Nikula
2026-02-05 9:43 ` [v4 06/20] drm/i915: Remove i915_reg.h from intel_display_device.c Uma Shankar
2026-02-05 9:43 ` [v4 07/20] drm/i915: Move GMD_ID and mask to intel_gt header Uma Shankar
2026-02-11 12:45 ` Jani Nikula
2026-02-05 9:43 ` [v4 08/20] drm/i915: Remove i915_reg.h from intel_dram.c Uma Shankar
2026-02-11 12:46 ` Jani Nikula
2026-02-05 9:43 ` Uma Shankar [this message]
2026-02-05 9:43 ` [v4 10/20] drm/i915: Remove i915_reg.h from intel_overlay.c Uma Shankar
2026-02-05 9:43 ` [v4 11/20] drm/i915: Remove i915_reg.h from g4x_dp.c Uma Shankar
2026-02-11 12:48 ` Jani Nikula
2026-02-05 9:43 ` [v4 12/20] drm/i915: Remove i915_reg.h from i9xx_wm.c Uma Shankar
2026-02-11 12:56 ` Jani Nikula
2026-02-05 9:43 ` [v4 13/20] drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c Uma Shankar
2026-02-05 9:43 ` [v4 14/20] drm/i915: Remove i915_reg.h from intel_rom.c Uma Shankar
2026-02-11 12:51 ` Jani Nikula
2026-02-05 9:43 ` [v4 15/20] drm/i915: Remove i915_reg.h from intel_psr.c Uma Shankar
2026-02-05 9:43 ` [v4 16/20] drm/i915: Remove i915_reg.h from intel_fifo_underrun.c Uma Shankar
2026-02-05 9:43 ` [v4 17/20] drm/i915: Remove i915_reg.h from intel_display_irq.c Uma Shankar
2026-02-11 12:52 ` Jani Nikula
2026-02-05 9:43 ` [v4 18/20] drm/i915: Remove i915_reg.h from intel_display_power_well.c Uma Shankar
2026-02-11 12:54 ` Jani Nikula
2026-02-05 9:43 ` [v4 19/20] drm/i915: Remove i915_reg.h from intel_modeset_setup.c Uma Shankar
2026-02-05 9:43 ` [v4 20/20] drm/{i915, xe}: Remove i915_reg.h from display Uma Shankar
2026-02-11 12:55 ` Jani Nikula
2026-02-05 12:45 ` ✓ i915.CI.BAT: success for Make Display free from i915_reg.h (rev4) Patchwork
2026-02-06 5:54 ` ✓ i915.CI.Full: " Patchwork
2026-02-11 12:59 ` [v4 00/20] Make Display free from i915_reg.h Jani Nikula
2026-02-11 15:32 ` Shankar, Uma
2026-02-12 12:08 ` Shankar, Uma
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