From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com,
Uma Shankar <uma.shankar@intel.com>
Subject: [v4 12/20] drm/i915: Remove i915_reg.h from i9xx_wm.c
Date: Thu, 5 Feb 2026 15:13:33 +0530 [thread overview]
Message-ID: <20260205094341.1882816-13-uma.shankar@intel.com> (raw)
In-Reply-To: <20260205094341.1882816-1-uma.shankar@intel.com>
Move FW_BLC_SELF to common header to make i9xx_wm.c
free from i915_reg.h include. Introduce a common
intel_gmd_misc_regs.h to define common miscellaneous
register definitions across graphics and display.
v3: MISC header included as needed, drop from i915_reg (Jani)
v2: Introdue a common misc header for GMD
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
.../drm/i915/display/intel_display_debugfs.c | 1 +
.../gpu/drm/i915/display/intel_display_regs.h | 7 ++++++-
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 +
.../gpu/drm/i915/gt/intel_ring_submission.c | 1 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 ++
drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 +
drivers/gpu/drm/i915/gvt/mmio_context.c | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 19 -----------------
drivers/gpu/drm/i915/intel_clock_gating.c | 1 +
drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 +
include/drm/intel/intel_gmd_misc_regs.h | 21 +++++++++++++++++++
13 files changed, 38 insertions(+), 21 deletions(-)
create mode 100644 include/drm/intel/intel_gmd_misc_regs.h
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 39dfceb438ae..24f898efa9dd 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -6,8 +6,8 @@
#include <linux/iopoll.h>
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
-#include "i915_reg.h"
#include "i9xx_wm.h"
#include "i9xx_wm_regs.h"
#include "intel_atomic.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index aba13e8a9051..f041a7102317 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -13,6 +13,7 @@
#include <drm/drm_file.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "hsw_ips.h"
#include "i915_reg.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 5bc891f6de57..9f241655aa99 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -3132,6 +3132,11 @@ enum skl_power_gate {
#define MTL_TRAS_MASK REG_GENMASK(16, 8)
#define MTL_TRDPRE_MASK REG_GENMASK(7, 0)
-
+#define FW_BLC _MMIO(0x20d8)
+#define FW_BLC2 _MMIO(0x20dc)
+#define FW_BLC_SELF _MMIO(0x20e0) /* 915+ only */
+#define FW_BLC_SELF_EN_MASK REG_BIT(31)
+#define FW_BLC_SELF_FIFO_MASK REG_BIT(16) /* 945 only */
+#define FW_BLC_SELF_EN REG_BIT(15) /* 945 only */
#endif /* __INTEL_DISPLAY_REGS_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index 5eda98ebc1ae..ee90f5323da7 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -6,6 +6,7 @@
#include <linux/highmem.h>
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "display/intel_display.h"
#include "i915_drv.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index c1797e49811d..099453dd9cd5 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -5,6 +5,7 @@
#include <drm/drm_cache.h>
#include <drm/intel/intel_gmd_interrupt_regs.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "gem/i915_gem_internal.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index ece88c612e27..4427812b2438 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -3,6 +3,8 @@
* Copyright © 2014-2018 Intel Corporation
*/
+#include <drm/intel/intel_gmd_misc_regs.h>
+
#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_mmio_range.h"
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index bf7c3d3f5f8a..98c35c78a4ed 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -37,6 +37,7 @@
#include <linux/slab.h>
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "display/i9xx_plane_regs.h"
#include "display/intel_display_regs.h"
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index d4e9d485d382..3eb442acdf8d 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -34,6 +34,7 @@
*/
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "gt/intel_context.h"
#include "gt/intel_engine_regs.h"
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 42f6b44f0027..4778ba664ec7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -33,6 +33,7 @@
#include <drm/drm_debugfs.h>
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "gem/i915_gem_context.h"
#include "gt/intel_gt.h"
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b808d1ec5387..2bac216bd2b9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -393,24 +393,10 @@
#define GEN2_ERROR_REGS I915_ERROR_REGS(EMR, EIR)
-#define INSTPM _MMIO(0x20c0)
-#define INSTPM_SELF_EN (1 << 12) /* 915GM only */
-#define INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
- will not assert AGPBUSY# and will only
- be delivered when out of C3. */
-#define INSTPM_FORCE_ORDERING (1 << 7) /* GEN6+ */
-#define INSTPM_TLB_INVALIDATE (1 << 9)
-#define INSTPM_SYNC_FLUSH (1 << 5)
#define MEM_MODE _MMIO(0x20cc)
#define MEM_DISPLAY_B_TRICKLE_FEED_DISABLE (1 << 3) /* 830 only */
#define MEM_DISPLAY_A_TRICKLE_FEED_DISABLE (1 << 2) /* 830/845 only */
#define MEM_DISPLAY_TRICKLE_FEED_DISABLE (1 << 2) /* 85x only */
-#define FW_BLC _MMIO(0x20d8)
-#define FW_BLC2 _MMIO(0x20dc)
-#define FW_BLC_SELF _MMIO(0x20e0) /* 915+ only */
-#define FW_BLC_SELF_EN_MASK REG_BIT(31)
-#define FW_BLC_SELF_FIFO_MASK REG_BIT(16) /* 945 only */
-#define FW_BLC_SELF_EN REG_BIT(15) /* 945 only */
#define MM_BURST_LENGTH 0x00700000
#define MM_FIFO_WATERMARK 0x0001F000
#define LM_BURST_LENGTH 0x00000700
@@ -833,11 +819,6 @@
#define KVM_CONFIG_CHANGE_NOTIFICATION_SELECT REG_BIT(14)
-#define DISP_ARB_CTL _MMIO(0x45000)
-#define DISP_FBC_MEMORY_WAKE REG_BIT(31)
-#define DISP_TILE_SURFACE_SWIZZLING REG_BIT(13)
-#define DISP_FBC_WM_DIS REG_BIT(15)
-
#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
#define _LATENCY_REPORTING_REMOVED_PIPE_D REG_BIT(31)
#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30)
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
index 4e18d5a22112..1ad31435bd3f 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -26,6 +26,7 @@
*/
#include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "display/i9xx_plane_regs.h"
#include "display/intel_display.h"
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index 8cfe9b56f1d0..c8a51e773086 100644
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -4,6 +4,7 @@
*/
#include <drm/intel/intel_pcode_regs.h>
+#include <drm/intel/intel_gmd_misc_regs.h>
#include "display/bxt_dpio_phy_regs.h"
#include "display/i9xx_plane_regs.h"
diff --git a/include/drm/intel/intel_gmd_misc_regs.h b/include/drm/intel/intel_gmd_misc_regs.h
new file mode 100644
index 000000000000..763d7711f21c
--- /dev/null
+++ b/include/drm/intel/intel_gmd_misc_regs.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2026 Intel Corporation */
+
+#ifndef _INTEL_GMD_MISC_REGS_H_
+#define _INTEL_GMD_MISC_REGS_H_
+
+#define DISP_ARB_CTL _MMIO(0x45000)
+#define DISP_FBC_MEMORY_WAKE REG_BIT(31)
+#define DISP_TILE_SURFACE_SWIZZLING REG_BIT(13)
+#define DISP_FBC_WM_DIS REG_BIT(15)
+
+#define INSTPM _MMIO(0x20c0)
+#define INSTPM_SELF_EN (1 << 12) /* 915GM only */
+#define INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
+ will not assert AGPBUSY# and will only
+ be delivered when out of C3. */
+#define INSTPM_FORCE_ORDERING (1 << 7) /* GEN6+ */
+#define INSTPM_TLB_INVALIDATE (1 << 9)
+#define INSTPM_SYNC_FLUSH (1 << 5)
+
+#endif
--
2.50.1
next prev parent reply other threads:[~2026-02-05 9:28 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 9:43 [v4 00/20] Make Display free from i915_reg.h Uma Shankar
2026-02-05 9:43 ` [v4 01/20] drm/i915: Extract display registers from i915_reg.h to display Uma Shankar
2026-02-05 9:43 ` [v4 02/20] drm/i915: Extract South chicken " Uma Shankar
2026-02-05 9:43 ` [v4 03/20] drm/i915: Extract display interrupt definitions Uma Shankar
2026-02-05 9:43 ` [v4 04/20] drm/i915: Extract DSPCLK_GATE_D from i915_reg to display Uma Shankar
2026-02-05 9:43 ` [v4 05/20] drm/{i915, xe}: Extract pcode definitions to common header Uma Shankar
2026-02-11 12:44 ` Jani Nikula
2026-02-05 9:43 ` [v4 06/20] drm/i915: Remove i915_reg.h from intel_display_device.c Uma Shankar
2026-02-05 9:43 ` [v4 07/20] drm/i915: Move GMD_ID and mask to intel_gt header Uma Shankar
2026-02-11 12:45 ` Jani Nikula
2026-02-05 9:43 ` [v4 08/20] drm/i915: Remove i915_reg.h from intel_dram.c Uma Shankar
2026-02-11 12:46 ` Jani Nikula
2026-02-05 9:43 ` [v4 09/20] drm/i915: Remove i915_reg.h from intel_display.c Uma Shankar
2026-02-05 9:43 ` [v4 10/20] drm/i915: Remove i915_reg.h from intel_overlay.c Uma Shankar
2026-02-05 9:43 ` [v4 11/20] drm/i915: Remove i915_reg.h from g4x_dp.c Uma Shankar
2026-02-11 12:48 ` Jani Nikula
2026-02-05 9:43 ` Uma Shankar [this message]
2026-02-11 12:56 ` [v4 12/20] drm/i915: Remove i915_reg.h from i9xx_wm.c Jani Nikula
2026-02-05 9:43 ` [v4 13/20] drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c Uma Shankar
2026-02-05 9:43 ` [v4 14/20] drm/i915: Remove i915_reg.h from intel_rom.c Uma Shankar
2026-02-11 12:51 ` Jani Nikula
2026-02-05 9:43 ` [v4 15/20] drm/i915: Remove i915_reg.h from intel_psr.c Uma Shankar
2026-02-05 9:43 ` [v4 16/20] drm/i915: Remove i915_reg.h from intel_fifo_underrun.c Uma Shankar
2026-02-05 9:43 ` [v4 17/20] drm/i915: Remove i915_reg.h from intel_display_irq.c Uma Shankar
2026-02-11 12:52 ` Jani Nikula
2026-02-05 9:43 ` [v4 18/20] drm/i915: Remove i915_reg.h from intel_display_power_well.c Uma Shankar
2026-02-11 12:54 ` Jani Nikula
2026-02-05 9:43 ` [v4 19/20] drm/i915: Remove i915_reg.h from intel_modeset_setup.c Uma Shankar
2026-02-05 9:43 ` [v4 20/20] drm/{i915, xe}: Remove i915_reg.h from display Uma Shankar
2026-02-11 12:55 ` Jani Nikula
2026-02-05 12:45 ` ✓ i915.CI.BAT: success for Make Display free from i915_reg.h (rev4) Patchwork
2026-02-06 5:54 ` ✓ i915.CI.Full: " Patchwork
2026-02-11 12:59 ` [v4 00/20] Make Display free from i915_reg.h Jani Nikula
2026-02-11 15:32 ` Shankar, Uma
2026-02-12 12:08 ` Shankar, Uma
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