* [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
@ 2026-09-06 9:41 Xiao Lu
2026-09-06 10:00 ` sashiko-bot
` (10 more replies)
0 siblings, 11 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-06 9:41 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
(DP_DSC_PASSTHROUGH_IS_SUPPORTED) combined with the downstream HDMI
2.1 sink's DSC 1.2 support from EDID HF-VSDB. Cache the result in
connector->dp.pcon_dsc_passthrough (same lifecycle as fec_capability
and dsc_dpcd) to avoid repeated lookups on every modeset.
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC slice count from the downstream HDMI sink EDID DSC
capabilities (dsc_cap.max_slices, dsc_cap.clk_per_slice) rather than
from the PCON encoder DPCD (all-zero for passthrough-only PCONs).
- Compute DSC parameters via intel_dp_pcon_passthrough_dsc_compute_params()
which uses HDMI sink EDID capabilities for DSC version, color format,
line buffer depth and block prediction, bypassing the PCON dsc_dpcd
fields that do not reflect the actual decompressor (the HDMI sink).
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough since the
PCON dsc_dpcd color_depth_cap field is not applicable to the passthrough
path and would incorrectly clamp the pipe bpp to zero.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path in that function is
preserved; the PCON case is handled by redirecting aux to
intel_dp->aux when pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress (the HDMI sink
does); writing DP_DECOMPRESSION_EN to the PCON would be incorrect.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected to a Lenovo
ThinkVision Pro 27UD-10 (HDMI 2.1, DSC 1.2, max 16 slices, 400 MHz/
slice). At 4K@240Hz DSC compression is required (10.5625 bpp, 8 slices);
driver now writes 0x160=0x02 explicitly and slice count is correctly
derived from the HDMI sink EDID rather than from PCON DPCD.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
Fix intel_hdmi_dsc_get_num_slices() call to pass output_format as
the 2nd argument matching the updated 6-parameter signature.
Add intel_dp_pcon_passthrough_dsc_compute_params() to compute DSC
parameters from HDMI sink EDID rather than PCON dsc_dpcd fields
(version, color format, line_buf_depth, block_pred are not valid
for a passthrough-only PCON that does no decoding).
Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap (0x00) from zeroing pipe.max_bpp.
Fix intel_dp_dsc_compute_config() to use the correct connector
context instead of intel_dp->attached_connector for MST streams.
v3: Restrict PCON DSC passthrough to SST direct connections only.
In MST topologies the PCON is connected through an intermediate hub;
passthrough is already handled separately via the MST hub path in
intel_dp_sink_set_dsc_passthrough(), so skip it here by returning
early when connector->mst.port is set.
Fix intel_hdmi_dsc_get_num_slices() call to use drm_display_mode *
instead of intel_crtc_state * to match the updated function signature.
v2: Fix build failure on drm-tip - replace non-existent dsc.slice_count
field with dsc.slice_config. Introduce
intel_dp_pcon_passthrough_dsc_slice_config() which calls
intel_hdmi_dsc_get_num_slices() for the target slice count then
finds a matching intel_dsc_slice_config via intel_dsc_get_slice_config()
to satisfy Intel VDSC HW constraints.
Fix pcon_dsc_passthrough caching order: move
intel_dp_pcon_set_dsc_passthrough_cap() from intel_dp_get_dsc_sink_cap()
to intel_dp_set_edid() so it runs after EDID is parsed and
display_info.hdmi.dsc_cap is populated. Also clear pcon_dsc_passthrough
in intel_dp_unset_edid() to keep lifecycle consistent.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 241 +++++++++++++++---
2 files changed, 212 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..f1badfae0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,42 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ vdsc_cfg->convert_rgb = true;
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
+ DP_DSC_RGB;
+
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2336,10 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2378,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2683,8 +2719,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2758,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3777,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3793,19 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (!connector->mst.port) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN on
+ * the PCON's own aux channel so it forwards the compressed
+ * stream to the HDMI sink instead of decoding it.
+ */
+ if (connector->dp.pcon_dsc_passthrough)
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3813,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4335,101 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+static void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
+{
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info;
+
+ if (!connector)
+ return;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * PCON DSC passthrough is only supported for SST direct connections.
+ * In MST topologies the intermediate hub may report incorrect virtual
+ * DPCD for the downstream PCON port, leading to mismatched DSC
+ * parameters. Skip passthrough for MST until hub firmware correctly
+ * reflects the PCON's capabilities.
+ */
+ if (connector->mst.port)
+ return;
+
+ if (!intel_dp_is_hdmi_2_1_sink(intel_dp))
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ info = &connector->base.display_info;
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * Derive the required slice count from the downstream HDMI 2.1 sink
+ * DSC capabilities in EDID (not from the PCON encoder DPCD which is
+ * all-zero for passthrough-only devices).
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ hdmi_max_slices,
+ crtc_state->hw.adjusted_mode.hdisplay,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ if (intel_dsc_line_slice_count(&config) == target_slices) {
+ *config_ret = config;
+ return true;
+ }
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4681,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -4539,6 +4711,8 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
if (drm_dp_has_quirk(desc, DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT) &&
desc->ident.hw_rev == 0x10)
connector->dp.dsc_throughput_quirk = true;
+
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_attached_dp(connector));
}
static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *connector)
@@ -6148,6 +6322,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6350,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-06 10:00 ` sashiko-bot
2026-09-06 10:23 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4) Patchwork
` (9 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-06 10:00 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 6 potential issue(s) to consider:
- [High] PCON DSC passthrough slice calculation bypasses source and DP link minimum slice requirements.
- [High] `intel_dp_pcon_set_dsc_passthrough_cap` incorrectly updates the root connector's state when probing MST streams, causing data races.
- [High] Unconditional RGB conversion for all PCON passthrough streams corrupts YCbCr formats.
- [High] Passing `hdisplay` as `src_max_slice_width` prevents 1-slice DSC configurations for all standard resolutions.
- [High] PCON DSC passthrough modes are incorrectly rejected during mode validation because `intel_dp_mode_valid` relies on the all-zero PCON DPCD.
- [High] Missing horizontal display width divisibility check for DSC slice count in PCON DSC passthrough.
--
commit 78dd30c6b107d4f8cce9fa9760f0a389a8f18b26
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034cf..90a2ba6122e46 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
> connector->panel.vbt.edp.dsc_disable)
> return false;
>
> - if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
> - return false;
> + if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
> + /*
> + * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
> + * zero, but if pcon_dsc_passthrough is set (cached at connect
> + * time) the downstream HDMI 2.1 sink will decompress instead.
> + */
> + return connector->dp.pcon_dsc_passthrough;
> + }
>
> return true;
> }
[Severity: High]
This update handles the all-zero PCON DPCD for capabilities, but is there a
similar update missing in intel_dp_mode_valid() and
intel_dp_mode_valid_with_dsc()?
During mode validation, intel_dp_mode_valid() calls
intel_dp_dsc_compute_max_bpp() and intel_dp_dsc_get_slice_count(), which still
rely on the all-zero PCON DPCD. For passthrough-only PCONs,
connector->dp.dsc_dpcd is entirely zeroes, causing
intel_dp_dsc_get_slice_count() to find 0 slices. This results in
dsc_slice_count == 0 inside intel_dp_mode_valid_with_dsc(), which immediately
returns false and silently rejects valid DSC modes during EDID probing.
[ ... ]
> @@ -1866,28 +1872,42 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
> if (ret)
> return ret;
>
> - vdsc_cfg->dsc_version_major =
> - (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
> - DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
> - vdsc_cfg->dsc_version_minor =
> - min(intel_dp_source_dsc_version_minor(display),
> - intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
> - if (vdsc_cfg->convert_rgb)
> - vdsc_cfg->convert_rgb =
> - connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
> - DP_DSC_RGB;
> -
> - vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
> - drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
> - if (!vdsc_cfg->line_buf_depth) {
> - drm_dbg_kms(display->drm,
> - "DSC Sink Line Buffer Depth invalid\n");
> - return -EINVAL;
> - }
> + if (connector->dp.pcon_dsc_passthrough) {
> + /*
> + * For PCON passthrough the HDMI 2.1 sink decompresses, not the
> + * PCON. The PCON dsc_dpcd fields reflect passthrough device
> + * constraints and are not valid for configuring the source VDSC
> + * engine. Use DSC 1.2 sink defaults instead.
> + */
> + vdsc_cfg->dsc_version_major = 1;
> + vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
> + vdsc_cfg->convert_rgb = true;
[Severity: High]
Does this unconditional assignment override the correctly computed convert_rgb
value for YCbCr pipelines?
intel_dsc_compute_params() correctly sets vdsc_cfg->convert_rgb = false for
YCbCr formats. Unconditionally overwriting it with true here will cause the
VDSC engine to apply RGB-to-YCoCg conversion to data that is already in YCbCr
format, corrupting the colors.
[ ... ]
> +static void
> +intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
> +{
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info;
> +
> + if (!connector)
> + return;
> +
> + connector->dp.pcon_dsc_passthrough = false;
> +
> + /*
> + * PCON DSC passthrough is only supported for SST direct connections.
> + * In MST topologies the intermediate hub may report incorrect virtual
> + * DPCD for the downstream PCON port, leading to mismatched DSC
> + * parameters. Skip passthrough for MST until hub firmware correctly
> + * reflects the PCON's capabilities.
> + */
> + if (connector->mst.port)
> + return;
[Severity: High]
Does this incorrectly update the root connector's state when probing MST
streams, causing data races?
When intel_dp_get_dsc_sink_cap() is called during MST port probing, it passes
intel_attached_dp(connector), which returns the root port's intel_dp. Here,
intel_dp->attached_connector resolves to the root SST connector instead of the
MST connector.
Because the root connector isn't an MST port, the connector->mst.port early
return fails. This causes the code to read and modify the shared root
connector's pcon_dsc_passthrough flag, potentially concurrently with other
operations on every MST display hotplug or EDID read.
[ ... ]
> +static bool
> +intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + struct intel_dsc_slice_config *config_ret)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info = &connector->base.display_info;
> + int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
> + int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
> + int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
> + int target_slices;
> + int slices_per_pipe;
> +
> + /*
> + * Derive the required slice count from the downstream HDMI 2.1 sink
> + * DSC capabilities in EDID (not from the PCON encoder DPCD which is
> + * all-zero for passthrough-only devices).
> + */
> + target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
> + crtc_state->output_format,
> + hdmi_max_slices,
> + crtc_state->hw.adjusted_mode.hdisplay,
[Severity: High]
Does passing hdisplay as src_max_slice_width prevent 1-slice DSC
configurations for all standard resolutions?
intel_hdmi_dsc_get_num_slices() limits max_slice_width to
min(MAX_HDMI_SLICE_WIDTH, src_max_slice_width). By passing hdisplay as
src_max_slice_width, max_slice_width becomes exactly hdisplay.
When evaluating 1 slice, slice_width = hdisplay. The loop condition
if (slice_width >= max_slice_width) evaluates to if (hdisplay >= hdisplay),
which is always true. This immediately increments min_slices and rejects the
1-slice configuration for any resolution where hdisplay <= 2720 (e.g., 1080p,
1440p), forcing an unnecessary fallback to 2+ slices.
> + hdmi_max_slices,
> + hdmi_throughput);
> + if (!target_slices)
> + return false;
> +
> + drm_dbg_kms(display->drm,
> + "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
> + " (max_slices=%d clk_per_slice=%d MHz)\n",
> + target_slices, hdmi_max_slices, hdmi_throughput);
> +
> + for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
> + struct intel_dsc_slice_config config;
> +
> + if (!intel_dsc_get_slice_config(display,
> + num_joined_pipes, slices_per_pipe,
> + &config))
> + continue;
> +
> + if (intel_dsc_line_slice_count(&config) == target_slices) {
[Severity: High]
Are we missing a validation against the source VDSC engine's minimum slice
requirements here?
This strict equality check enforces the HDMI sink's minimum slice count, but it
completely bypasses intel_dp_dsc_min_slice_count() which enforces Intel's
source VDSC hardware limits. Any display mode where the VDSC engine requires
more slices than the HDMI link minimum will be misconfigured.
[Severity: High]
Is a horizontal display width divisibility check also missing here?
The loop accepts the configuration without verifying that the active display
width is perfectly divisible by the slice count (i.e.
mode_hdisplay % target_slices == 0). If the width isn't divisible, fractional
slice widths will be programmed into the VDSC hardware, leading to
unrecoverable pipe underruns and GPU hangs.
> + *config_ret = config;
> + return true;
> + }
> + }
> +
> + return false;
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260906094156.1057767-1-xiaolu.xie@intel.com?part=1
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-06 10:00 ` sashiko-bot
@ 2026-09-06 10:23 ` Patchwork
2026-09-06 12:28 ` ✗ i915.CI.Full: failure " Patchwork
` (8 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-06 10:23 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1014 bytes --]
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4)
URL : https://patchwork.freedesktop.org/series/173452/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19093 -> Patchwork_173452v4
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/index.html
Participating hosts (39 -> 38)
------------------------------
Missing (1): bat-dg2-13
Changes
-------
No changes found
Build changes
-------------
* Linux: CI_DRM_19093 -> Patchwork_173452v4
CI-20190529: 20190529
CI_DRM_19093: 36a10efe69894eba7e10e3075c297b6e332e6957 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9084: 9084
Patchwork_173452v4: 36a10efe69894eba7e10e3075c297b6e332e6957 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/index.html
[-- Attachment #2: Type: text/html, Size: 1579 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✗ i915.CI.Full: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-06 10:00 ` sashiko-bot
2026-09-06 10:23 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4) Patchwork
@ 2026-09-06 12:28 ` Patchwork
2026-09-07 4:41 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
` (7 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-06 12:28 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 161041 bytes --]
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4)
URL : https://patchwork.freedesktop.org/series/173452/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_19093_full -> Patchwork_173452v4_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_173452v4_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_173452v4_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_173452v4_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_eio@kms:
- shard-tglu-1: NOTRUN -> [ABORT][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_eio@kms.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-mtlp: [PASS][2] -> [ABORT][3] +1 other test abort
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-mtlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-mtlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html
New tests
---------
New tests have been introduced between CI_DRM_19093_full and Patchwork_173452v4_full:
### New IGT tests (19) ###
* igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-3:
- Statuses : 1 skip(s)
- Exec time: [0.06] s
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_cursor_crc@cursor-offscreen-256x256@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [2.45] s
* igt@kms_cursor_crc@cursor-offscreen-64x64@pipe-c-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [2.65] s
* igt@kms_cursor_crc@cursor-random-256x256@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [4.22] s
* igt@kms_cursor_crc@cursor-random-256x256@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [4.65] s
* igt@kms_cursor_crc@cursor-random-256x256@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [4.53] s
* igt@kms_cursor_crc@cursor-random-64x21@pipe-c-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [4.27] s
* igt@kms_cursor_crc@cursor-random-64x64@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [4.22] s
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [4.07] s
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [4.34] s
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-c-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [3.90] s
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [4.33] s
* igt@kms_flip@basic-flip-vs-wf_vblank@a-hdmi-a4:
- Statuses : 1 pass(s)
- Exec time: [1.09] s
* igt@kms_flip@basic-flip-vs-wf_vblank@b-hdmi-a4:
- Statuses : 1 pass(s)
- Exec time: [1.00] s
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a4:
- Statuses : 1 pass(s)
- Exec time: [1.00] s
* igt@kms_flip@basic-flip-vs-wf_vblank@d-hdmi-a4:
- Statuses : 1 pass(s)
- Exec time: [1.01] s
Known issues
------------
Here are the changes found in Patchwork_173452v4_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg1: NOTRUN -> [SKIP][4] ([i915#8411]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@api_intel_bb@crc32:
- shard-dg1: NOTRUN -> [SKIP][5] ([i915#6230])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@api_intel_bb@crc32.html
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#8411]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@device_reset@cold-reset-bound:
- shard-dg2: NOTRUN -> [SKIP][7] ([i915#11078]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@device_reset@cold-reset-bound.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-tglu-1: NOTRUN -> [SKIP][8] ([i915#9323])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_ccs@block-multicopy-inplace:
- shard-rkl: NOTRUN -> [SKIP][9] ([i915#3555] / [i915#9323])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@gem_ccs@block-multicopy-inplace.html
- shard-tglu-1: NOTRUN -> [SKIP][10] ([i915#3555] / [i915#9323])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_ccs@block-multicopy-inplace.html
* igt@gem_ccs@suspend-resume:
- shard-tglu: NOTRUN -> [SKIP][11] ([i915#9323]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@gem_ccs@suspend-resume.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0:
- shard-dg2: [PASS][12] -> [INCOMPLETE][13] ([i915#13356] / [i915#16348])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg2-7/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][14] ([i915#7697]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-dg2: NOTRUN -> [SKIP][15] ([i915#7697]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_close_race@multigpu-basic-threads.html
- shard-rkl: NOTRUN -> [SKIP][16] ([i915#7697])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@gem_close_race@multigpu-basic-threads.html
- shard-dg1: NOTRUN -> [SKIP][17] ([i915#7697]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-clear@smem0:
- shard-mtlp: [PASS][18] -> [INCOMPLETE][19] ([i915#16884]) +1 other test incomplete
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-mtlp-5/igt@gem_create@create-clear@smem0.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-mtlp-4/igt@gem_create@create-clear@smem0.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: NOTRUN -> [FAIL][20] ([i915#15454])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-tglu: NOTRUN -> [SKIP][21] ([i915#6335])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_create@create-ext-set-pat:
- shard-dg2: NOTRUN -> [SKIP][22] ([i915#8562])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@gem_create@create-ext-set-pat.html
- shard-dg1: NOTRUN -> [SKIP][23] ([i915#8562])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_create@create-ext-set-pat.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg2: NOTRUN -> [SKIP][24] ([i915#8555]) +4 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_persistence@heartbeat-stop:
- shard-dg1: NOTRUN -> [SKIP][25] ([i915#8555]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@gem_ctx_persistence@heartbeat-stop.html
* igt@gem_ctx_persistence@saturated-hostile-nopreempt:
- shard-dg2: NOTRUN -> [SKIP][26] ([i915#5882]) +7 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gem_ctx_persistence@saturated-hostile-nopreempt.html
* igt@gem_ctx_persistence@smoketest:
- shard-snb: NOTRUN -> [SKIP][27] ([i915#1099]) +5 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-snb5/igt@gem_ctx_persistence@smoketest.html
* igt@gem_ctx_sseu@engines:
- shard-dg1: NOTRUN -> [SKIP][28] ([i915#280]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@gem_ctx_sseu@engines.html
* igt@gem_ctx_sseu@invalid-args:
- shard-tglu: NOTRUN -> [SKIP][29] ([i915#280])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#280]) +2 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_ctx_sseu@invalid-sseu.html
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#280]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_ctx_sseu@mmap-args:
- shard-tglu-1: NOTRUN -> [SKIP][32] ([i915#280])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@in-flight-suspend:
- shard-glk11: NOTRUN -> [INCOMPLETE][33] ([i915#13390])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk11/igt@gem_eio@in-flight-suspend.html
* igt@gem_eio@kms:
- shard-dg1: NOTRUN -> [ABORT][34] ([i915#16837] / [i915#16931])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-17/igt@gem_eio@kms.html
* igt@gem_eio@reset-stress@bsd:
- shard-snb: NOTRUN -> [FAIL][35] ([i915#8898]) +3 other tests fail
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-snb6/igt@gem_eio@reset-stress@bsd.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#4812]) +3 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_balancer@bonded-semaphore:
- shard-dg1: NOTRUN -> [SKIP][37] ([i915#4812]) +3 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@gem_exec_balancer@bonded-semaphore.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg2: NOTRUN -> [SKIP][38] ([i915#4771]) +1 other test skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@gem_exec_balancer@bonded-sync.html
- shard-dg1: NOTRUN -> [SKIP][39] ([i915#4771]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_balancer@parallel:
- shard-rkl: NOTRUN -> [SKIP][40] ([i915#4525])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-tglu: NOTRUN -> [SKIP][41] ([i915#4525]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-tglu-1: NOTRUN -> [SKIP][42] ([i915#4525]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_capture@capture-invisible:
- shard-dg1: NOTRUN -> [SKIP][43] ([i915#6334]) +2 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-glk: NOTRUN -> [SKIP][44] ([i915#6334]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_capture@capture-recoverable:
- shard-rkl: NOTRUN -> [SKIP][45] ([i915#6344])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@gem_exec_capture@capture-recoverable.html
- shard-tglu-1: NOTRUN -> [SKIP][46] ([i915#6344])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_flush@basic-uc-pro-default:
- shard-dg2: NOTRUN -> [SKIP][47] ([i915#3539] / [i915#4852]) +6 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_exec_flush@basic-uc-pro-default.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg1: NOTRUN -> [SKIP][48] ([i915#3539])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_exec_flush@basic-uc-prw-default.html
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#3539])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_flush@basic-wb-ro-before-default:
- shard-dg1: NOTRUN -> [SKIP][50] ([i915#3539] / [i915#4852])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@gem_exec_flush@basic-wb-ro-before-default.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-dg2: NOTRUN -> [SKIP][51] ([i915#5107])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_reloc@basic-active:
- shard-dg2: NOTRUN -> [SKIP][52] ([i915#3281]) +34 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_exec_reloc@basic-active.html
* igt@gem_exec_reloc@basic-gtt-read-noreloc:
- shard-rkl: NOTRUN -> [SKIP][53] ([i915#3281]) +6 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-read-noreloc.html
* igt@gem_exec_reloc@basic-wc-cpu-noreloc:
- shard-dg1: NOTRUN -> [SKIP][54] ([i915#3281]) +14 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_exec_reloc@basic-wc-cpu-noreloc.html
* igt@gem_exec_schedule@reorder-wide:
- shard-dg2: NOTRUN -> [SKIP][55] ([i915#4537] / [i915#4812]) +2 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_fence_thrash@bo-write-verify-x:
- shard-dg2: NOTRUN -> [SKIP][56] ([i915#4860]) +5 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gem_fence_thrash@bo-write-verify-x.html
* igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
- shard-dg1: NOTRUN -> [SKIP][57] ([i915#4860]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-tglu-1: NOTRUN -> [SKIP][58] ([i915#4613] / [i915#7582])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-dg1: NOTRUN -> [SKIP][59] ([i915#12193])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:
- shard-dg1: NOTRUN -> [SKIP][60] ([i915#4565])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html
* igt@gem_lmem_swapping@massive:
- shard-rkl: NOTRUN -> [SKIP][61] ([i915#4613]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@verify:
- shard-tglu-1: NOTRUN -> [SKIP][62] ([i915#4613])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_lmem_swapping@verify.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-tglu: NOTRUN -> [SKIP][63] ([i915#4613]) +6 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@gem_lmem_swapping@verify-ccs.html
- shard-glk: NOTRUN -> [SKIP][64] ([i915#4613]) +4 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk2/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_media_fill@media-fill:
- shard-dg2: NOTRUN -> [SKIP][65] ([i915#8289])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_media_fill@media-fill.html
* igt@gem_media_vme:
- shard-dg1: NOTRUN -> [SKIP][66] ([i915#284])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@gem_media_vme.html
* igt@gem_mmap@bad-object:
- shard-dg1: NOTRUN -> [SKIP][67] ([i915#4083]) +9 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_mmap@bad-object.html
* igt@gem_mmap_gtt@basic-small-bo:
- shard-dg2: NOTRUN -> [SKIP][68] ([i915#4077]) +37 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gem_mmap_gtt@basic-small-bo.html
* igt@gem_mmap_wc@write-prefaulted:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#4083]) +17 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@gem_mmap_wc@write-prefaulted.html
* igt@gem_partial_pwrite_pread@reads:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#3282]) +14 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@gem_partial_pwrite_pread@reads.html
* igt@gem_partial_pwrite_pread@write:
- shard-rkl: NOTRUN -> [SKIP][71] ([i915#3282]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@gem_partial_pwrite_pread@write.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-dg1: NOTRUN -> [SKIP][72] ([i915#3282]) +7 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglu: NOTRUN -> [WARN][73] ([i915#2658])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@display-protected-crc:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#4270]) +8 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@gem_pxp@display-protected-crc.html
* igt@gem_pxp@hw-rejects-pxp-context:
- shard-tglu-1: NOTRUN -> [SKIP][75] ([i915#13398])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_pxp@hw-rejects-pxp-context.html
* igt@gem_pxp@reject-modify-context-protection-on:
- shard-dg1: NOTRUN -> [SKIP][76] ([i915#4270]) +3 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_pxp@reject-modify-context-protection-on.html
* igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
- shard-dg2: NOTRUN -> [SKIP][77] ([i915#5190] / [i915#8428]) +19 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_render_tiled_blits@basic:
- shard-dg1: NOTRUN -> [SKIP][78] ([i915#4079]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@gem_render_tiled_blits@basic.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-dg2: NOTRUN -> [SKIP][79] ([i915#4885]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_tiled_partial_pwrite_pread@writes-after-reads:
- shard-dg1: NOTRUN -> [SKIP][80] ([i915#4077]) +15 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html
* igt@gem_tiled_pread_basic@basic:
- shard-dg2: NOTRUN -> [SKIP][81] ([i915#15657])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gem_tiled_pread_basic@basic.html
* igt@gem_tiled_pread_pwrite:
- shard-dg2: NOTRUN -> [SKIP][82] ([i915#4079]) +1 other test skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@gem_tiled_pread_pwrite.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-glk: NOTRUN -> [SKIP][83] ([i915#3323])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-dg2: NOTRUN -> [SKIP][84] ([i915#3297]) +5 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-dg1: NOTRUN -> [SKIP][85] ([i915#3282] / [i915#3297])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-tglu: NOTRUN -> [SKIP][86] ([i915#3297]) +3 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap:
- shard-dg1: NOTRUN -> [SKIP][87] ([i915#3297] / [i915#4880])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-tglu-1: NOTRUN -> [SKIP][88] ([i915#3297])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gem_userptr_blits@unsync-unmap.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-dg1: NOTRUN -> [SKIP][89] ([i915#3297]) +4 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gen7_exec_parse@bitmasks:
- shard-dg2: NOTRUN -> [SKIP][90] +39 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@gen7_exec_parse@bitmasks.html
* igt@gen9_exec_parse@bb-large:
- shard-dg1: NOTRUN -> [SKIP][91] ([i915#2527]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@gen9_exec_parse@bb-large.html
* igt@gen9_exec_parse@bb-oversize:
- shard-tglu-1: NOTRUN -> [SKIP][92] ([i915#2527] / [i915#2856]) +2 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@gen9_exec_parse@bb-oversize.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-tglu: NOTRUN -> [SKIP][93] ([i915#2527] / [i915#2856]) +6 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@gen9_exec_parse@secure-batches:
- shard-rkl: NOTRUN -> [SKIP][94] ([i915#2527]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@gen9_exec_parse@secure-batches.html
* igt@gen9_exec_parse@shadow-peek:
- shard-dg2: NOTRUN -> [SKIP][95] ([i915#2856]) +10 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@gen9_exec_parse@shadow-peek.html
* igt@gpu_buddy@gpu_buddy:
- shard-dg2: NOTRUN -> [SKIP][96] ([i915#15678])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@gpu_buddy@gpu_buddy.html
* igt@i915_drm_fdinfo@all-busy-idle-check-all:
- shard-dg2: NOTRUN -> [SKIP][97] ([i915#14123]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@i915_drm_fdinfo@all-busy-idle-check-all.html
- shard-dg1: NOTRUN -> [SKIP][98] ([i915#14123]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@i915_drm_fdinfo@all-busy-idle-check-all.html
* igt@i915_drm_fdinfo@busy-hang@rcs0:
- shard-dg2: NOTRUN -> [SKIP][99] ([i915#14073]) +15 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@i915_drm_fdinfo@busy-hang@rcs0.html
* igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs0:
- shard-dg1: NOTRUN -> [SKIP][100] ([i915#14073]) +11 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs0.html
* igt@i915_drm_fdinfo@virtual-busy:
- shard-dg1: NOTRUN -> [SKIP][101] ([i915#14118]) +1 other test skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@i915_drm_fdinfo@virtual-busy.html
* igt@i915_drm_fdinfo@virtual-busy-idle-all:
- shard-dg2: NOTRUN -> [SKIP][102] ([i915#14118]) +5 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@i915_drm_fdinfo@virtual-busy-idle-all.html
* igt@i915_module_load@fault-injection:
- shard-dg1: NOTRUN -> [ABORT][103] ([i915#11814] / [i915#15481]) +1 other test abort
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@i915_module_load@fault-injection.html
* igt@i915_module_load@fault-injection@i915_driver_mmio_probe:
- shard-dg1: NOTRUN -> [INCOMPLETE][104] ([i915#15481])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@i915_module_load@fault-injection@i915_driver_mmio_probe.html
* igt@i915_module_load@fault-injection@intel_connector_register:
- shard-tglu: NOTRUN -> [ABORT][105] ([i915#15342]) +1 other test abort
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@i915_module_load@fault-injection@intel_connector_register.html
* igt@i915_module_load@fault-injection@uc_fw_rsa_data_create:
- shard-tglu: NOTRUN -> [SKIP][106] ([i915#15479]) +4 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@i915_module_load@fault-injection@uc_fw_rsa_data_create.html
* igt@i915_module_load@reload-no-display:
- shard-dg2: NOTRUN -> [DMESG-WARN][107] ([i915#13029] / [i915#14545])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@i915_module_load@reload-no-display.html
- shard-dg1: NOTRUN -> [DMESG-WARN][108] ([i915#13029] / [i915#14545])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@i915_module_load@reload-no-display.html
* igt@i915_module_load@resize-bar:
- shard-dg1: NOTRUN -> [SKIP][109] ([i915#7178])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@i915_module_load@resize-bar.html
- shard-tglu: NOTRUN -> [SKIP][110] ([i915#6412])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@i915_module_load@resize-bar.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-tglu: NOTRUN -> [SKIP][111] ([i915#8399])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-tglu: NOTRUN -> [SKIP][112] ([i915#6590]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-tglu: NOTRUN -> [SKIP][113] ([i915#14498])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@i915_pm_rps@basic-api:
- shard-dg2: NOTRUN -> [SKIP][114] ([i915#11681] / [i915#6621])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_rps@min-max-config-idle:
- shard-dg1: NOTRUN -> [SKIP][115] ([i915#11681] / [i915#6621])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@i915_pm_rps@min-max-config-idle.html
* igt@i915_pm_rps@thresholds-idle-park:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#11681])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@i915_pm_rps@thresholds-idle-park.html
* igt@i915_pm_rps@thresholds-park:
- shard-dg1: NOTRUN -> [SKIP][117] ([i915#11681]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@i915_pm_rps@thresholds-park.html
* igt@i915_pm_sseu@full-enable:
- shard-dg2: NOTRUN -> [SKIP][118] ([i915#4387])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@i915_pm_sseu@full-enable.html
- shard-rkl: NOTRUN -> [SKIP][119] ([i915#4387])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@i915_pm_sseu@full-enable.html
- shard-dg1: NOTRUN -> [SKIP][120] ([i915#4387])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@hwconfig_table:
- shard-tglu: NOTRUN -> [SKIP][121] ([i915#6245])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@i915_query@hwconfig_table.html
* igt@i915_query@query-topology-coherent-slice-mask:
- shard-dg2: NOTRUN -> [SKIP][122] ([i915#6188])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@i915_query@query-topology-coherent-slice-mask.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-tglu: NOTRUN -> [SKIP][123] ([i915#16109])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_suspend@forcewake:
- shard-glk10: NOTRUN -> [INCOMPLETE][124] ([i915#16182] / [i915#4817])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk10/igt@i915_suspend@forcewake.html
* igt@intel_hwmon@hwmon-read:
- shard-rkl: NOTRUN -> [SKIP][125] ([i915#7707])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@intel_hwmon@hwmon-read.html
- shard-tglu-1: NOTRUN -> [SKIP][126] ([i915#7707])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@intel_hwmon@hwmon-read.html
* igt@intel_hwmon@hwmon-write:
- shard-tglu: NOTRUN -> [SKIP][127] ([i915#7707])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][128] ([i915#4212]) +2 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- shard-dg1: NOTRUN -> [SKIP][129] ([i915#4215])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@clobberred-modifier:
- shard-dg1: NOTRUN -> [SKIP][130] ([i915#4212])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_addfb_basic@clobberred-modifier.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
- shard-dg1: NOTRUN -> [FAIL][131] ([i915#14888]) +1 other test fail
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
* igt@kms_async_flips@async-flip-hang:
- shard-dg1: NOTRUN -> [DMESG-WARN][132] ([i915#4423])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_async_flips@async-flip-hang.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-dg1: NOTRUN -> [SKIP][133] ([i915#9531])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
- shard-tglu: NOTRUN -> [SKIP][134] ([i915#9531])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-snb: NOTRUN -> [SKIP][135] ([i915#1769])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-snb6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#1769] / [i915#3555])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
- shard-tglu-1: NOTRUN -> [SKIP][137] ([i915#1769] / [i915#3555]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
- shard-glk: NOTRUN -> [SKIP][138] ([i915#1769])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][139] ([i915#5286]) +1 other test skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
- shard-tglu-1: NOTRUN -> [SKIP][140] ([i915#5286]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][141] ([i915#5286]) +8 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-dg1: NOTRUN -> [SKIP][142] ([i915#4538] / [i915#5286]) +11 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][143] ([i915#3638]) +2 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][144] ([i915#3638]) +3 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
- shard-tglu: NOTRUN -> [SKIP][145] ([i915#3828])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#3828]) +2 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-dg2: NOTRUN -> [SKIP][147] ([i915#5190]) +8 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2: NOTRUN -> [SKIP][148] ([i915#4538] / [i915#5190]) +31 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][149] ([i915#4538]) +10 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][150] ([i915#6095]) +165 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-17/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#10307] / [i915#6095]) +191 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][152] ([i915#6095]) +44 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
- shard-dg2: NOTRUN -> [SKIP][153] ([i915#12313]) +6 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
* igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][154] ([i915#6095]) +99 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][155] ([i915#14098] / [i915#14544] / [i915#6095]) +2 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs:
- shard-rkl: NOTRUN -> [SKIP][156] ([i915#14098] / [i915#6095]) +31 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][157] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg1: NOTRUN -> [SKIP][158] ([i915#12805])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
- shard-tglu: NOTRUN -> [SKIP][159] ([i915#12805])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][160] ([i915#6095]) +23 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2:
- shard-glk10: NOTRUN -> [INCOMPLETE][161] ([i915#15582]) +1 other test incomplete
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk10/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][162] ([i915#12313])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#12313]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][164] ([i915#14544] / [i915#6095]) +5 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][165] ([i915#6095]) +53 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-dg1: NOTRUN -> [SKIP][166] ([i915#12313]) +4 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
- shard-tglu: NOTRUN -> [SKIP][167] ([i915#12313]) +3 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2: NOTRUN -> [SKIP][168] ([i915#16017])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#13781]) +4 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3 (NEW):
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#13783]) +4 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html
* igt@kms_chamelium_audio@dp-audio-after-suspend:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#11151])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_chamelium_audio@dp-audio-after-suspend.html
* igt@kms_chamelium_audio@hdmi-audio-after-suspend:
- shard-dg1: NOTRUN -> [SKIP][172] ([i915#11151])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@kms_chamelium_audio@hdmi-audio-after-suspend.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
- shard-tglu: NOTRUN -> [SKIP][173] ([i915#16471]) +1 other test skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4:
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#16471]) +4 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html
- shard-rkl: NOTRUN -> [SKIP][175] ([i915#16471]) +1 other test skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html
- shard-tglu-1: NOTRUN -> [SKIP][176] ([i915#16471])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html
* igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
- shard-dg1: NOTRUN -> [SKIP][177] ([i915#16471]) +2 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-tglu: NOTRUN -> [SKIP][178] ([i915#11151] / [i915#7828]) +9 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_edid@dp-edid-read:
- shard-tglu-1: NOTRUN -> [SKIP][179] ([i915#11151] / [i915#7828]) +4 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_chamelium_edid@dp-edid-read.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- shard-rkl: NOTRUN -> [SKIP][180] ([i915#11151] / [i915#7828]) +4 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_chamelium_frames@dp-crc-fast:
- shard-dg2: NOTRUN -> [SKIP][181] ([i915#11151] / [i915#7828]) +25 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-dg1: NOTRUN -> [SKIP][182] ([i915#11151] / [i915#7828]) +14 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_color@deep-color:
- shard-tglu-1: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#9979])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_color@deep-color.html
- shard-dg1: NOTRUN -> [SKIP][184] ([i915#12655] / [i915#3555])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-17/igt@kms_color@deep-color.html
* igt@kms_color@legacy-gamma:
- shard-rkl: [PASS][185] -> [ABORT][186] ([i915#16852] / [i915#16866]) +1 other test abort
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-2/igt@kms_color@legacy-gamma.html
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_color@legacy-gamma.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-dg1: NOTRUN -> [SKIP][187] ([i915#15865]) +1 other test skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@content-type-change:
- shard-tglu: NOTRUN -> [SKIP][188] ([i915#15865]) +3 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-dg2: NOTRUN -> [SKIP][189] ([i915#15330] / [i915#3299]) +3 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_content_protection@dp-mst-lic-type-1.html
- shard-dg1: NOTRUN -> [SKIP][190] ([i915#15330] / [i915#3299]) +1 other test skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-rkl: NOTRUN -> [SKIP][191] ([i915#15330] / [i915#3116])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_content_protection@dp-mst-type-0.html
- shard-tglu-1: NOTRUN -> [SKIP][192] ([i915#15330] / [i915#3116] / [i915#3299])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-dg2: NOTRUN -> [SKIP][193] ([i915#15330]) +3 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_content_protection@dp-mst-type-0-suspend-resume:
- shard-tglu: NOTRUN -> [SKIP][194] ([i915#15330])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-tglu: NOTRUN -> [SKIP][195] ([i915#15330] / [i915#3116] / [i915#3299])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@dp-mst-type-1-suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][196] ([i915#15330])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
- shard-tglu-1: NOTRUN -> [SKIP][197] ([i915#15330])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
* igt@kms_content_protection@lic-type-0-hdcp14:
- shard-tglu-1: NOTRUN -> [SKIP][198] ([i915#15865]) +1 other test skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_content_protection@lic-type-0-hdcp14.html
* igt@kms_content_protection@srm:
- shard-dg2: NOTRUN -> [SKIP][199] ([i915#15865]) +6 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg1: NOTRUN -> [SKIP][200] ([i915#13049]) +1 other test skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][201] ([i915#13566]) +3 other tests fail
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-dg2: NOTRUN -> [SKIP][202] ([i915#13049]) +4 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_cursor_crc@cursor-random-512x512.html
- shard-rkl: NOTRUN -> [SKIP][203] ([i915#13049])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-tglu-1: NOTRUN -> [SKIP][204] ([i915#3555]) +6 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-tglu: NOTRUN -> [SKIP][205] ([i915#13049]) +1 other test skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-tglu: [PASS][206] -> [FAIL][207] ([i915#13566]) +1 other test fail
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-tglu-4/igt@kms_cursor_crc@cursor-sliding-128x42.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_cursor_crc@cursor-sliding-128x42.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-dg2: NOTRUN -> [SKIP][208] ([i915#3555]) +15 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][209] ([i915#4103]) +3 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-tglu-1: NOTRUN -> [SKIP][210] ([i915#4103]) +2 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
- shard-dg2: NOTRUN -> [SKIP][211] ([i915#13046] / [i915#5354]) +13 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-dg2: NOTRUN -> [SKIP][212] ([i915#9067])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
- shard-tglu: NOTRUN -> [SKIP][213] ([i915#9067])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-rkl: NOTRUN -> [SKIP][214] ([i915#4103])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg1: NOTRUN -> [SKIP][215] ([i915#4103]) +1 other test skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-tglu: NOTRUN -> [SKIP][216] ([i915#9723])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_display_modes@extended-mode-basic:
- shard-dg2: NOTRUN -> [SKIP][217] ([i915#13691])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][218] ([i915#3804])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html
* igt@kms_dp_aux_dev@basic:
- shard-dg2: NOTRUN -> [SKIP][219] ([i915#1257])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_dp_aux_dev@basic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg1: NOTRUN -> [SKIP][220] ([i915#13749])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-dg2: NOTRUN -> [SKIP][221] ([i915#13749]) +1 other test skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_dp_link_training@non-uhbr-sst.html
- shard-rkl: NOTRUN -> [SKIP][222] ([i915#13749])
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-dg2: NOTRUN -> [SKIP][223] ([i915#13748]) +1 other test skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_dp_link_training@uhbr-mst.html
- shard-tglu: NOTRUN -> [SKIP][224] ([i915#13748])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-dg2: NOTRUN -> [SKIP][225] ([i915#13707])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-rkl: NOTRUN -> [SKIP][226] ([i915#13707])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
- shard-tglu: NOTRUN -> [SKIP][227] ([i915#16870])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html
* igt@kms_draw_crc@draw-method-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][228] ([i915#8812])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@kms_draw_crc@draw-method-mmap-wc.html
* igt@kms_dsc@dsc-fractional-bpp-bigjoiner:
- shard-dg1: NOTRUN -> [SKIP][229] ([i915#16361]) +9 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-dg2: NOTRUN -> [SKIP][230] ([i915#16361]) +9 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
- shard-tglu-1: NOTRUN -> [SKIP][231] ([i915#16361]) +2 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-bpc:
- shard-tglu: NOTRUN -> [SKIP][232] ([i915#16361]) +6 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner:
- shard-rkl: NOTRUN -> [SKIP][233] ([i915#16361]) +1 other test skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][234] ([i915#9878])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_fbcon_fbt@psr:
- shard-dg1: NOTRUN -> [SKIP][235] ([i915#16680])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_fbcon_fbt@psr.html
- shard-tglu: NOTRUN -> [SKIP][236] ([i915#16680])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@chamelium:
- shard-dg2: NOTRUN -> [SKIP][237] ([i915#16084])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-2x:
- shard-dg1: NOTRUN -> [SKIP][238] ([i915#16081])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2: NOTRUN -> [SKIP][239] ([i915#16081]) +2 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_feature_discovery@display-3x.html
- shard-tglu-1: NOTRUN -> [SKIP][240] ([i915#16081])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg1: NOTRUN -> [SKIP][241] ([i915#16599])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_feature_discovery@dp-mst.html
- shard-tglu: NOTRUN -> [SKIP][242] ([i915#16599])
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@hdr:
- shard-dg2: NOTRUN -> [SKIP][243] ([i915#16600]) +1 other test skip
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_feature_discovery@hdr.html
* igt@kms_feature_discovery@psr1:
- shard-dg2: NOTRUN -> [SKIP][244] ([i915#658]) +1 other test skip
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@psr2:
- shard-dg1: NOTRUN -> [SKIP][245] ([i915#658])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_feature_discovery@psr2.html
* igt@kms_fence_pin_leak:
- shard-dg1: NOTRUN -> [SKIP][246] ([i915#4881])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_fence_pin_leak.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-dg1: NOTRUN -> [SKIP][247] ([i915#9934]) +15 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-tglu: NOTRUN -> [SKIP][248] ([i915#9934])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-tglu: NOTRUN -> [SKIP][249] ([i915#3637] / [i915#9934]) +11 other tests skip
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-rkl: NOTRUN -> [SKIP][250] ([i915#9934]) +1 other test skip
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_flip@2x-flip-vs-fences-interruptible.html
- shard-tglu-1: NOTRUN -> [SKIP][251] ([i915#3637] / [i915#9934]) +6 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-flip-vs-modeset-vs-hang:
- shard-dg2: NOTRUN -> [SKIP][252] ([i915#9934]) +17 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
* igt@kms_flip@dpms-vs-vblank-race:
- shard-dg1: [PASS][253] -> [ABORT][254] ([i915#16924] / [i915#16929] / [i915#16932])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-16/igt@kms_flip@dpms-vs-vblank-race.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_flip@dpms-vs-vblank-race.html
* igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1:
- shard-dg1: NOTRUN -> [ABORT][255] ([i915#16924] / [i915#16932])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1.html
* igt@kms_flip@flip-vs-fences-interruptible:
- shard-dg2: NOTRUN -> [SKIP][256] ([i915#8381]) +1 other test skip
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_flip@flip-vs-fences-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-glk: NOTRUN -> [INCOMPLETE][257] ([i915#12745] / [i915#4839] / [i915#6113])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk3/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
- shard-glk: NOTRUN -> [INCOMPLETE][258] ([i915#12745])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk3/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][259] ([i915#15643]) +4 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
- shard-dg2: NOTRUN -> [SKIP][260] ([i915#15643]) +5 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
- shard-dg2: NOTRUN -> [SKIP][261] ([i915#15643] / [i915#5190]) +6 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-rkl: NOTRUN -> [SKIP][262] ([i915#15643]) +4 other tests skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-dg1: NOTRUN -> [SKIP][263] ([i915#15643]) +6 other tests skip
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile:
- shard-tglu-1: NOTRUN -> [SKIP][264] ([i915#15643]) +4 other tests skip
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][265] ([i915#15990] / [i915#8708]) +26 other tests skip
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-glk11: NOTRUN -> [INCOMPLETE][266] ([i915#10056] / [i915#16593])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk11/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][267] ([i915#15990]) +35 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-render:
- shard-snb: NOTRUN -> [SKIP][268] +612 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-snb5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-msflip-blt:
- shard-dg2: NOTRUN -> [SKIP][269] ([i915#15989]) +53 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-blt:
- shard-glk: [PASS][270] -> [SKIP][271] +19 other tests skip
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-blt.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk4/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][272] ([i915#15989]) +12 other tests skip
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-msflip-blt:
- shard-tglu: NOTRUN -> [SKIP][273] +147 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][274] ([i915#15990] / [i915#8708]) +56 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
- shard-rkl: NOTRUN -> [SKIP][275] ([i915#1825]) +5 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-pwrite:
- shard-dg1: NOTRUN -> [SKIP][276] ([i915#4423])
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][277] ([i915#15991] / [i915#5354]) +88 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-cpu:
- shard-rkl: NOTRUN -> [SKIP][278] +57 other tests skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-tglu-1: NOTRUN -> [SKIP][279] +76 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][280] ([i915#15102]) +59 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-dg1: NOTRUN -> [SKIP][281] ([i915#5439]) +1 other test skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: NOTRUN -> [SKIP][282] ([i915#10055]) +1 other test skip
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-shrfb-draw-blt:
- shard-tglu-1: NOTRUN -> [SKIP][283] ([i915#15102]) +32 other tests skip
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-indfb-draw-blt:
- shard-tglu: NOTRUN -> [SKIP][284] ([i915#15102]) +68 other tests skip
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][285] ([i915#15990]) +70 other tests skip
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt:
- shard-tglu: NOTRUN -> [SKIP][286] ([i915#15989]) +30 other tests skip
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-rkl: [PASS][287] -> [SKIP][288] ([i915#15989]) +10 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-pwrite.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-render:
- shard-tglu-1: NOTRUN -> [SKIP][289] ([i915#15989]) +15 other tests skip
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-shrfb-plflip-blt:
- shard-dg1: NOTRUN -> [SKIP][290] ([i915#15989]) +25 other tests skip
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-dg1: NOTRUN -> [SKIP][291] ([i915#9766])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
- shard-dg2: NOTRUN -> [SKIP][292] ([i915#9766])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][293] ([i915#15102]) +30 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][294] ([i915#15104] / [i915#15990]) +1 other test skip
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][295] ([i915#15104] / [i915#15990]) +5 other tests skip
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
- shard-glk11: NOTRUN -> [SKIP][296] +119 other tests skip
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk11/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
- shard-dg2: NOTRUN -> [SKIP][297] ([i915#15102]) +119 other tests skip
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
- shard-glk10: NOTRUN -> [SKIP][298] +72 other tests skip
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk10/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-cur-indfb-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][299] +134 other tests skip
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-shrfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][300] ([i915#15991]) +122 other tests skip
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-shrfb-draw-pwrite.html
* igt@kms_hdr@bpc-switch:
- shard-dg1: NOTRUN -> [SKIP][301] ([i915#3555] / [i915#8228]) +4 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-tglu: NOTRUN -> [SKIP][302] ([i915#3555] / [i915#8228]) +2 other tests skip
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg1: NOTRUN -> [SKIP][303] ([i915#12713])
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-rkl: [PASS][304] -> [SKIP][305] ([i915#16644] / [i915#3555] / [i915#8228])
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_hdr@invalid-metadata-sizes.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-swap:
- shard-tglu-1: NOTRUN -> [SKIP][306] ([i915#3555] / [i915#8228])
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-toggle-suspend:
- shard-dg2: NOTRUN -> [SKIP][307] ([i915#16518] / [i915#3555] / [i915#8228]) +5 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_hdr@static-toggle-suspend.html
- shard-rkl: NOTRUN -> [SKIP][308] ([i915#16644] / [i915#3555] / [i915#8228])
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][309] ([i915#15459])
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][310] ([i915#15458]) +1 other test skip
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_joiner@basic-force-ultra-joiner.html
- shard-dg2: NOTRUN -> [SKIP][311] ([i915#15458]) +1 other test skip
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-dg2: NOTRUN -> [SKIP][312] ([i915#13688])
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][313] ([i915#15460])
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-dg2: NOTRUN -> [SKIP][314] ([i915#15460])
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-dg2: NOTRUN -> [SKIP][315] ([i915#15459])
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-dg1: NOTRUN -> [SKIP][316] ([i915#15458])
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][317] ([i915#15638] / [i915#15722])
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-dg2: NOTRUN -> [SKIP][318] ([i915#16451])
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2: NOTRUN -> [SKIP][319] ([i915#6301])
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_panel_fitting@atomic-fastset.html
- shard-tglu-1: NOTRUN -> [SKIP][320] ([i915#6301])
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_panel_fitting@legacy:
- shard-dg1: NOTRUN -> [SKIP][321] ([i915#6301])
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- shard-rkl: [PASS][322] -> [INCOMPLETE][323] ([i915#12756] / [i915#13476])
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_pipe_crc_basic@suspend-read-crc.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][324] ([i915#13476])
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-2.html
* igt@kms_pipe_stress@stress-xrgb8888-4tiled:
- shard-tglu-1: NOTRUN -> [SKIP][325] ([i915#14712])
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html
* igt@kms_pipe_stress@stress-xrgb8888-xtiled:
- shard-glk11: NOTRUN -> [DMESG-WARN][326] ([i915#118])
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk11/igt@kms_pipe_stress@stress-xrgb8888-xtiled.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-dg2: NOTRUN -> [SKIP][327] ([i915#14712])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
- shard-rkl: NOTRUN -> [SKIP][328] ([i915#15709]) +3 other tests skip
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-a-plane-5:
- shard-dg2: NOTRUN -> [SKIP][329] ([i915#16386]) +5 other tests skip
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-5/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-a-plane-5.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
- shard-tglu: NOTRUN -> [SKIP][330] ([i915#15709]) +5 other tests skip
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7:
- shard-tglu: NOTRUN -> [SKIP][331] ([i915#16386]) +3 other tests skip
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-a-plane-7:
- shard-dg1: NOTRUN -> [SKIP][332] ([i915#16386]) +3 other tests skip
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-a-plane-7.html
* igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping:
- shard-dg2: NOTRUN -> [SKIP][333] ([i915#15709]) +13 other tests skip
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html
* igt@kms_plane@pixel-format-yf-tiled-modifier:
- shard-dg1: NOTRUN -> [SKIP][334] ([i915#15709]) +5 other tests skip
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_plane@pixel-format-yf-tiled-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
- shard-tglu-1: NOTRUN -> [SKIP][335] ([i915#15709]) +3 other tests skip
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html
* igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y:
- shard-dg2: NOTRUN -> [SKIP][336] ([i915#16112])
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html
- shard-rkl: NOTRUN -> [SKIP][337] ([i915#16112])
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-dg2: NOTRUN -> [SKIP][338] ([i915#13958]) +4 other tests skip
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-tglu: NOTRUN -> [SKIP][339] ([i915#13958])
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-tglu-1: NOTRUN -> [SKIP][340] ([i915#13958])
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg1: NOTRUN -> [SKIP][341] ([i915#13958]) +1 other test skip
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_plane_multiple@tiling-4:
- shard-rkl: NOTRUN -> [SKIP][342] ([i915#14259])
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_plane_multiple@tiling-4.html
- shard-tglu-1: NOTRUN -> [SKIP][343] ([i915#14259])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_plane_multiple@tiling-4.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2: NOTRUN -> [SKIP][344] ([i915#6953] / [i915#9423])
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_plane_scaling@intel-max-src-size.html
- shard-rkl: [PASS][345] -> [SKIP][346] ([i915#6953])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-3/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c:
- shard-tglu: NOTRUN -> [SKIP][347] ([i915#15329]) +14 other tests skip
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation:
- shard-glk: NOTRUN -> [SKIP][348] +388 other tests skip
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk6/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
- shard-dg1: NOTRUN -> [SKIP][349] ([i915#15329]) +14 other tests skip
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg1: NOTRUN -> [SKIP][350] ([i915#12343])
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_pm_backlight@brightness-with-dpms.html
- shard-dg2: NOTRUN -> [SKIP][351] ([i915#12343])
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-dg1: NOTRUN -> [SKIP][352] ([i915#12343] / [i915#5354]) +1 other test skip
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2: NOTRUN -> [SKIP][353] ([i915#12343] / [i915#5354]) +1 other test skip
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_pm_backlight@fade-with-suspend.html
- shard-rkl: NOTRUN -> [SKIP][354] ([i915#12343] / [i915#5354])
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_pm_backlight@fade-with-suspend.html
- shard-tglu-1: NOTRUN -> [SKIP][355] ([i915#12343] / [i915#9812])
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-psr:
- shard-tglu: NOTRUN -> [SKIP][356] ([i915#15948])
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-psr-suspend-resume:
- shard-tglu-1: NOTRUN -> [SKIP][357] ([i915#16914])
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_pm_dc@dc5-psr-suspend-resume.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: NOTRUN -> [FAIL][358] ([i915#16479])
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-dg2: NOTRUN -> [SKIP][359] ([i915#15948]) +1 other test skip
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_pm_dc@dc6-psr.html
- shard-rkl: NOTRUN -> [SKIP][360] ([i915#15948])
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2: NOTRUN -> [SKIP][361] ([i915#9340])
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_pm_lpsp@kms-lpsp.html
- shard-rkl: NOTRUN -> [SKIP][362] ([i915#3828])
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@kms_pm_lpsp@kms-lpsp.html
- shard-dg1: NOTRUN -> [SKIP][363] ([i915#9340])
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-dg1: NOTRUN -> [SKIP][364] ([i915#8430])
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_pm_lpsp@screens-disabled.html
- shard-dg2: NOTRUN -> [SKIP][365] ([i915#8430])
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-dg1: NOTRUN -> [SKIP][366] ([i915#15073]) +1 other test skip
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-dg2: NOTRUN -> [SKIP][367] ([i915#15073]) +1 other test skip
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-tglu: NOTRUN -> [SKIP][368] ([i915#15073]) +1 other test skip
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-rkl: [PASS][369] -> [SKIP][370] ([i915#14544] / [i915#15073])
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][371] -> [SKIP][372] ([i915#15073])
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [PASS][373] -> [SKIP][374] ([i915#15073]) +2 other tests skip
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@package-g7:
- shard-dg2: NOTRUN -> [SKIP][375] ([i915#15403])
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_pm_rpm@package-g7.html
- shard-rkl: NOTRUN -> [SKIP][376] ([i915#15403])
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_pm_rpm@package-g7.html
- shard-tglu-1: NOTRUN -> [SKIP][377] ([i915#15403])
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_pm_rpm@package-g7.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-glk: NOTRUN -> [INCOMPLETE][378] ([i915#10553])
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk6/igt@kms_pm_rpm@system-suspend-modeset.html
- shard-rkl: [PASS][379] -> [INCOMPLETE][380] ([i915#14419])
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-5/igt@kms_pm_rpm@system-suspend-modeset.html
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-3/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_prime@basic-crc-hybrid:
- shard-dg2: NOTRUN -> [SKIP][381] ([i915#6524] / [i915#6805])
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-tglu: NOTRUN -> [SKIP][382] ([i915#6524]) +1 other test skip
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-glk: NOTRUN -> [SKIP][383] ([i915#11520]) +5 other tests skip
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
- shard-dg2: NOTRUN -> [SKIP][384] ([i915#11520]) +26 other tests skip
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
- shard-glk10: NOTRUN -> [SKIP][385] ([i915#11520]) +1 other test skip
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk10/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
- shard-dg1: NOTRUN -> [SKIP][386] ([i915#11520] / [i915#4423])
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][387] ([i915#11520]) +6 other tests skip
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-glk11: NOTRUN -> [SKIP][388] ([i915#11520]) +3 other tests skip
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk11/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
- shard-tglu: NOTRUN -> [SKIP][389] ([i915#11520]) +11 other tests skip
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-snb: NOTRUN -> [SKIP][390] ([i915#11520]) +11 other tests skip
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-snb6/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-dg1: NOTRUN -> [SKIP][391] ([i915#11520]) +15 other tests skip
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][392] ([i915#11520]) +4 other tests skip
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-tglu: NOTRUN -> [SKIP][393] ([i915#9683])
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-4/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-dg2: NOTRUN -> [SKIP][394] ([i915#9683]) +1 other test skip
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_psr2_su@page_flip-xrgb8888.html
- shard-rkl: NOTRUN -> [SKIP][395] ([i915#9683])
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-rkl: NOTRUN -> [SKIP][396] ([i915#1072] / [i915#9732]) +11 other tests skip
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_psr@fbc-pr-sprite-render:
- shard-tglu-1: NOTRUN -> [SKIP][397] ([i915#9732]) +15 other tests skip
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_psr@fbc-pr-sprite-render.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-tglu: NOTRUN -> [SKIP][398] ([i915#9732]) +30 other tests skip
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_psr@psr2-primary-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][399] ([i915#1072] / [i915#9732]) +35 other tests skip
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_psr@psr2-primary-mmap-cpu.html
* igt@kms_psr@psr2-primary-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][400] ([i915#1072] / [i915#9732]) +68 other tests skip
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@kms_psr@psr2-primary-mmap-gtt.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-dg2: NOTRUN -> [SKIP][401] ([i915#15949])
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg1: NOTRUN -> [SKIP][402] ([i915#15949])
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-tglu: NOTRUN -> [SKIP][403] ([i915#15949])
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@exhaust-fences:
- shard-dg2: NOTRUN -> [SKIP][404] ([i915#4235])
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@kms_rotation_crc@exhaust-fences.html
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-glk: NOTRUN -> [INCOMPLETE][405] ([i915#15492] / [i915#16184])
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2: NOTRUN -> [SKIP][406] ([i915#12755] / [i915#15867]) +2 other tests skip
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][407] ([i915#12755] / [i915#15867] / [i915#5190])
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-tglu: NOTRUN -> [SKIP][408] ([i915#5289]) +1 other test skip
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-dg1: NOTRUN -> [SKIP][409] ([i915#3555]) +11 other tests skip
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-tglu: NOTRUN -> [SKIP][410] ([i915#3555]) +8 other tests skip
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-rkl: NOTRUN -> [SKIP][411] ([i915#3555]) +1 other test skip
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_selftest@drm_framebuffer:
- shard-tglu-1: NOTRUN -> [ABORT][412] ([i915#13179]) +1 other test abort
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-1/igt@kms_selftest@drm_framebuffer.html
- shard-snb: NOTRUN -> [ABORT][413] ([i915#13179]) +1 other test abort
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-snb6/igt@kms_selftest@drm_framebuffer.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2: NOTRUN -> [SKIP][414] ([i915#8623])
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-1:
- shard-glk11: NOTRUN -> [INCOMPLETE][415] ([i915#12276]) +1 other test incomplete
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk11/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-1.html
* igt@kms_vrr@flipline:
- shard-dg2: NOTRUN -> [SKIP][416] ([i915#15243] / [i915#3555])
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@kms_vrr@flipline.html
- shard-rkl: NOTRUN -> [SKIP][417] ([i915#15243] / [i915#3555])
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@kms_vrr@flipline.html
* igt@kms_vrr@lobf:
- shard-dg1: NOTRUN -> [SKIP][418] ([i915#11920])
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@kms_vrr@lobf.html
* igt@kms_vrr@negative-basic:
- shard-dg2: NOTRUN -> [SKIP][419] ([i915#3555] / [i915#9906])
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_vrr@negative-basic.html
- shard-tglu: NOTRUN -> [SKIP][420] ([i915#3555] / [i915#9906])
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-2/igt@kms_vrr@negative-basic.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-dg2: NOTRUN -> [SKIP][421] ([i915#9906]) +2 other tests skip
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-7/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-dg1: NOTRUN -> [SKIP][422] ([i915#9906])
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@kms_vrr@seamless-rr-switch-vrr.html
- shard-tglu: NOTRUN -> [SKIP][423] ([i915#9906])
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-10/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-dg2: NOTRUN -> [SKIP][424] ([i915#2436])
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@perf@gen8-unprivileged-single-ctx-counters.html
- shard-rkl: NOTRUN -> [SKIP][425] ([i915#2436])
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@perf@global-sseu-config:
- shard-dg2: NOTRUN -> [SKIP][426] ([i915#7387])
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@perf@global-sseu-config.html
* igt@perf@mi-rpc:
- shard-dg2: NOTRUN -> [SKIP][427] ([i915#2434])
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-1/igt@perf@mi-rpc.html
* igt@perf@non-zero-reason:
- shard-dg2: NOTRUN -> [FAIL][428] ([i915#9100]) +1 other test fail
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@perf@non-zero-reason.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-dg1: NOTRUN -> [SKIP][429] ([i915#2433])
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@rc6-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][430] ([i915#13356] / [i915#16236])
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@perf_pmu@rc6-suspend.html
* igt@perf_pmu@rc6@other-idle-gt0:
- shard-dg2: NOTRUN -> [SKIP][431] ([i915#8516]) +1 other test skip
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-3/igt@perf_pmu@rc6@other-idle-gt0.html
* igt@prime_mmap@test_aperture_limit:
- shard-dg2: NOTRUN -> [SKIP][432] ([i915#14121]) +1 other test skip
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@prime_mmap@test_aperture_limit.html
* igt@prime_udl@share-import-addfb:
- shard-dg2: NOTRUN -> [SKIP][433] ([i915#16420]) +1 other test skip
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-8/igt@prime_udl@share-import-addfb.html
- shard-dg1: NOTRUN -> [SKIP][434] ([i915#16420])
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-15/igt@prime_udl@share-import-addfb.html
* igt@prime_vgem@basic-fence-read:
- shard-dg1: NOTRUN -> [SKIP][435] ([i915#3708]) +1 other test skip
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-17/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-write:
- shard-dg2: NOTRUN -> [SKIP][436] ([i915#3291] / [i915#3708]) +1 other test skip
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@prime_vgem@basic-write.html
- shard-rkl: NOTRUN -> [SKIP][437] ([i915#3291] / [i915#3708])
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@prime_vgem@basic-write.html
* igt@prime_vgem@coherency-gtt:
- shard-dg1: NOTRUN -> [SKIP][438] ([i915#3708] / [i915#4077])
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-16/igt@prime_vgem@coherency-gtt.html
* igt@prime_vgem@fence-write-hang:
- shard-dg2: NOTRUN -> [SKIP][439] ([i915#3708]) +1 other test skip
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-6/igt@prime_vgem@fence-write-hang.html
* igt@tools_test@sysfs_l3_parity:
- shard-dg1: NOTRUN -> [SKIP][440] ([i915#4818])
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-14/igt@tools_test@sysfs_l3_parity.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3:
- shard-rkl: [INCOMPLETE][441] ([i915#13356]) -> [PASS][442] +3 other tests pass
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-3/igt@gem_ctx_isolation@preservation-s3.html
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@gem_ctx_isolation@preservation-s3.html
* igt@gem_eio@hibernate:
- shard-dg1: [DMESG-WARN][443] ([i915#4391] / [i915#4423]) -> [PASS][444]
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-19/igt@gem_eio@hibernate.html
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-18/igt@gem_eio@hibernate.html
* igt@gem_exec_suspend@basic-s0@smem:
- shard-dg2: [INCOMPLETE][445] ([i915#13356]) -> [PASS][446] +1 other test pass
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg2-3/igt@gem_exec_suspend@basic-s0@smem.html
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg2-4/igt@gem_exec_suspend@basic-s0@smem.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-1:
- shard-glk: [FAIL][447] ([i915#14888]) -> [PASS][448] +2 other tests pass
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk3/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-1.html
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk1/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-rkl: [INCOMPLETE][449] ([i915#15582]) -> [PASS][450]
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
[450]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-dg1: [DMESG-WARN][451] ([i915#4423]) -> [PASS][452] +2 other tests pass
[451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-17/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-render:
- shard-rkl: [SKIP][453] ([i915#15989]) -> [PASS][454] +12 other tests pass
[453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-4/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-render.html
[454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-1/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-glk: [SKIP][455] -> [PASS][456] +5 other tests pass
[455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk3/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
[456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk8/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_hdr@bpc-switch:
- shard-rkl: [SKIP][457] ([i915#16644] / [i915#3555] / [i915#8228]) -> [PASS][458]
[457]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_hdr@bpc-switch.html
[458]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_hdr@bpc-switch.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-glk: [DMESG-WARN][459] ([i915#118]) -> [PASS][460]
[459]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk4/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
[460]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk9/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-rkl: [SKIP][461] ([i915#15073]) -> [PASS][462]
[461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_pm_rpm@dpms-non-lpsp.html
[462]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-4/igt@kms_pm_rpm@dpms-non-lpsp.html
- shard-dg1: [SKIP][463] ([i915#15073]) -> [PASS][464]
[463]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-14/igt@kms_pm_rpm@dpms-non-lpsp.html
[464]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-19/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@perf_pmu@rc6-suspend:
- shard-rkl: [INCOMPLETE][465] ([i915#13520]) -> [PASS][466]
[465]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-4/igt@perf_pmu@rc6-suspend.html
[466]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-5/igt@perf_pmu@rc6-suspend.html
#### Warnings ####
* igt@gem_eio@kms:
- shard-rkl: [ABORT][467] ([i915#16931]) -> [ABORT][468] ([i915#16837])
[467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-5/igt@gem_eio@kms.html
[468]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-8/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: [SKIP][469] ([i915#14544] / [i915#4525]) -> [SKIP][470] ([i915#4525]) +1 other test skip
[469]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@gem_exec_balancer@parallel-balancer.html
[470]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_capture@capture-invisible:
- shard-rkl: [SKIP][471] ([i915#6334]) -> [SKIP][472] ([i915#14544] / [i915#6334]) +1 other test skip
[471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gem_exec_capture@capture-invisible.html
[472]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_reloc@basic-cpu-gtt-active:
- shard-rkl: [SKIP][473] ([i915#14544] / [i915#3281]) -> [SKIP][474] ([i915#3281]) +1 other test skip
[473]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@gem_exec_reloc@basic-cpu-gtt-active.html
[474]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@gem_exec_reloc@basic-cpu-gtt-active.html
* igt@gem_lmem_swapping@parallel-random:
- shard-rkl: [SKIP][475] ([i915#4613]) -> [SKIP][476] ([i915#14544] / [i915#4613])
[475]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gem_lmem_swapping@parallel-random.html
[476]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_media_vme:
- shard-rkl: [SKIP][477] ([i915#284]) -> [SKIP][478] ([i915#14544] / [i915#284])
[477]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gem_media_vme.html
[478]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gem_media_vme.html
* igt@gem_partial_pwrite_pread@write-uncached:
- shard-rkl: [SKIP][479] ([i915#3282]) -> [SKIP][480] ([i915#14544] / [i915#3282]) +1 other test skip
[479]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gem_partial_pwrite_pread@write-uncached.html
[480]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gem_partial_pwrite_pread@write-uncached.html
* igt@gem_pwrite@basic-self:
- shard-rkl: [SKIP][481] ([i915#14544] / [i915#3282]) -> [SKIP][482] ([i915#3282]) +1 other test skip
[481]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@gem_pwrite@basic-self.html
[482]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@gem_pwrite@basic-self.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-rkl: [SKIP][483] ([i915#14544] / [i915#8411]) -> [SKIP][484] ([i915#8411])
[483]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
[484]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-untiled:
- shard-rkl: [SKIP][485] ([i915#8411]) -> [SKIP][486] ([i915#14544] / [i915#8411]) +1 other test skip
[485]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
[486]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-rkl: [SKIP][487] ([i915#3297] / [i915#3323]) -> [SKIP][488] ([i915#14544] / [i915#3297] / [i915#3323])
[487]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gem_userptr_blits@dmabuf-sync.html
[488]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-rkl: [SKIP][489] ([i915#14544] / [i915#3297]) -> [SKIP][490] ([i915#3297]) +1 other test skip
[489]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@gem_userptr_blits@dmabuf-unsync.html
[490]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gen9_exec_parse@bb-start-param:
- shard-rkl: [SKIP][491] ([i915#2527]) -> [SKIP][492] ([i915#14544] / [i915#2527])
[491]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@gen9_exec_parse@bb-start-param.html
[492]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@gen9_exec_parse@bb-start-param.html
* igt@i915_pm_rc6_residency@media-rc6-accuracy:
- shard-rkl: [SKIP][493] ([i915#14544] / [i915#16080] / [i915#16166]) -> [SKIP][494] ([i915#16080] / [i915#16166])
[493]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@i915_pm_rc6_residency@media-rc6-accuracy.html
[494]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@i915_pm_rc6_residency@media-rc6-accuracy.html
* igt@i915_suspend@fence-restore-untiled:
- shard-rkl: [ABORT][495] ([i915#15131]) -> [INCOMPLETE][496] ([i915#4817])
[495]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-1/igt@i915_suspend@fence-restore-untiled.html
[496]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-3/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: [SKIP][497] ([i915#12454] / [i915#12712] / [i915#14544]) -> [SKIP][498] ([i915#12454] / [i915#12712])
[497]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
[498]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-tglu: [ABORT][499] ([i915#16837] / [i915#16866]) -> [ABORT][500] ([i915#16837] / [i915#16866] / [i915#16881]) +1 other test abort
[499]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[500]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-tglu-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-180:
- shard-rkl: [SKIP][501] ([i915#14544] / [i915#5286]) -> [SKIP][502] ([i915#5286]) +1 other test skip
[501]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
[502]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-rkl: [SKIP][503] ([i915#5286]) -> [SKIP][504] ([i915#14544] / [i915#5286]) +1 other test skip
[503]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
[504]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-dg1: [SKIP][505] ([i915#3638] / [i915#4423]) -> [SKIP][506] ([i915#3638])
[505]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-19/igt@kms_big_fb@linear-16bpp-rotate-270.html
[506]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-18/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-rkl: [SKIP][507] ([i915#14544] / [i915#3638]) -> [SKIP][508] ([i915#3638])
[507]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
[508]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs:
- shard-rkl: [SKIP][509] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][510] ([i915#14098] / [i915#6095]) +4 other tests skip
[509]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs.html
[510]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][511] ([i915#14544] / [i915#6095]) -> [SKIP][512] ([i915#6095]) +3 other tests skip
[511]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
[512]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
- shard-rkl: [SKIP][513] ([i915#14098] / [i915#6095]) -> [SKIP][514] ([i915#14098] / [i915#14544] / [i915#6095]) +2 other tests skip
[513]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
[514]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-rkl: [SKIP][515] ([i915#14544] / [i915#3742]) -> [SKIP][516] ([i915#3742])
[515]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_cdclk@mode-transition-all-outputs.html
[516]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-rkl: [SKIP][517] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][518] ([i915#11151] / [i915#7828]) +4 other tests skip
[517]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
[518]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-dg1: [SKIP][519] ([i915#11151] / [i915#4423] / [i915#7828]) -> [SKIP][520] ([i915#11151] / [i915#7828])
[519]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-19/igt@kms_chamelium_frames@hdmi-frame-dump.html
[520]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-18/igt@kms_chamelium_frames@hdmi-frame-dump.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-rkl: [SKIP][521] ([i915#11151] / [i915#7828]) -> [SKIP][522] ([i915#11151] / [i915#14544] / [i915#7828]) +3 other tests skip
[521]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_chamelium_frames@vga-frame-dump.html
[522]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-rkl: [SKIP][523] ([i915#15865]) -> [SKIP][524] ([i915#14544] / [i915#15865])
[523]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_content_protection@atomic-hdcp14.html
[524]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@mei-interface:
- shard-rkl: [SKIP][525] ([i915#14544] / [i915#15865]) -> [SKIP][526] ([i915#15865]) +2 other tests skip
[525]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_content_protection@mei-interface.html
[526]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-dg1: [SKIP][527] ([i915#13049] / [i915#4423]) -> [SKIP][528] ([i915#13049])
[527]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-19/igt@kms_cursor_crc@cursor-random-512x512.html
[528]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-18/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-rkl: [SKIP][529] -> [SKIP][530] ([i915#14544]) +28 other tests skip
[529]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[530]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner:
- shard-rkl: [SKIP][531] ([i915#16361]) -> [SKIP][532] ([i915#14544] / [i915#16361])
[531]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html
[532]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html
* igt@kms_feature_discovery@display-4x:
- shard-rkl: [SKIP][533] ([i915#14544] / [i915#16081]) -> [SKIP][534] ([i915#16081])
[533]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_feature_discovery@display-4x.html
[534]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank:
- shard-rkl: [SKIP][535] ([i915#14544] / [i915#9934]) -> [SKIP][536] ([i915#9934])
[535]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
[536]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][537] ([i915#12745] / [i915#4839]) -> [INCOMPLETE][538] ([i915#12745] / [i915#4839] / [i915#6113])
[537]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk6/igt@kms_flip@2x-flip-vs-suspend.html
[538]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk3/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-glk: [INCOMPLETE][539] ([i915#12314] / [i915#12745] / [i915#4839]) -> [INCOMPLETE][540] ([i915#12745] / [i915#4839])
[539]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk8/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
[540]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [INCOMPLETE][541] ([i915#12314] / [i915#12745]) -> [INCOMPLETE][542] ([i915#12745])
[541]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk8/igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2.html
[542]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk4/igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-rkl: [SKIP][543] ([i915#9934]) -> [SKIP][544] ([i915#14544] / [i915#9934]) +3 other tests skip
[543]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_flip@2x-modeset-vs-vblank-race.html
[544]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-rkl: [SKIP][545] ([i915#14544] / [i915#15643]) -> [SKIP][546] ([i915#15643])
[545]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
[546]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-rkl: [SKIP][547] ([i915#15643]) -> [SKIP][548] ([i915#14544] / [i915#15643])
[547]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
[548]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-pwrite:
- shard-rkl: [SKIP][549] ([i915#14544]) -> [SKIP][550] +23 other tests skip
[549]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-pwrite.html
[550]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
- shard-rkl: [SKIP][551] ([i915#14544] / [i915#1825]) -> [SKIP][552] ([i915#1825]) +2 other tests skip
[551]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
[552]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
- shard-rkl: [SKIP][553] ([i915#15102]) -> [SKIP][554] ([i915#14544] / [i915#15102]) +11 other tests skip
[553]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
[554]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4:
- shard-rkl: [SKIP][555] ([i915#5439]) -> [SKIP][556] ([i915#14544] / [i915#5439])
[555]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4.html
[556]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4.html
* igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-pwrite:
- shard-dg1: [SKIP][557] ([i915#4423]) -> [SKIP][558]
[557]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-dg1-17/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-pwrite.html
[558]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-dg1-12/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
- shard-rkl: [SKIP][559] ([i915#14544] / [i915#15102]) -> [SKIP][560] ([i915#15102]) +12 other tests skip
[559]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff.html
[560]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-rkl: [SKIP][561] ([i915#1825]) -> [SKIP][562] ([i915#14544] / [i915#1825])
[561]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[562]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-rkl: [SKIP][563] ([i915#14544] / [i915#15459]) -> [SKIP][564] ([i915#15459])
[563]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[564]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_panel_fitting@legacy:
- shard-rkl: [SKIP][565] ([i915#6301]) -> [SKIP][566] ([i915#14544] / [i915#6301])
[565]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_panel_fitting@legacy.html
[566]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-glk: [DMESG-WARN][567] ([i915#118]) -> [DMESG-FAIL][568] ([i915#118] / [i915#16396])
[567]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-glk8/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
[568]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-glk4/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
- shard-rkl: [SKIP][569] ([i915#14544] / [i915#15709]) -> [SKIP][570] ([i915#15709])
[569]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
[570]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-rkl: [SKIP][571] ([i915#15709]) -> [SKIP][572] ([i915#14544] / [i915#15709])
[571]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
[572]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_plane_lowres@tiling-4:
- shard-rkl: [SKIP][573] ([i915#3555]) -> [SKIP][574] ([i915#14544] / [i915#3555]) +1 other test skip
[573]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_plane_lowres@tiling-4.html
[574]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_plane_lowres@tiling-4.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-rkl: [SKIP][575] ([i915#12343] / [i915#5354]) -> [SKIP][576] ([i915#12343] / [i915#14544] / [i915#5354])
[575]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_pm_backlight@fade-with-dpms.html
[576]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-rkl: [SKIP][577] ([i915#14544] / [i915#15073]) -> [SKIP][578] ([i915#15073])
[577]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[578]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_prime@basic-crc-hybrid:
- shard-rkl: [SKIP][579] ([i915#14544] / [i915#6524]) -> [SKIP][580] ([i915#6524])
[579]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_prime@basic-crc-hybrid.html
[580]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-rkl: [SKIP][581] ([i915#11520]) -> [SKIP][582] ([i915#11520] / [i915#14544]) +2 other tests skip
[581]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
[582]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
- shard-rkl: [SKIP][583] ([i915#11520] / [i915#14544]) -> [SKIP][584] ([i915#11520]) +2 other tests skip
[583]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
[584]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@pr-cursor-plane-onoff:
- shard-rkl: [SKIP][585] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][586] ([i915#1072] / [i915#9732]) +2 other tests skip
[585]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_psr@pr-cursor-plane-onoff.html
[586]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_psr@pr-cursor-plane-onoff.html
* igt@kms_psr@psr-cursor-blt:
- shard-rkl: [SKIP][587] ([i915#1072] / [i915#9732]) -> [SKIP][588] ([i915#1072] / [i915#14544] / [i915#9732]) +6 other tests skip
[587]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@kms_psr@psr-cursor-blt.html
[588]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@kms_psr@psr-cursor-blt.html
* igt@kms_vrr@max-min:
- shard-rkl: [SKIP][589] ([i915#14544] / [i915#9906]) -> [SKIP][590] ([i915#9906])
[589]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-6/igt@kms_vrr@max-min.html
[590]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-7/igt@kms_vrr@max-min.html
* igt@perf@mi-rpc:
- shard-rkl: [SKIP][591] ([i915#2434]) -> [SKIP][592] ([i915#14544] / [i915#2434])
[591]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-3/igt@perf@mi-rpc.html
[592]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@perf@mi-rpc.html
* igt@prime_vgem@coherency-gtt:
- shard-rkl: [SKIP][593] ([i915#3708]) -> [SKIP][594] ([i915#14544] / [i915#3708])
[593]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19093/shard-rkl-8/igt@prime_vgem@coherency-gtt.html
[594]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/shard-rkl-6/igt@prime_vgem@coherency-gtt.html
[i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
[i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
[i915#11814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11814
[i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
[i915#12193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12193
[i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
[i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
[i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
[i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14121]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14121
[i915#14123]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14123
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
[i915#14498]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14498
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14545
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
[i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
[i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
[i915#15454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15454
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
[i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
[i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
[i915#15481]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15481
[i915#15492]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15492
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15638
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#15657]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15657
[i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
[i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
[i915#15722]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15722
[i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
[i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
[i915#15948]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15948
[i915#15949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15949
[i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
[i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
[i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
[i915#16017]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16017
[i915#16080]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16080
[i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081
[i915#16084]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16084
[i915#16109]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16109
[i915#16112]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16112
[i915#16166]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16166
[i915#16182]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16182
[i915#16184]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16184
[i915#16236]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16236
[i915#16348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16348
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16386
[i915#16396]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16396
[i915#16420]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16420
[i915#16451]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16451
[i915#16471]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16471
[i915#16479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16479
[i915#16518]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16518
[i915#16593]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16593
[i915#16599]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16599
[i915#16600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16600
[i915#16644]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16644
[i915#16680]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16680
[i915#16837]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16837
[i915#16852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16852
[i915#16866]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16866
[i915#16870]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16870
[i915#16881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16881
[i915#16884]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16884
[i915#16914]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16914
[i915#16924]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16924
[i915#16929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16929
[i915#16931]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16931
[i915#16932]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16932
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
[i915#2436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2436
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
[i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4818]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4818
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4881
[i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
[i915#5107]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5107
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5882
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
[i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7178
[i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
[i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8289
[i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#8898]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8898
[i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
[i915#9100]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9100
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
[i915#9979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9979
Build changes
-------------
* Linux: CI_DRM_19093 -> Patchwork_173452v4
CI-20190529: 20190529
CI_DRM_19093: 36a10efe69894eba7e10e3075c297b6e332e6957 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9084: 9084
Patchwork_173452v4: 36a10efe69894eba7e10e3075c297b6e332e6957 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v4/index.html
[-- Attachment #2: Type: text/html, Size: 210102 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (2 preceding siblings ...)
2026-09-06 12:28 ` ✗ i915.CI.Full: failure " Patchwork
@ 2026-09-07 4:41 ` Xiao Lu
2026-09-07 4:41 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 4:53 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology sashiko-bot
2026-09-07 4:44 ` [PATCH v5 0/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (6 subsequent siblings)
10 siblings, 2 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-07 4:41 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
drm_dp_mst_is_virtual_dpcd() checks if a branch port qualifies as a
virtual DPCD device by looking for a downstream port with
Peer_Device_Type=3 (DP_PEER_DEVICE_SST_SINK).
Some PCON devices advertise their downstream HDMI sink port using
Peer_Device_Type=4 (DP_PEER_DEVICE_DP_LEGACY_CONV) with a non-zero
DPCD_Revision in the link address reply, indicating a virtual DPCD is
present (VESA SCR Option 2). The current check misses this case, so
passthrough_aux is never set and DSC passthrough modes are rejected.
Accept DP_PEER_DEVICE_DP_LEGACY_CONV as a valid downstream peer type
in the DP-to-DP branch so these PCON topologies are correctly
identified.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 4de36fda0..7d1128bcd 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -6045,7 +6045,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
port->mstb &&
port->mstb->num_ports == 2) {
list_for_each_entry(downstream_port, &port->mstb->ports, next) {
- if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
+ if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
+ downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
!downstream_port->input) {
mutex_unlock(&port->mgr->lock);
return true;
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-07 4:41 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
@ 2026-09-07 4:41 ` Xiao Lu
2026-09-07 4:56 ` sashiko-bot
2026-09-07 4:53 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology sashiko-bot
1 sibling, 1 reply; 30+ messages in thread
From: Xiao Lu @ 2026-09-07 4:41 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
combined with the downstream HDMI 2.1 sink's DSC 1.2 support from
EDID HF-VSDB. Cache the result in connector->dp.pcon_dsc_passthrough
(same lifecycle as fec_capability and dsc_dpcd).
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC parameters (slice count, bpc limits) from the downstream
HDMI sink's EDID DSC capabilities rather than from the PCON encoder
DPCD (all-zero for passthrough-only PCONs).
- Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults (version 1.2, convert_rgb per output format,
line_buf_depth=13, block_pred=true) instead of the PCON dsc_dpcd
fields which reflect passthrough device constraints, not the actual
HDMI sink decompressor.
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap from zeroing pipe.max_bpp.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path is preserved; the PCON
case is handled by redirecting aux to intel_dp->aux (SST) or
connector->mst.port->aux (MST via REMOTE_DPCD_WRITE) when
pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress.
- Add passthrough branch in intel_dp_mode_valid_with_dsc() to use
EDID max_slices capped by PCON dsc_dpcd slice capability.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected directly (SST)
and via PS8650 MST hub to a Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2, max 16 slices, 400 MHz/slice). At 4K@240Hz DSC compression is
required; driver now writes 0x160=0x02 explicitly and DSC parameters are
correctly derived from the HDMI sink EDID. Depends on the preceding
drm/dp/mst patch for MST topology support.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v5: Split into two patches: the drm/dp/mst fix for recognizing
DP-to-HDMI PCON as virtual DPCD is now patch 1/2.
Inline PCON passthrough DSC parameter overrides into
intel_dp_dsc_compute_params() instead of a separate function;
fix convert_rgb to depend on output_format instead of being
unconditionally true.
Remove intel_dp_pcon_set_dsc_passthrough_cap() call from
intel_dp_get_dsc_sink_cap() - keep only the intel_dp_set_edid()
call so MST streams do not incorrectly update the root connector.
Pass INT_MAX as src_max_slice_width to intel_hdmi_dsc_get_num_slices()
so only the HDMI spec 2720px limit applies.
Add hdisplay divisibility check for the computed slice count.
Add PCON passthrough branch in intel_dp_mode_valid_with_dsc() using
EDID max_slices capped by PCON dsc_dpcd slice capability.
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
Fix intel_hdmi_dsc_get_num_slices() call to pass output_format as
the 2nd argument matching the updated 6-parameter signature.
Add intel_dp_pcon_passthrough_dsc_compute_params() to compute DSC
parameters from HDMI sink EDID rather than PCON dsc_dpcd fields
(version, color format, line_buf_depth, block_pred are not valid
for a passthrough-only PCON that does no decoding).
Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap (0x00) from zeroing pipe.max_bpp.
Fix intel_dp_dsc_compute_config() to use the correct connector
context instead of intel_dp->attached_connector for MST streams.
v3: Restrict PCON DSC passthrough to SST direct connections only.
In MST topologies the PCON is connected through an intermediate hub;
passthrough is already handled separately via the MST hub path in
intel_dp_sink_set_dsc_passthrough(), so skip it here by returning
early when connector->mst.port is set.
Fix intel_hdmi_dsc_get_num_slices() call to use drm_display_mode *
instead of intel_crtc_state * to match the updated function signature.
v2: Fix build failure on drm-tip - replace non-existent dsc.slice_count
field with dsc.slice_config. Introduce
intel_dp_pcon_passthrough_dsc_slice_config() which calls
intel_hdmi_dsc_get_num_slices() for the target slice count then
finds a matching intel_dsc_slice_config via intel_dsc_get_slice_config()
to satisfy Intel VDSC HW constraints.
Fix pcon_dsc_passthrough caching order: move
intel_dp_pcon_set_dsc_passthrough_cap() from intel_dp_get_dsc_sink_cap()
to intel_dp_set_edid() so it runs after EDID is parsed and
display_info.hdmi.dsc_cap is populated. Also clear pcon_dsc_passthrough
in intel_dp_unset_edid() to keep lifecycle consistent.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 275 +++++++++++++++---
2 files changed, 242 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..a54d4373a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,45 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ /* convert_rgb only applies for RGB output; leave false for YCbCr */
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB);
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
+ DP_DSC_RGB;
+
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2339,10 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2381,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2485,10 +2524,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
num_joined_pipes,
output_format,
pipe_bpp, INT_MAX);
- int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
- mode_clock,
- mode_hdisplay,
- num_joined_pipes);
+ int dsc_slice_count;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
+ drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
+ false));
+ } else {
+ dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ }
if (min_bpp_x16 <= 0 || min_bpp_x16 > max_bpp_x16)
return false;
@@ -2683,8 +2732,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2771,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3790,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3806,19 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (!connector->mst.port) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN on
+ * the PCON's own aux channel so it forwards the compressed
+ * stream to the HDMI sink instead of decoding it.
+ */
+ if (connector->dp.pcon_dsc_passthrough)
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3826,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4348,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+static void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
+{
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info;
+
+ if (!connector)
+ return;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * PCON DSC passthrough is only supported for SST direct connections.
+ * In MST topologies the intermediate hub may report incorrect virtual
+ * DPCD for the downstream PCON port, leading to mismatched DSC
+ * parameters. Skip passthrough for MST until hub firmware correctly
+ * reflects the PCON's capabilities.
+ */
+ if (connector->mst.port)
+ return;
+
+ if (!intel_dp_is_hdmi_2_1_sink(intel_dp))
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ info = &connector->base.display_info;
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * Derive the required slice count from the downstream HDMI 2.1 sink
+ * DSC capabilities in EDID (not from the PCON encoder DPCD which is
+ * all-zero for passthrough-only devices).
+ */
+ /*
+ * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
+ * applies; the source VDSC HW limit (5120px) is higher so it is not
+ * the binding constraint here.
+ * src_max_slices: use hdmi_max_slices as the binding upper limit since
+ * the PCON passthrough capability bit (already checked) is the gate;
+ * the for-loop below further constrains to what the Intel VDSC HW can
+ * actually produce.
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ hdmi_max_slices, INT_MAX,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+ int line_slices;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ line_slices = intel_dsc_line_slice_count(&config);
+ if (line_slices != target_slices)
+ continue;
+
+ /* Slice count must evenly divide the horizontal display width */
+ if (crtc_state->hw.adjusted_mode.hdisplay % line_slices)
+ continue;
+
+ *config_ret = config;
+ return true;
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4709,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -6148,6 +6348,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6376,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v5 0/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (3 preceding siblings ...)
2026-09-07 4:41 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
@ 2026-09-07 4:44 ` Xiao Lu
2026-09-07 4:44 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-07 4:44 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 6:30 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7) Patchwork
` (5 subsequent siblings)
10 siblings, 2 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-07 4:44 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
This series enables explicit driver control of DSC passthrough for
HDMI 2.1 PCON devices (e.g. Parade PS196) connected both directly (SST)
and via MST hub (e.g. PS8650).
Patch 1/2 fixes drm_dp_mst_is_virtual_dpcd() to also recognize
DP_PEER_DEVICE_DP_LEGACY_CONV as a valid downstream peer type in the
DP-to-DP branch, which is required for passthrough_aux to be correctly
set when a PCON sits behind an MST hub.
Patch 2/2 adds the intel_dp driver changes to detect, configure and
control DSC passthrough mode.
Tested with Parade PS196G + Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2). At 4K@240Hz DSC is required; driver writes 0x160=0x02 and
DSC parameters are derived from the HDMI sink EDID.
Xiao Lu (2):
drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 +-
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 275 ++++++++++++++++++---
3 files changed, 244 insertions(+), 35 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-07 4:44 ` [PATCH v5 0/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-07 4:44 ` Xiao Lu
2026-09-07 4:54 ` sashiko-bot
2026-09-07 4:44 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
1 sibling, 1 reply; 30+ messages in thread
From: Xiao Lu @ 2026-09-07 4:44 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
drm_dp_mst_is_virtual_dpcd() checks if a branch port qualifies as a
virtual DPCD device by looking for a downstream port with
Peer_Device_Type=3 (DP_PEER_DEVICE_SST_SINK).
Some PCON devices advertise their downstream HDMI sink port using
Peer_Device_Type=4 (DP_PEER_DEVICE_DP_LEGACY_CONV) with a non-zero
DPCD_Revision in the link address reply, indicating a virtual DPCD is
present (VESA SCR Option 2). The current check misses this case, so
passthrough_aux is never set and DSC passthrough modes are rejected.
Accept DP_PEER_DEVICE_DP_LEGACY_CONV as a valid downstream peer type
in the DP-to-DP branch so these PCON topologies are correctly
identified.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 4de36fda0..7d1128bcd 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -6045,7 +6045,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
port->mstb &&
port->mstb->num_ports == 2) {
list_for_each_entry(downstream_port, &port->mstb->ports, next) {
- if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
+ if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
+ downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
!downstream_port->input) {
mutex_unlock(&port->mgr->lock);
return true;
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-07 4:44 ` [PATCH v5 0/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 4:44 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
@ 2026-09-07 4:44 ` Xiao Lu
2026-09-07 5:04 ` sashiko-bot
2026-09-09 3:35 ` [PATCH v6 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
1 sibling, 2 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-07 4:44 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
combined with the downstream HDMI 2.1 sink's DSC 1.2 support from
EDID HF-VSDB. Cache the result in connector->dp.pcon_dsc_passthrough
(same lifecycle as fec_capability and dsc_dpcd).
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC parameters (slice count, bpc limits) from the downstream
HDMI sink's EDID DSC capabilities rather than from the PCON encoder
DPCD (all-zero for passthrough-only PCONs).
- Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults (version 1.2, convert_rgb per output format,
line_buf_depth=13, block_pred=true) instead of the PCON dsc_dpcd
fields which reflect passthrough device constraints, not the actual
HDMI sink decompressor.
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap from zeroing pipe.max_bpp.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path is preserved; the PCON
case is handled by redirecting aux to intel_dp->aux (SST) or
connector->mst.port->aux (MST via REMOTE_DPCD_WRITE) when
pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress.
- Add passthrough branch in intel_dp_mode_valid_with_dsc() to use
EDID max_slices capped by PCON dsc_dpcd slice capability.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected directly (SST)
and via PS8650 MST hub to a Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2, max 16 slices, 400 MHz/slice). At 4K@240Hz DSC compression is
required; driver now writes 0x160=0x02 explicitly and DSC parameters are
correctly derived from the HDMI sink EDID. Depends on the preceding
drm/dp/mst patch for MST topology support.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v5: Split into two patches: the drm/dp/mst fix for recognizing
DP-to-HDMI PCON as virtual DPCD is now patch 1/2.
Inline PCON passthrough DSC parameter overrides into
intel_dp_dsc_compute_params() instead of a separate function;
fix convert_rgb to depend on output_format instead of being
unconditionally true.
Remove intel_dp_pcon_set_dsc_passthrough_cap() call from
intel_dp_get_dsc_sink_cap() - keep only the intel_dp_set_edid()
call so MST streams do not incorrectly update the root connector.
Pass INT_MAX as src_max_slice_width to intel_hdmi_dsc_get_num_slices()
so only the HDMI spec 2720px limit applies.
Add hdisplay divisibility check for the computed slice count.
Add PCON passthrough branch in intel_dp_mode_valid_with_dsc() using
EDID max_slices capped by PCON dsc_dpcd slice capability.
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
Fix intel_hdmi_dsc_get_num_slices() call to pass output_format as
the 2nd argument matching the updated 6-parameter signature.
Add intel_dp_pcon_passthrough_dsc_compute_params() to compute DSC
parameters from HDMI sink EDID rather than PCON dsc_dpcd fields
(version, color format, line_buf_depth, block_pred are not valid
for a passthrough-only PCON that does no decoding).
Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap (0x00) from zeroing pipe.max_bpp.
Fix intel_dp_dsc_compute_config() to use the correct connector
context instead of intel_dp->attached_connector for MST streams.
v3: Restrict PCON DSC passthrough to SST direct connections only.
In MST topologies the PCON is connected through an intermediate hub;
passthrough is already handled separately via the MST hub path in
intel_dp_sink_set_dsc_passthrough(), so skip it here by returning
early when connector->mst.port is set.
Fix intel_hdmi_dsc_get_num_slices() call to use drm_display_mode *
instead of intel_crtc_state * to match the updated function signature.
v2: Fix build failure on drm-tip - replace non-existent dsc.slice_count
field with dsc.slice_config. Introduce
intel_dp_pcon_passthrough_dsc_slice_config() which calls
intel_hdmi_dsc_get_num_slices() for the target slice count then
finds a matching intel_dsc_slice_config via intel_dsc_get_slice_config()
to satisfy Intel VDSC HW constraints.
Fix pcon_dsc_passthrough caching order: move
intel_dp_pcon_set_dsc_passthrough_cap() from intel_dp_get_dsc_sink_cap()
to intel_dp_set_edid() so it runs after EDID is parsed and
display_info.hdmi.dsc_cap is populated. Also clear pcon_dsc_passthrough
in intel_dp_unset_edid() to keep lifecycle consistent.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 275 +++++++++++++++---
2 files changed, 242 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..a54d4373a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,45 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ /* convert_rgb only applies for RGB output; leave false for YCbCr */
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB);
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
+ DP_DSC_RGB;
+
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2339,10 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2381,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2485,10 +2524,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
num_joined_pipes,
output_format,
pipe_bpp, INT_MAX);
- int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
- mode_clock,
- mode_hdisplay,
- num_joined_pipes);
+ int dsc_slice_count;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
+ drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
+ false));
+ } else {
+ dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ }
if (min_bpp_x16 <= 0 || min_bpp_x16 > max_bpp_x16)
return false;
@@ -2683,8 +2732,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2771,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3790,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3806,19 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (!connector->mst.port) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN on
+ * the PCON's own aux channel so it forwards the compressed
+ * stream to the HDMI sink instead of decoding it.
+ */
+ if (connector->dp.pcon_dsc_passthrough)
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3826,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4348,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+static void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
+{
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info;
+
+ if (!connector)
+ return;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * PCON DSC passthrough is only supported for SST direct connections.
+ * In MST topologies the intermediate hub may report incorrect virtual
+ * DPCD for the downstream PCON port, leading to mismatched DSC
+ * parameters. Skip passthrough for MST until hub firmware correctly
+ * reflects the PCON's capabilities.
+ */
+ if (connector->mst.port)
+ return;
+
+ if (!intel_dp_is_hdmi_2_1_sink(intel_dp))
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ info = &connector->base.display_info;
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * Derive the required slice count from the downstream HDMI 2.1 sink
+ * DSC capabilities in EDID (not from the PCON encoder DPCD which is
+ * all-zero for passthrough-only devices).
+ */
+ /*
+ * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
+ * applies; the source VDSC HW limit (5120px) is higher so it is not
+ * the binding constraint here.
+ * src_max_slices: use hdmi_max_slices as the binding upper limit since
+ * the PCON passthrough capability bit (already checked) is the gate;
+ * the for-loop below further constrains to what the Intel VDSC HW can
+ * actually produce.
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ hdmi_max_slices, INT_MAX,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+ int line_slices;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ line_slices = intel_dsc_line_slice_count(&config);
+ if (line_slices != target_slices)
+ continue;
+
+ /* Slice count must evenly divide the horizontal display width */
+ if (crtc_state->hw.adjusted_mode.hdisplay % line_slices)
+ continue;
+
+ *config_ret = config;
+ return true;
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4709,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -6148,6 +6348,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6376,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-07 4:41 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-07 4:41 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-07 4:53 ` sashiko-bot
1 sibling, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-07 4:53 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The logic for identifying a Virtual DPCD downstream port misses the required DPCD_Revision check, causing standard legacy converters to be incorrectly identified as Virtual DPCDs.
--
commit 659313a54262ef8ae8960a7c3b7925da1958206b
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
This commit updates drm_dp_mst_is_virtual_dpcd() to accept legacy converters
as a valid downstream peer type. This allows the driver to correctly identify
PCON devices that advertise their downstream HDMI sink port using
DP_PEER_DEVICE_DP_LEGACY_CONV.
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 7ce9e212770ad..5f15d9313a20e 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -6047,7 +6047,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
> port->mstb &&
> port->mstb->num_ports == 2) {
> list_for_each_entry(downstream_port, &port->mstb->ports, next) {
> - if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
> + if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
> + downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
> !downstream_port->input) {
> mutex_unlock(&port->mgr->lock);
> return true;
[Severity: Medium]
Will this incorrectly identify standard legacy converters as Virtual DPCDs?
The commit message notes that Virtual DPCD presence for legacy converters
is indicated by a non-zero DPCD_Revision (VESA SCR Option 2), but the added
logic accepts DP_PEER_DEVICE_DP_LEGACY_CONV without verifying if
downstream_port->dpcd_rev != 0.
Could this cause the driver to improperly set passthrough_aux and attempt
DPCD reads on a standard DP-to-VGA/DVI/HDMI converter (with dpcd_rev == 0)
connected to a 2-port MST branch device, resulting in AUX timeouts or link
training failures?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260907044140.1367870-1-xiaolu.xie@intel.com?part=1
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-07 4:44 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
@ 2026-09-07 4:54 ` sashiko-bot
0 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-07 4:54 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing DPCD_Revision check causes false positive virtual DPCD detection for standard legacy converters
--
commit e68ed6d2cec8654867cd8f6c00fc3632759c424a
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
This commit modifies the drm_dp_mst_is_virtual_dpcd() function to accept
DP_PEER_DEVICE_DP_LEGACY_CONV downstream ports as virtual DPCDs on DP-to-DP
branches. This is intended to support DP-to-HDMI PCON devices using VESA SCR
Option 2.
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 7ce9e212770ad..5f15d9313a20e 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -6047,7 +6047,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
> port->mstb &&
> port->mstb->num_ports == 2) {
> list_for_each_entry(downstream_port, &port->mstb->ports, next) {
> - if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
> + if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
> + downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
[Severity: High]
The commit message states that PCON devices advertise a non-zero DPCD_Revision
in the link address reply, but this code block appears to check only the pdt
without validating downstream_port->dpcd_rev != 0.
Does this cause standard legacy DP-to-HDMI/VGA adapters (which also report
DP_PEER_DEVICE_DP_LEGACY_CONV but with dpcd_rev == 0) to be incorrectly
identified as virtual DPCDs?
If a standard legacy converter is falsely identified as a virtual DPCD,
drm_dp_mst_dsc_aux_for_port() might skip the mandatory FEC capability check
for that branch. Could this cause DSC to be enabled on paths without FEC
support, leading to link training failures and black screens when users plug
standard adapters into MST hubs?
> !downstream_port->input) {
> mutex_unlock(&port->mgr->lock);
> return true;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260907044410.1368008-1-xiaolu.xie@intel.com?part=1
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-07 4:41 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-07 4:56 ` sashiko-bot
0 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-07 4:56 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Slice count calculation for passthrough-only PCONs evaluates to 0, unconditionally rejecting valid DSC modes.
- [Low] Call to intel_hdmi_dsc_get_num_slices uses an incorrect function signature, causing a build failure and potential out-of-bounds read if coerced.
--
commit 143c11b20062c81b5ac2377b90407f1c60975424
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
This commit adds explicit driver control for PCON DSC passthrough
capabilities, allowing HDMI 2.1 PCON devices to forward compressed streams
to a downstream HDMI sink for decompression. It detects passthrough support,
overrides DSC configuration paths to use the HDMI sink's capabilities, and
writes appropriate registers to enable passthrough instead of relying on
autonomous fallbacks.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 113d767e62e9c..53d4d884f726b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -2534,10 +2573,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
> num_joined_pipes,
> output_format,
> pipe_bpp, INT_MAX);
> - int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> - mode_clock,
> - mode_hdisplay,
> - num_joined_pipes);
> + int dsc_slice_count;
> +
> + if (connector->dp.pcon_dsc_passthrough) {
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
> + drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
> + false));
[Severity: High]
Does this regression artificially cap the slice count to zero for passthrough
PCONs?
As noted in the commit message, the PCON encoder DPCD fields are all-zero for
passthrough-only devices. Because connector->dp.dsc_dpcd is zeroed out,
calling drm_dp_dsc_sink_max_slice_count() will evaluate to 0.
Since this is passed into min_t(), wouldn't dsc_slice_count evaluate to 0
and unconditionally reject valid DSC modes downstream in this function?
> } else {
> dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
[ ... ]
> @@ -4297,6 +4386,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
> }
> }
>
> +/*
> + * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
[ ... ]
> +static bool
> +intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + struct intel_dsc_slice_config *config_ret)
> +{
[ ... ]
> + /*
> + * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
> + * applies; the source VDSC HW limit (5120px) is higher so it is not
> + * the binding constraint here.
> + * src_max_slices: use hdmi_max_slices as the binding upper limit since
> + * the PCON passthrough capability bit (already checked) is the gate;
> + * the for-loop below further constrains to what the Intel VDSC HW can
> + * actually produce.
> + */
> + target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
> + crtc_state->output_format,
> + hdmi_max_slices, INT_MAX,
> + hdmi_max_slices,
> + hdmi_throughput);
[Severity: Low]
Can this regression cause a build failure or memory issues?
The call to intel_hdmi_dsc_get_num_slices() passes 6 arguments, and the first
argument is passed as &crtc_state->hw.adjusted_mode.
Looking at the actual definition of intel_hdmi_dsc_get_num_slices() in
drivers/gpu/drm/i915/display/intel_hdmi.c:
int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput)
It still expects 5 arguments, with the first being a const struct
intel_crtc_state *. Could this result in an out-of-bounds read if the
compiler coerces the smaller drm_display_mode struct into an
intel_crtc_state?
> + if (!target_slices)
> + return false;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260907044140.1367870-1-xiaolu.xie@intel.com?part=2
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-07 4:44 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-07 5:04 ` sashiko-bot
2026-09-09 3:35 ` [PATCH v6 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
1 sibling, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-07 5:04 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Mode validation unconditionally rejects all DSC modes for passthrough PCONs because it derives limits from an all-zero DPCD.
- [Low] Compilation error: `intel_hdmi_dsc_get_num_slices` is called with 6 arguments but defined with 5.
--
commit 3c5cccb0470ef014fba8e2a861fd6cfffd5b223d
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
This patch adds explicit driver control of PCON DSC passthrough. It detects
passthrough capability at connect time and treats the PCON as DSC-capable.
DSC parameters are now derived from the downstream HDMI sink's EDID DSC
capabilities rather than the PCON encoder DPCD.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 113d767e62e9c..53d4d884f726b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -2534,10 +2573,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
> num_joined_pipes,
> output_format,
> pipe_bpp, INT_MAX);
> - int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> - mode_clock,
> - mode_hdisplay,
> - num_joined_pipes);
> + int dsc_slice_count;
> +
> + if (connector->dp.pcon_dsc_passthrough) {
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
> + drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
> + false));
[Severity: High]
Does this logic unintentionally reject all DSC modes for passthrough PCONs?
Because connector->dp.dsc_dpcd is all-zero for passthrough PCONs, calling
drm_dp_dsc_sink_max_slice_count() on it will return 0. This results in
dsc_slice_count being capped at 0, which will cause the mode validation to
fail and reject high-bandwidth modes.
Additionally, could a similar issue occur in intel_dp_mode_valid_format()
where it computes pipe_bpp via intel_dp_dsc_compute_max_bpp()? That function
also relies on the all-zero dsc_dpcd array for passthrough PCONs, returning 0
and causing a cascading failure that rejects the mode.
> + } else {
> + dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> + mode_clock,
> + mode_hdisplay,
> + num_joined_pipes);
> + }
[ ... ]
> @@ -4297,6 +4386,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
[ ... ]
> + /*
> + * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
> + * applies; the source VDSC HW limit (5120px) is higher so it is not
> + * the binding constraint here.
> + * src_max_slices: use hdmi_max_slices as the binding upper limit since
> + * the PCON passthrough capability bit (already checked) is the gate;
> + * the for-loop below further constrains to what the Intel VDSC HW can
> + * actually produce.
> + */
> + target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
> + crtc_state->output_format,
> + hdmi_max_slices, INT_MAX,
> + hdmi_max_slices,
> + hdmi_throughput);
[Severity: Low]
Does this code introduce a build failure?
The function intel_hdmi_dsc_get_num_slices() is called here with 6 arguments,
but its definition only accepts 5 arguments.
> + if (!target_slices)
> + return false;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260907044410.1368008-1-xiaolu.xie@intel.com?part=2
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (4 preceding siblings ...)
2026-09-07 4:44 ` [PATCH v5 0/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-07 6:30 ` Patchwork
2026-09-07 11:33 ` ✓ i915.CI.Full: " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-07 6:30 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4281 bytes --]
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7)
URL : https://patchwork.freedesktop.org/series/173452/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19094 -> Patchwork_173452v7
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/index.html
Participating hosts (38 -> 38)
------------------------------
Additional (1): bat-adls-6
Missing (1): bat-dg2-13
Known issues
------------
Here are the changes found in Patchwork_173452v7 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adls-6: NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic@basic:
- bat-adls-6: NOTRUN -> [SKIP][2] ([i915#15656])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@gem_tiled_pread_basic@basic.html
* igt@intel_hwmon@hwmon-read:
- bat-adls-6: NOTRUN -> [SKIP][3] ([i915#7707]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adls-6: NOTRUN -> [SKIP][4] ([i915#4103]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-adls-6: NOTRUN -> [SKIP][5] ([i915#16361])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adls-6: NOTRUN -> [SKIP][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adls-6: NOTRUN -> [SKIP][7] ([i915#5354])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-mmap-gtt:
- bat-adls-6: NOTRUN -> [SKIP][8] ([i915#1072] / [i915#9732]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adls-6: NOTRUN -> [SKIP][9] ([i915#3555])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adls-6: NOTRUN -> [SKIP][10] ([i915#3291]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/bat-adls-6/igt@prime_vgem@basic-fence-read.html
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_19094 -> Patchwork_173452v7
CI-20190529: 20190529
CI_DRM_19094: 496ff8213a2d2e1e5b1c8efe8b55e1dcdc3e3f8f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9084: 9084
Patchwork_173452v7: 496ff8213a2d2e1e5b1c8efe8b55e1dcdc3e3f8f @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/index.html
[-- Attachment #2: Type: text/html, Size: 5129 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ i915.CI.Full: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (5 preceding siblings ...)
2026-09-07 6:30 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7) Patchwork
@ 2026-09-07 11:33 ` Patchwork
2026-09-09 3:50 ` ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev9) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-07 11:33 UTC (permalink / raw)
To: Xie, Xiaolu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 124147 bytes --]
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7)
URL : https://patchwork.freedesktop.org/series/173452/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19094_full -> Patchwork_173452v7_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 11)
------------------------------
Additional (1): pig-kbl-iris
New tests
---------
New tests have been introduced between CI_DRM_19094_full and Patchwork_173452v7_full:
### New IGT tests (16) ###
* igt@kms_cursor_crc@cursor-random-64x64@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [4.22] s
* igt@kms_cursor_crc@cursor-random-64x64@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [4.63] s
* igt@kms_cursor_crc@cursor-random-64x64@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [4.49] s
* igt@kms_cursor_crc@cursor-sliding-64x64@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [4.06] s
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-4-size-128:
- Statuses : 1 pass(s)
- Exec time: [3.21] s
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-4-size-256:
- Statuses : 1 pass(s)
- Exec time: [3.19] s
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-4-size-64:
- Statuses : 1 pass(s)
- Exec time: [3.22] s
* igt@kms_plane_cursor@primary@pipe-b-hdmi-a-4-size-128:
- Statuses : 1 pass(s)
- Exec time: [3.17] s
* igt@kms_plane_cursor@primary@pipe-b-hdmi-a-4-size-256:
- Statuses : 1 pass(s)
- Exec time: [3.22] s
* igt@kms_plane_cursor@primary@pipe-b-hdmi-a-4-size-64:
- Statuses : 1 pass(s)
- Exec time: [3.23] s
* igt@kms_plane_cursor@primary@pipe-c-hdmi-a-4-size-128:
- Statuses : 1 pass(s)
- Exec time: [3.19] s
* igt@kms_plane_cursor@primary@pipe-c-hdmi-a-4-size-256:
- Statuses : 1 pass(s)
- Exec time: [3.17] s
* igt@kms_plane_cursor@primary@pipe-c-hdmi-a-4-size-64:
- Statuses : 1 pass(s)
- Exec time: [3.30] s
* igt@kms_plane_cursor@primary@pipe-d-hdmi-a-4-size-128:
- Statuses : 1 pass(s)
- Exec time: [3.26] s
* igt@kms_plane_cursor@primary@pipe-d-hdmi-a-4-size-256:
- Statuses : 1 pass(s)
- Exec time: [3.19] s
* igt@kms_plane_cursor@primary@pipe-d-hdmi-a-4-size-64:
- Statuses : 1 pass(s)
- Exec time: [3.23] s
### New Piglit tests (30) ###
* igt@i915_selftest@live@active:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.65] s
* igt@i915_selftest@live@client:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.73] s
* igt@i915_selftest@live@coherency:
- Statuses : 1 dmesg-warn(s)
- Exec time: [2.47] s
* igt@i915_selftest@live@dmabuf:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.77] s
* igt@i915_selftest@live@evict:
- Statuses : 1 dmesg-warn(s)
- Exec time: [3.27] s
* igt@i915_selftest@live@execlists:
- Statuses : 1 dmesg-warn(s)
- Exec time: [14.34] s
* igt@i915_selftest@live@gem:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.85] s
* igt@i915_selftest@live@gem_migrate:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.66] s
* igt@i915_selftest@live@gt_heartbeat:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.67] s
* igt@i915_selftest@live@gt_lrc:
- Statuses : 1 dmesg-warn(s)
- Exec time: [4.73] s
* igt@i915_selftest@live@gt_mocs:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.75] s
* igt@i915_selftest@live@gt_pm:
- Statuses : 1 dmesg-warn(s)
- Exec time: [10.33] s
* igt@i915_selftest@live@gt_tlb:
- Statuses : 1 dmesg-warn(s)
- Exec time: [3.33] s
* igt@i915_selftest@live@gtt:
- Statuses : 1 dmesg-warn(s)
- Exec time: [9.45] s
* igt@i915_selftest@live@guc:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.64] s
* igt@i915_selftest@live@guc_hang:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.63] s
* igt@i915_selftest@live@guc_multi_lrc:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.62] s
* igt@i915_selftest@live@hangcheck:
- Statuses : 1 dmesg-warn(s)
- Exec time: [30.34] s
* igt@i915_selftest@live@hugepages:
- Statuses : 1 dmesg-warn(s)
- Exec time: [8.15] s
* igt@i915_selftest@live@late_gt_pm:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.68] s
* igt@i915_selftest@live@memory_region:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.67] s
* igt@i915_selftest@live@migrate:
- Statuses : 1 dmesg-warn(s)
- Exec time: [4.62] s
* igt@i915_selftest@live@mman:
- Statuses : 1 dmesg-warn(s)
- Exec time: [4.99] s
* igt@i915_selftest@live@objects:
- Statuses : 1 dmesg-warn(s)
- Exec time: [2.24] s
* igt@i915_selftest@live@perf:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.79] s
* igt@i915_selftest@live@requests:
- Statuses : 1 dmesg-warn(s)
- Exec time: [9.09] s
* igt@i915_selftest@live@reset:
- Statuses : 1 dmesg-warn(s)
- Exec time: [2.08] s
* igt@i915_selftest@live@ring_submission:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.64] s
* igt@i915_selftest@live@slpc:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.66] s
* igt@i915_selftest@live@vma:
- Statuses : 1 dmesg-warn(s)
- Exec time: [1.67] s
Known issues
------------
Here are the changes found in Patchwork_173452v7_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg1: NOTRUN -> [SKIP][1] ([i915#8411])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@device_reset@cold-reset-bound:
- shard-tglu-1: NOTRUN -> [SKIP][2] ([i915#11078])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@device_reset@cold-reset-bound.html
- shard-dg2: NOTRUN -> [SKIP][3] ([i915#11078])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@device_reset@cold-reset-bound.html
* igt@device_reset@unbind-reset-rebind:
- shard-dg1: NOTRUN -> [ABORT][4] ([i915#11814])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@device_reset@unbind-reset-rebind.html
* igt@gem_ccs@block-copy-compressed:
- shard-rkl: NOTRUN -> [SKIP][5] ([i915#3555] / [i915#9323])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_ccs@block-copy-compressed.html
- shard-dg1: NOTRUN -> [SKIP][6] ([i915#3555] / [i915#9323])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@block-multicopy-inplace:
- shard-tglu-1: NOTRUN -> [SKIP][7] ([i915#3555] / [i915#9323])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@gem_ccs@block-multicopy-inplace.html
* igt@gem_ccs@ctrl-surf-copy:
- shard-tglu: NOTRUN -> [SKIP][8] ([i915#3555] / [i915#9323])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@gem_ccs@ctrl-surf-copy.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][9] ([i915#13356] / [i915#16348])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-4/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-tglu: NOTRUN -> [SKIP][10] ([i915#7697])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_ctx_isolation@preservation-s3:
- shard-rkl: [PASS][11] -> [INCOMPLETE][12] ([i915#13356]) +1 other test incomplete
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-4/igt@gem_ctx_isolation@preservation-s3.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-3/igt@gem_ctx_isolation@preservation-s3.html
* igt@gem_ctx_persistence@heartbeat-many:
- shard-dg2: NOTRUN -> [SKIP][13] ([i915#8555])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@gem_ctx_persistence@heartbeat-many.html
* igt@gem_ctx_persistence@heartbeat-stop:
- shard-dg1: NOTRUN -> [SKIP][14] ([i915#8555])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_ctx_persistence@heartbeat-stop.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-tglu: NOTRUN -> [SKIP][15] ([i915#280])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_ctx_sseu@mmap-args:
- shard-tglu-1: NOTRUN -> [SKIP][16] ([i915#280])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@kms:
- shard-tglu: NOTRUN -> [ABORT][17] ([i915#16837])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@gem_eio@kms.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#4812])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg1: NOTRUN -> [SKIP][19] ([i915#4771])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_capture@capture-recoverable:
- shard-tglu-1: NOTRUN -> [SKIP][20] ([i915#6344])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_flush@basic-wb-ro-default:
- shard-dg2: NOTRUN -> [SKIP][21] ([i915#3539] / [i915#4852]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_exec_flush@basic-wb-ro-default.html
* igt@gem_exec_params@secure-non-master:
- shard-dg2: NOTRUN -> [SKIP][22] +7 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_exec_params@secure-non-master.html
* igt@gem_exec_reloc@basic-gtt-cpu:
- shard-dg1: NOTRUN -> [SKIP][23] ([i915#3281]) +2 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_exec_reloc@basic-gtt-cpu.html
* igt@gem_exec_reloc@basic-range-active:
- shard-dg2: NOTRUN -> [SKIP][24] ([i915#3281]) +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@gem_exec_reloc@basic-range-active.html
* igt@gem_exec_reloc@basic-wc-cpu:
- shard-rkl: NOTRUN -> [SKIP][25] ([i915#3281]) +3 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_exec_reloc@basic-wc-cpu.html
* igt@gem_exec_schedule@preempt-queue:
- shard-dg2: NOTRUN -> [SKIP][26] ([i915#4537] / [i915#4812])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_exec_schedule@preempt-queue.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain:
- shard-dg1: NOTRUN -> [SKIP][27] ([i915#4812]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@gem_exec_schedule@preempt-queue-contexts-chain.html
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: [PASS][28] -> [INCOMPLETE][29] ([i915#13356]) +1 other test incomplete
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg2-3/igt@gem_exec_suspend@basic-s0.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-4/igt@gem_exec_suspend@basic-s0.html
* igt@gem_fenced_exec_thrash@2-spare-fences:
- shard-dg1: NOTRUN -> [SKIP][30] ([i915#4860]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@gem_fenced_exec_thrash@2-spare-fences.html
* igt@gem_fenced_exec_thrash@no-spare-fences:
- shard-dg2: NOTRUN -> [SKIP][31] ([i915#4860])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@gem_fenced_exec_thrash@no-spare-fences.html
* igt@gem_huc_copy@huc-copy:
- shard-tglu-1: NOTRUN -> [SKIP][32] ([i915#2190])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-dg1: NOTRUN -> [SKIP][33] ([i915#12193])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:
- shard-dg1: NOTRUN -> [SKIP][34] ([i915#4565])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html
* igt@gem_lmem_swapping@parallel-random-verify:
- shard-tglu: NOTRUN -> [SKIP][35] ([i915#4613]) +6 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@gem_lmem_swapping@parallel-random-verify.html
* igt@gem_lmem_swapping@random:
- shard-glk: NOTRUN -> [SKIP][36] ([i915#4613]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk3/igt@gem_lmem_swapping@random.html
* igt@gem_lmem_swapping@verify-random:
- shard-rkl: NOTRUN -> [SKIP][37] ([i915#4613])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_lmem_swapping@verify-random.html
* igt@gem_madvise@dontneed-before-pwrite:
- shard-rkl: NOTRUN -> [SKIP][38] ([i915#3282])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@gem_madvise@dontneed-before-pwrite.html
* igt@gem_mmap@bad-offset:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#4083])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@gem_mmap@bad-offset.html
* igt@gem_mmap_gtt@basic:
- shard-dg2: NOTRUN -> [SKIP][40] ([i915#4077]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_mmap_gtt@basic.html
* igt@gem_mmap_gtt@basic-small-copy-odd:
- shard-dg1: NOTRUN -> [SKIP][41] ([i915#4077]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_mmap_gtt@basic-small-copy-odd.html
* igt@gem_mmap_wc@write-prefaulted:
- shard-dg1: NOTRUN -> [SKIP][42] ([i915#4083]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@gem_mmap_wc@write-prefaulted.html
* igt@gem_partial_pwrite_pread@write-uncached:
- shard-dg1: NOTRUN -> [SKIP][43] ([i915#3282])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@gem_partial_pwrite_pread@write-uncached.html
* igt@gem_pread@exhaustion:
- shard-tglu: NOTRUN -> [WARN][44] ([i915#2658])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@gem_pread@exhaustion.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#4270]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@hw-rejects-pxp-buffer:
- shard-tglu: NOTRUN -> [SKIP][46] ([i915#13398])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@gem_pxp@hw-rejects-pxp-buffer.html
* igt@gem_readwrite@write-bad-handle:
- shard-dg2: NOTRUN -> [SKIP][47] ([i915#3282])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_readwrite@write-bad-handle.html
* igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs:
- shard-dg2: NOTRUN -> [SKIP][48] ([i915#5190] / [i915#8428])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#4079])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-glk11: NOTRUN -> [INCOMPLETE][50] ([i915#13356] / [i915#14586])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@gem_workarounds@suspend-resume-fd.html
* igt@gen9_exec_parse@batch-without-end:
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#2527])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gen9_exec_parse@batch-without-end.html
- shard-dg1: NOTRUN -> [SKIP][52] ([i915#2527])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@gen9_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@batch-zero-length:
- shard-tglu: NOTRUN -> [SKIP][53] ([i915#2527] / [i915#2856])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@gen9_exec_parse@batch-zero-length.html
* igt@gen9_exec_parse@secure-batches:
- shard-tglu-1: NOTRUN -> [SKIP][54] ([i915#2527] / [i915#2856])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@gen9_exec_parse@secure-batches.html
* igt@gpu_buddy@gpu_buddy:
- shard-tglu: NOTRUN -> [SKIP][55] ([i915#15678])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@gpu_buddy@gpu_buddy.html
* igt@i915_drm_fdinfo@virtual-busy:
- shard-dg1: NOTRUN -> [SKIP][56] ([i915#14118]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@i915_drm_fdinfo@virtual-busy.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][57] ([i915#8399])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-tglu: NOTRUN -> [WARN][58] ([i915#13790] / [i915#2681]) +1 other test warn
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rpm@debugfs-forcewake-user:
- shard-dg1: [PASS][59] -> [DMESG-WARN][60] ([i915#4423]) +3 other tests dmesg-warn
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-15/igt@i915_pm_rpm@debugfs-forcewake-user.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@i915_pm_rpm@debugfs-forcewake-user.html
* igt@i915_pm_rps@reset:
- shard-snb: [PASS][61] -> [TIMEOUT][62] ([i915#16162])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-snb6/igt@i915_pm_rps@reset.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-snb1/igt@i915_pm_rps@reset.html
* igt@i915_pm_sseu@full-enable:
- shard-tglu: NOTRUN -> [SKIP][63] ([i915#4387])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@query-topology-unsupported:
- shard-dg2: NOTRUN -> [SKIP][64] ([i915#16079])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@i915_query@query-topology-unsupported.html
* igt@i915_query@test-query-geometry-subslices:
- shard-rkl: NOTRUN -> [SKIP][65] ([i915#5723])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@i915_query@test-query-geometry-subslices.html
- shard-dg1: NOTRUN -> [SKIP][66] ([i915#5723])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@i915_query@test-query-geometry-subslices.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-glk10: NOTRUN -> [INCOMPLETE][67] ([i915#16182] / [i915#4817])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk10/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@i915_suspend@fence-restore-untiled:
- shard-rkl: [PASS][68] -> [INCOMPLETE][69] ([i915#4817])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@i915_suspend@fence-restore-untiled.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@i915_suspend@fence-restore-untiled.html
* igt@intel_hwmon@hwmon-read:
- shard-tglu-1: NOTRUN -> [SKIP][70] ([i915#7707])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@intel_hwmon@hwmon-read.html
* igt@kms_addfb_basic@addfb25-x-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][71] ([i915#4212])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic:
- shard-dg1: [PASS][72] -> [FAIL][73] ([i915#14888]) +1 other test fail
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-19/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-19/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-glk10: NOTRUN -> [INCOMPLETE][74] ([i915#12761])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk10/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_async_flips@async-flip-suspend-resume@pipe-a-hdmi-a-2:
- shard-glk10: NOTRUN -> [INCOMPLETE][75] ([i915#12761] / [i915#14995])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk10/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-hdmi-a-2.html
* igt@kms_atomic@atomic-plane-damage:
- shard-glk10: NOTRUN -> [SKIP][76] +115 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk10/igt@kms_atomic@atomic-plane-damage.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-tglu-1: NOTRUN -> [SKIP][77] ([i915#1769] / [i915#3555])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-0:
- shard-tglu-1: NOTRUN -> [SKIP][78] ([i915#5286]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-tglu: NOTRUN -> [SKIP][79] ([i915#5286]) +6 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][80] ([i915#4538] / [i915#5286])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-rkl: NOTRUN -> [SKIP][81] ([i915#5286])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][82] ([i915#3638])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_big_fb@linear-64bpp-rotate-90.html
- shard-dg1: NOTRUN -> [SKIP][83] ([i915#3638]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
- shard-rkl: NOTRUN -> [SKIP][84] ([i915#3828])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][85] ([i915#4538] / [i915#5190]) +2 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-tglu-1: NOTRUN -> [SKIP][86] +59 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][87] ([i915#4538]) +1 other test skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#10307] / [i915#6095]) +54 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-4/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-tglu: NOTRUN -> [SKIP][89] ([i915#12313]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
- shard-rkl: NOTRUN -> [SKIP][90] ([i915#12313])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][91] ([i915#6095]) +70 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][92] ([i915#6095]) +63 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][93] ([i915#6095]) +104 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][94] ([i915#14098] / [i915#14544] / [i915#6095]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-tglu: NOTRUN -> [SKIP][95] ([i915#12805])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-rkl: [PASS][96] -> [INCOMPLETE][97] ([i915#14694] / [i915#15582])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][98] ([i915#14694] / [i915#15582])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][99] ([i915#6095]) +3 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
- shard-glk: NOTRUN -> [INCOMPLETE][100] ([i915#15582]) +1 other test incomplete
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-dg1: NOTRUN -> [SKIP][101] ([i915#12313])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][102] ([i915#12313]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#14098] / [i915#6095]) +33 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-tglu-1: NOTRUN -> [SKIP][104] ([i915#6095]) +24 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][105] ([i915#14544] / [i915#6095]) +3 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_cdclk@mode-transition:
- shard-tglu-1: NOTRUN -> [SKIP][106] ([i915#3742])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][107] ([i915#13781]) +4 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html
* igt@kms_cdclk@plane-scaling:
- shard-tglu: NOTRUN -> [SKIP][108] ([i915#3742])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4:
- shard-tglu-1: NOTRUN -> [SKIP][109] ([i915#16471])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html
* igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
- shard-tglu: NOTRUN -> [SKIP][110] ([i915#16471]) +1 other test skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
- shard-dg2: NOTRUN -> [SKIP][111] ([i915#11151] / [i915#7828]) +2 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_edid@hdmi-mode-timings:
- shard-rkl: NOTRUN -> [SKIP][112] ([i915#11151] / [i915#7828])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_chamelium_edid@hdmi-mode-timings.html
* igt@kms_chamelium_frames@dp-frame-dump:
- shard-tglu-1: NOTRUN -> [SKIP][113] ([i915#11151] / [i915#7828]) +2 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_chamelium_frames@dp-frame-dump.html
* igt@kms_chamelium_hpd@dp-hpd-storm-disable:
- shard-dg1: NOTRUN -> [SKIP][114] ([i915#11151] / [i915#7828]) +2 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
- shard-tglu: NOTRUN -> [SKIP][115] ([i915#11151] / [i915#7828]) +9 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
* igt@kms_color@deep-color:
- shard-tglu: NOTRUN -> [SKIP][116] ([i915#3555] / [i915#9979])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_color@deep-color.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglu: NOTRUN -> [SKIP][117] ([i915#15330] / [i915#3116] / [i915#3299])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_content_protection@dp-mst-lic-type-0.html
- shard-dg1: NOTRUN -> [SKIP][118] ([i915#15330] / [i915#3299])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
- shard-tglu: NOTRUN -> [SKIP][119] ([i915#15330])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-tglu-1: NOTRUN -> [SKIP][120] ([i915#15330] / [i915#3116] / [i915#3299])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#15330])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
- shard-tglu-1: NOTRUN -> [SKIP][122] ([i915#15330]) +1 other test skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_content_protection@legacy-hdcp14:
- shard-dg2: NOTRUN -> [SKIP][123] ([i915#15865])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_content_protection@legacy-hdcp14.html
- shard-tglu-1: NOTRUN -> [SKIP][124] ([i915#15865])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_content_protection@legacy-hdcp14.html
* igt@kms_content_protection@srm:
- shard-tglu: NOTRUN -> [SKIP][125] ([i915#15865]) +2 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_content_protection@srm.html
* igt@kms_content_protection@type1:
- shard-rkl: NOTRUN -> [SKIP][126] ([i915#15865])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_content_protection@type1.html
- shard-dg1: NOTRUN -> [SKIP][127] ([i915#15865])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-onscreen-256x85:
- shard-tglu: NOTRUN -> [FAIL][128] ([i915#13566]) +5 other tests fail
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_cursor_crc@cursor-onscreen-256x85.html
* igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [FAIL][129] ([i915#13566]) +1 other test fail
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-rkl: NOTRUN -> [SKIP][130] ([i915#3555]) +1 other test skip
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-tglu: NOTRUN -> [SKIP][131] ([i915#3555]) +3 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#13049])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
- shard-tglu-1: NOTRUN -> [SKIP][133] ([i915#13049])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][134] ([i915#13566]) +1 other test fail
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-tglu: NOTRUN -> [SKIP][135] ([i915#4103]) +2 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#13046] / [i915#5354]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk11: NOTRUN -> [FAIL][137] ([i915#15768])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-rkl: NOTRUN -> [SKIP][138] ([i915#9723])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
- shard-dg1: NOTRUN -> [SKIP][139] ([i915#9723])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_display_modes@extended-mode-basic:
- shard-tglu: NOTRUN -> [SKIP][140] ([i915#13691])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-dg1: NOTRUN -> [SKIP][141] ([i915#3555])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
- shard-tglu: NOTRUN -> [SKIP][142] ([i915#1769] / [i915#3555] / [i915#3804])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][143] ([i915#3804])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dp_aux_dev@basic:
- shard-tglu: NOTRUN -> [SKIP][144] ([i915#1257])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_dp_aux_dev@basic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-tglu: NOTRUN -> [SKIP][145] ([i915#13749])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-tglu: NOTRUN -> [SKIP][146] ([i915#16867])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
- shard-glk11: NOTRUN -> [SKIP][147] +205 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html
* igt@kms_dsc@dsc-with-bpc-bigjoiner:
- shard-tglu: NOTRUN -> [SKIP][148] ([i915#16361]) +2 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_dsc@dsc-with-bpc-bigjoiner.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-rkl: NOTRUN -> [SKIP][149] ([i915#16361])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-formats-ultrajoiner:
- shard-tglu-1: NOTRUN -> [SKIP][150] ([i915#16361]) +1 other test skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_dsc@dsc-with-formats-ultrajoiner.html
* igt@kms_dsc@dsc-with-output-formats-bigjoiner:
- shard-dg1: NOTRUN -> [SKIP][151] ([i915#16361]) +1 other test skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_dsc@dsc-with-output-formats-bigjoiner.html
* igt@kms_dsc@dsc-with-output-formats-ultrajoiner:
- shard-dg2: NOTRUN -> [SKIP][152] ([i915#16361]) +1 other test skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_dsc@dsc-with-output-formats-ultrajoiner.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: NOTRUN -> [SKIP][153] ([i915#16680])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_fbcon_fbt@psr-suspend.html
- shard-dg1: NOTRUN -> [SKIP][154] ([i915#16680])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@chamelium:
- shard-tglu: NOTRUN -> [SKIP][155] ([i915#2065])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-2x:
- shard-tglu: NOTRUN -> [SKIP][156] ([i915#16081])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@dsc:
- shard-dg2: NOTRUN -> [SKIP][157] ([i915#16600])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_feature_discovery@dsc.html
* igt@kms_feature_discovery@psr2:
- shard-dg1: NOTRUN -> [SKIP][158] ([i915#658])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_feature_discovery@psr2.html
- shard-tglu: NOTRUN -> [SKIP][159] ([i915#658])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_feature_discovery@psr2.html
* igt@kms_feature_discovery@vrr:
- shard-tglu: NOTRUN -> [SKIP][160] ([i915#16600]) +1 other test skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_feature_discovery@vrr.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-tglu-1: NOTRUN -> [SKIP][161] ([i915#3637] / [i915#9934]) +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-tglu: NOTRUN -> [SKIP][162] ([i915#3637] / [i915#9934]) +5 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-dg2: NOTRUN -> [SKIP][163] ([i915#9934]) +4 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-rkl: NOTRUN -> [SKIP][164] ([i915#9934])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_flip@2x-wf_vblank-ts-check.html
- shard-dg1: NOTRUN -> [SKIP][165] ([i915#9934]) +3 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@flip-vs-suspend:
- shard-rkl: [PASS][166] -> [INCOMPLETE][167] ([i915#16276] / [i915#6113]) +1 other test incomplete
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-4/igt@kms_flip@flip-vs-suspend.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-3/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-glk: NOTRUN -> [INCOMPLETE][168] ([i915#12314] / [i915#12745] / [i915#4839] / [i915#6113])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk5/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
- shard-glk: NOTRUN -> [INCOMPLETE][169] ([i915#12314] / [i915#12745])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk5/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-dg1: NOTRUN -> [SKIP][170] ([i915#15643])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
- shard-tglu: NOTRUN -> [SKIP][171] ([i915#15643]) +4 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-rkl: NOTRUN -> [SKIP][172] ([i915#15643]) +1 other test skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile:
- shard-tglu-1: NOTRUN -> [SKIP][173] ([i915#15643]) +2 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][174] +34 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][175] ([i915#1825])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][176] ([i915#15991] / [i915#5354]) +7 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-rkl: [PASS][177] -> [INCOMPLETE][178] ([i915#10056])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-8/igt@kms_frontbuffer_tracking@fbc-suspend.html
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][179] ([i915#15990]) +7 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][180] ([i915#15990]) +6 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_frontbuffer_tracking@fbchdr-1p-offscreen-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-shrfb-plflip-blt:
- shard-tglu: NOTRUN -> [SKIP][181] +157 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-indfb-scaledprimary:
- shard-dg1: NOTRUN -> [SKIP][182] ([i915#15989]) +8 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_frontbuffer_tracking@fbchdr-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-render:
- shard-rkl: [PASS][183] -> [SKIP][184] ([i915#15989]) +8 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-render.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-tiling-4:
- shard-tglu: NOTRUN -> [SKIP][185] ([i915#5439]) +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][186] ([i915#15990] / [i915#8708]) +2 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][187] ([i915#15990] / [i915#8708]) +3 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-indfb-fliptrack-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][188] ([i915#15102]) +62 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-mmap-cpu:
- shard-rkl: NOTRUN -> [SKIP][189] ([i915#15102]) +9 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt:
- shard-tglu-1: NOTRUN -> [SKIP][190] ([i915#15102]) +19 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-linear:
- shard-dg2: NOTRUN -> [SKIP][191] ([i915#15102]) +11 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-linear.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][192] ([i915#15989]) +30 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-pwrite:
- shard-glk: [PASS][193] -> [SKIP][194] +3 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-glk8/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-pwrite.html
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk2/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][195] ([i915#15989]) +5 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
- shard-tglu-1: NOTRUN -> [SKIP][196] ([i915#15989]) +8 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-pwrite:
- shard-rkl: NOTRUN -> [SKIP][197] ([i915#15989]) +7 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-pwrite.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-dg1: NOTRUN -> [SKIP][198] ([i915#9766])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
- shard-tglu: NOTRUN -> [SKIP][199] ([i915#9766])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][200] +32 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move:
- shard-dg1: NOTRUN -> [SKIP][201] ([i915#15102]) +14 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][202] ([i915#15991]) +10 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2: NOTRUN -> [SKIP][203] ([i915#16518] / [i915#3555] / [i915#8228])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_hdr@bpc-switch-suspend.html
- shard-tglu-1: NOTRUN -> [SKIP][204] ([i915#3555] / [i915#8228])
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@static-toggle-dpms:
- shard-dg1: NOTRUN -> [SKIP][205] ([i915#3555] / [i915#8228])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_hdr@static-toggle-suspend:
- shard-tglu: NOTRUN -> [SKIP][206] ([i915#3555] / [i915#8228]) +1 other test skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_joiner@basic-big-joiner:
- shard-dg2: NOTRUN -> [SKIP][207] ([i915#15460])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][208] ([i915#15458]) +1 other test skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-rkl: NOTRUN -> [SKIP][209] ([i915#15458])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
- shard-dg1: NOTRUN -> [SKIP][210] ([i915#15458])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-tglu: NOTRUN -> [SKIP][211] ([i915#16451])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-dg2: NOTRUN -> [SKIP][212] ([i915#15815])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-tglu-1: NOTRUN -> [SKIP][213] ([i915#14712])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane@pixel-format-x-tiled-modifier:
- shard-tglu: [PASS][214] -> [ABORT][215] ([i915#16866])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-tglu-2/igt@kms_plane@pixel-format-x-tiled-modifier.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_plane@pixel-format-x-tiled-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier:
- shard-dg2: NOTRUN -> [SKIP][216] ([i915#15709])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
- shard-tglu: NOTRUN -> [SKIP][217] ([i915#15709]) +4 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-yf-tiled-modifier:
- shard-dg1: NOTRUN -> [SKIP][218] ([i915#15709])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_plane@pixel-format-yf-tiled-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
- shard-tglu-1: NOTRUN -> [SKIP][219] ([i915#15709]) +1 other test skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html
* igt@kms_plane_alpha_blend@alpha-opaque-fb:
- shard-glk11: NOTRUN -> [FAIL][220] ([i915#10647] / [i915#12169])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@kms_plane_alpha_blend@alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1:
- shard-glk11: NOTRUN -> [FAIL][221] ([i915#10647]) +1 other test fail
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-tglu: NOTRUN -> [SKIP][222] ([i915#13958]) +1 other test skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-rkl: NOTRUN -> [SKIP][223] ([i915#13958])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_multiple@tiling-4:
- shard-tglu-1: NOTRUN -> [SKIP][224] ([i915#14259])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_plane_multiple@tiling-4.html
* igt@kms_plane_multiple@tiling-yf:
- shard-tglu: NOTRUN -> [SKIP][225] ([i915#14259])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_pm_backlight@basic-brightness:
- shard-rkl: NOTRUN -> [SKIP][226] ([i915#12343] / [i915#5354]) +1 other test skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_pm_backlight@basic-brightness.html
- shard-dg1: NOTRUN -> [SKIP][227] ([i915#12343] / [i915#5354])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@fade:
- shard-tglu: NOTRUN -> [SKIP][228] ([i915#12343] / [i915#9812])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][229] ([i915#12343] / [i915#9812])
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-pageflip-negative:
- shard-dg2: NOTRUN -> [SKIP][230] ([i915#9685])
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_pm_dc@dc5-pageflip-negative.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-tglu-1: NOTRUN -> [SKIP][231] ([i915#3828])
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc9-dpms:
- shard-tglu: NOTRUN -> [SKIP][232] ([i915#15739])
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-tglu: NOTRUN -> [SKIP][233] ([i915#3828])
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-dg1: NOTRUN -> [SKIP][234] ([i915#8430])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_pm_lpsp@screens-disabled.html
- shard-tglu: NOTRUN -> [SKIP][235] ([i915#8430])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-rkl: [PASS][236] -> [SKIP][237] ([i915#15073])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-7/igt@kms_pm_rpm@dpms-non-lpsp.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-2/igt@kms_pm_rpm@dpms-non-lpsp.html
- shard-dg1: [PASS][238] -> [SKIP][239] ([i915#15073])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-17/igt@kms_pm_rpm@dpms-non-lpsp.html
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-tglu: NOTRUN -> [SKIP][240] ([i915#15073])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-7/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][241] -> [SKIP][242] ([i915#15073]) +1 other test skip
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-tglu-1: NOTRUN -> [SKIP][243] ([i915#15073])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@package-g7:
- shard-tglu-1: NOTRUN -> [SKIP][244] ([i915#15403])
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_pm_rpm@package-g7.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-glk: NOTRUN -> [INCOMPLETE][245] ([i915#10553])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk2/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-tglu: NOTRUN -> [SKIP][246] ([i915#11520]) +12 other tests skip
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
- shard-dg2: NOTRUN -> [SKIP][247] ([i915#11520]) +2 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-glk11: NOTRUN -> [SKIP][248] ([i915#11520]) +5 other tests skip
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
- shard-glk10: NOTRUN -> [SKIP][249] ([i915#11520]) +1 other test skip
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk10/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-glk: NOTRUN -> [SKIP][250] ([i915#11520]) +2 other tests skip
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk3/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
- shard-rkl: NOTRUN -> [SKIP][251] ([i915#11520])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-dg1: NOTRUN -> [SKIP][252] ([i915#11520]) +2 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-18/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][253] ([i915#11520]) +4 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-p010:
- shard-rkl: NOTRUN -> [SKIP][254] ([i915#9683])
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_psr2_su@page_flip-p010.html
- shard-dg1: NOTRUN -> [SKIP][255] ([i915#9683])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-pr-sprite-render:
- shard-tglu-1: NOTRUN -> [SKIP][256] ([i915#9732]) +9 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_psr@fbc-pr-sprite-render.html
* igt@kms_psr@fbc-psr-basic:
- shard-dg2: NOTRUN -> [SKIP][257] ([i915#1072] / [i915#9732]) +6 other tests skip
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_psr@fbc-psr-basic.html
* igt@kms_psr@fbc-psr-no-drrs:
- shard-tglu: NOTRUN -> [SKIP][258] ([i915#9732]) +26 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_psr@fbc-psr-no-drrs.html
* igt@kms_psr@fbc-psr-primary-blt:
- shard-rkl: NOTRUN -> [SKIP][259] ([i915#1072] / [i915#9732]) +4 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_psr@fbc-psr-primary-blt.html
* igt@kms_psr@pr-no-drrs:
- shard-glk: NOTRUN -> [SKIP][260] +247 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk5/igt@kms_psr@pr-no-drrs.html
* igt@kms_psr@psr2-sprite-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][261] ([i915#1072] / [i915#9732]) +9 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_psr@psr2-sprite-mmap-gtt.html
* igt@kms_rotation_crc@multiplane-rotation:
- shard-glk11: NOTRUN -> [INCOMPLETE][262] ([i915#15492] / [i915#16184])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk11/igt@kms_rotation_crc@multiplane-rotation.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2: NOTRUN -> [SKIP][263] ([i915#12755] / [i915#15867])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-rkl: NOTRUN -> [SKIP][264] ([i915#5289])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
- shard-dg1: NOTRUN -> [SKIP][265] ([i915#5289])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-tglu: NOTRUN -> [SKIP][266] ([i915#5289])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-tglu-1: NOTRUN -> [SKIP][267] ([i915#3555]) +1 other test skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-tglu-1: NOTRUN -> [SKIP][268] ([i915#8623])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-1/igt@kms_tiled_display@basic-test-pattern.html
- shard-dg2: NOTRUN -> [SKIP][269] ([i915#8623]) +1 other test skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vblank@query-forked-busy:
- shard-rkl: NOTRUN -> [ABORT][270] ([i915#16866]) +1 other test abort
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_vblank@query-forked-busy.html
* igt@kms_vblank@ts-continuation-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][271] ([i915#12276]) +1 other test incomplete
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk2/igt@kms_vblank@ts-continuation-suspend.html
- shard-rkl: [PASS][272] -> [INCOMPLETE][273] ([i915#12276])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_vblank@ts-continuation-suspend.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_vblank@ts-continuation-suspend.html
* igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][274] ([i915#12276])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html
* igt@kms_vrr@flip-basic:
- shard-dg2: NOTRUN -> [SKIP][275] ([i915#15243] / [i915#3555])
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_vrr@flip-basic.html
* igt@kms_vrr@flip-basic-fastset:
- shard-rkl: NOTRUN -> [SKIP][276] ([i915#9906]) +1 other test skip
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_vrr@flip-basic-fastset.html
- shard-dg1: NOTRUN -> [SKIP][277] ([i915#9906])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-14/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-tglu: NOTRUN -> [SKIP][278] ([i915#9906])
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@perf_pmu@busy-double-start@ccs0:
- shard-mtlp: [PASS][279] -> [FAIL][280] ([i915#4349])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-mtlp-5/igt@perf_pmu@busy-double-start@ccs0.html
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-mtlp-7/igt@perf_pmu@busy-double-start@ccs0.html
* igt@perf_pmu@module-unload:
- shard-tglu: NOTRUN -> [ABORT][281] ([i915#15778])
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6-all-gts:
- shard-tglu: NOTRUN -> [SKIP][282] ([i915#8516])
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-2/igt@perf_pmu@rc6-all-gts.html
* igt@prime_udl@share-import:
- shard-rkl: NOTRUN -> [SKIP][283] ([i915#16420])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@prime_udl@share-import.html
- shard-tglu: NOTRUN -> [SKIP][284] ([i915#16420])
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@prime_udl@share-import.html
* igt@prime_vgem@fence-read-hang:
- shard-dg2: NOTRUN -> [SKIP][285] ([i915#3708])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@prime_vgem@fence-read-hang.html
* igt@syncobj_timeline:
- shard-snb: NOTRUN -> [INCOMPLETE][286] ([i915#16545])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-snb1/igt@syncobj_timeline.html
#### Possible fixes ####
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: [INCOMPLETE][287] ([i915#13356] / [i915#16348]) -> [PASS][288]
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg2-6/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-4/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [INCOMPLETE][289] ([i915#13356] / [i915#13820]) -> [PASS][290] +1 other test pass
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg2-7/igt@i915_pm_freq_api@freq-suspend@gt0.html
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-7/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_power@sanity:
- shard-mtlp: [SKIP][291] ([i915#7984]) -> [PASS][292]
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-mtlp-4/igt@i915_power@sanity.html
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-mtlp-7/igt@i915_power@sanity.html
* igt@i915_suspend@sysfs-reader:
- shard-rkl: [INCOMPLETE][293] ([i915#4817]) -> [PASS][294]
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@i915_suspend@sysfs-reader.html
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@i915_suspend@sysfs-reader.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
- shard-glk: [FAIL][295] ([i915#14888]) -> [PASS][296] +2 other tests pass
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-glk1/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk8/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-mtlp: [FAIL][297] ([i915#15733] / [i915#5138]) -> [PASS][298]
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-mtlp-4/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-mtlp-6/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-dg1: [DMESG-WARN][299] ([i915#4423]) -> [PASS][300]
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-18/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-16/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-tglu: [FAIL][301] ([i915#15804]) -> [PASS][302]
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-tglu-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-mtlp: [FAIL][303] ([i915#13027]) -> [PASS][304] +1 other test pass
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-mtlp-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-mtlp-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-modeset-vs-hang:
- shard-tglu: [ABORT][305] ([i915#16876]) -> [PASS][306] +1 other test pass
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-tglu-10/igt@kms_flip@flip-vs-modeset-vs-hang.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_flip@flip-vs-modeset-vs-hang.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-glk: [SKIP][307] -> [PASS][308] +33 other tests pass
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-glk6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-glk8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@hdr-1p-pri-indfb-multidraw:
- shard-rkl: [SKIP][309] ([i915#15989]) -> [PASS][310] +7 other tests pass
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_frontbuffer_tracking@hdr-1p-pri-indfb-multidraw.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_frontbuffer_tracking@hdr-1p-pri-indfb-multidraw.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- shard-rkl: [INCOMPLETE][311] ([i915#12756] / [i915#13476]) -> [PASS][312]
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_pipe_crc_basic@suspend-read-crc.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-rkl: [SKIP][313] ([i915#6953]) -> [PASS][314]
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_plane_scaling@intel-max-src-size.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: [SKIP][315] ([i915#14544] / [i915#15073]) -> [PASS][316]
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_pm_rpm@dpms-lpsp.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-dg2: [SKIP][317] ([i915#15073]) -> [PASS][318]
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg2-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-rkl: [SKIP][319] ([i915#15073]) -> [PASS][320] +2 other tests pass
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@system-suspend-idle:
- shard-dg2: [INCOMPLETE][321] ([i915#14419]) -> [PASS][322]
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg2-6/igt@kms_pm_rpm@system-suspend-idle.html
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg2-8/igt@kms_pm_rpm@system-suspend-idle.html
#### Warnings ####
* igt@gem_basic@multigpu-create-close:
- shard-rkl: [SKIP][323] ([i915#7697]) -> [SKIP][324] ([i915#14544] / [i915#7697])
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@gem_basic@multigpu-create-close.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@gem_basic@multigpu-create-close.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-rkl: [SKIP][325] ([i915#14544] / [i915#6335]) -> [SKIP][326] ([i915#6335])
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gem_create@create-ext-cpu-access-sanity-check.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_eio@kms:
- shard-rkl: [ABORT][327] ([i915#16837] / [i915#16931]) -> [ABORT][328] ([i915#16837])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@gem_eio@kms.html
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-3/igt@gem_eio@kms.html
- shard-dg1: [ABORT][329] ([i915#16837]) -> [ABORT][330] ([i915#16837] / [i915#16931])
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-16/igt@gem_eio@kms.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-17/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-rkl: [SKIP][331] ([i915#14544] / [i915#4525]) -> [SKIP][332] ([i915#4525])
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gem_exec_balancer@parallel-ordering.html
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- shard-rkl: [SKIP][333] ([i915#14544] / [i915#3281]) -> [SKIP][334] ([i915#3281]) +5 other tests skip
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_exec_reloc@basic-wc-cpu-active:
- shard-rkl: [SKIP][335] ([i915#3281]) -> [SKIP][336] ([i915#14544] / [i915#3281]) +2 other tests skip
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@gem_exec_reloc@basic-wc-cpu-active.html
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@gem_exec_reloc@basic-wc-cpu-active.html
* igt@gem_lmem_swapping@basic:
- shard-rkl: [SKIP][337] ([i915#4613]) -> [SKIP][338] ([i915#14544] / [i915#4613])
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@gem_lmem_swapping@basic.html
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@random:
- shard-rkl: [SKIP][339] ([i915#14544] / [i915#4613]) -> [SKIP][340] ([i915#4613]) +1 other test skip
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gem_lmem_swapping@random.html
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@gem_lmem_swapping@random.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-rkl: [SKIP][341] ([i915#14544] / [i915#3282]) -> [SKIP][342] ([i915#3282]) +4 other tests skip
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads.html
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_readwrite@beyond-eob:
- shard-rkl: [SKIP][343] ([i915#3282]) -> [SKIP][344] ([i915#14544] / [i915#3282]) +2 other tests skip
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@gem_readwrite@beyond-eob.html
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@gem_readwrite@beyond-eob.html
* igt@gem_tiled_pread_basic@basic:
- shard-rkl: [SKIP][345] ([i915#15656]) -> [SKIP][346] ([i915#14544] / [i915#15656])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@gem_tiled_pread_basic@basic.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@gem_tiled_pread_basic@basic.html
* igt@gem_userptr_blits@access-control:
- shard-rkl: [SKIP][347] ([i915#3297]) -> [SKIP][348] ([i915#14544] / [i915#3297])
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@gem_userptr_blits@access-control.html
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@gem_userptr_blits@access-control.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-rkl: [SKIP][349] ([i915#14544] / [i915#3297]) -> [SKIP][350] ([i915#3297])
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gem_userptr_blits@coherency-unsync.html
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@gem_userptr_blits@coherency-unsync.html
* igt@gpu_buddy@gpu_buddy:
- shard-rkl: [SKIP][351] ([i915#14544] / [i915#15678]) -> [SKIP][352] ([i915#15678])
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@gpu_buddy@gpu_buddy.html
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@gpu_buddy@gpu_buddy.html
* igt@i915_module_load@fault-injection@__uc_init:
- shard-rkl: [SKIP][353] ([i915#14544] / [i915#15479]) -> [SKIP][354] ([i915#15479]) +4 other tests skip
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@i915_module_load@fault-injection@__uc_init.html
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@i915_module_load@fault-injection@__uc_init.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-rkl: [SKIP][355] ([i915#14544] / [i915#9531]) -> [SKIP][356] ([i915#9531])
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1:
- shard-tglu: [ABORT][357] ([i915#16837] / [i915#16866] / [i915#16881]) -> [ABORT][358] ([i915#16837]) +1 other test abort
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-tglu-10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-90:
- shard-rkl: [SKIP][359] ([i915#14544] / [i915#5286]) -> [SKIP][360] ([i915#5286]) +1 other test skip
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-rkl: [SKIP][361] ([i915#5286]) -> [SKIP][362] ([i915#14544] / [i915#5286])
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-rkl: [SKIP][363] ([i915#14544] / [i915#3638]) -> [SKIP][364] ([i915#3638])
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-rkl: [SKIP][365] -> [SKIP][366] ([i915#14544]) +28 other tests skip
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-rkl: [SKIP][367] ([i915#12805]) -> [SKIP][368] ([i915#12805] / [i915#14544])
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-rkl: [SKIP][369] ([i915#12805] / [i915#14544]) -> [SKIP][370] ([i915#12805])
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-rkl: [SKIP][371] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][372] ([i915#14098] / [i915#6095]) +6 other tests skip
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs:
- shard-rkl: [SKIP][373] ([i915#14098] / [i915#6095]) -> [SKIP][374] ([i915#14098] / [i915#14544] / [i915#6095]) +1 other test skip
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html
* igt@kms_chamelium_audio@hdmi-audio:
- shard-rkl: [SKIP][375] ([i915#11151] / [i915#7828]) -> [SKIP][376] ([i915#11151] / [i915#14544] / [i915#7828]) +2 other tests skip
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_chamelium_audio@hdmi-audio.html
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_chamelium_audio@hdmi-audio.html
- shard-dg1: [SKIP][377] ([i915#11151] / [i915#7828]) -> [SKIP][378] ([i915#11151] / [i915#4423] / [i915#7828])
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-15/igt@kms_chamelium_audio@hdmi-audio.html
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-12/igt@kms_chamelium_audio@hdmi-audio.html
* igt@kms_chamelium_frames@hdmi-crc-multiple:
- shard-rkl: [SKIP][379] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][380] ([i915#11151] / [i915#7828]) +2 other tests skip
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-multiple.html
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_chamelium_frames@hdmi-crc-multiple.html
* igt@kms_content_protection@legacy:
- shard-rkl: [SKIP][381] ([i915#15865]) -> [SKIP][382] ([i915#14544] / [i915#15865]) +1 other test skip
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_content_protection@legacy.html
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@suspend-resume:
- shard-rkl: [SKIP][383] ([i915#14544] / [i915#15865]) -> [SKIP][384] ([i915#15865])
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_content_protection@suspend-resume.html
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_content_protection@suspend-resume.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-rkl: [SKIP][385] ([i915#3555]) -> [SKIP][386] ([i915#14544] / [i915#3555])
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_cursor_crc@cursor-random-max-size.html
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-rkl: [SKIP][387] ([i915#14544]) -> [SKIP][388] +42 other tests skip
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-rkl: [SKIP][389] ([i915#9067]) -> [SKIP][390] ([i915#14544] / [i915#9067])
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
* igt@kms_dp_aux_dev@basic:
- shard-rkl: [SKIP][391] ([i915#1257] / [i915#14544]) -> [SKIP][392] ([i915#1257])
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_dp_aux_dev@basic.html
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_dp_aux_dev@basic.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-rkl: [SKIP][393] ([i915#13748]) -> [SKIP][394] ([i915#13748] / [i915#14544])
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_dp_link_training@uhbr-mst.html
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-rkl: [SKIP][395] ([i915#16867]) -> [SKIP][396] ([i915#14544] / [i915#16867])
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_dp_linktrain_fallback@dp-fallback.html
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dsc@dsc-basic:
- shard-rkl: [SKIP][397] ([i915#14544] / [i915#16361]) -> [SKIP][398] ([i915#16361]) +2 other tests skip
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_dsc@dsc-basic.html
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-with-bpc-formats-bigjoiner:
- shard-rkl: [SKIP][399] ([i915#16361]) -> [SKIP][400] ([i915#14544] / [i915#16361])
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-4/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html
* igt@kms_feature_discovery@vrr:
- shard-rkl: [SKIP][401] ([i915#14544] / [i915#16600]) -> [SKIP][402] ([i915#16600])
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_feature_discovery@vrr.html
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_feature_discovery@vrr.html
* igt@kms_flip@2x-plain-flip:
- shard-rkl: [SKIP][403] ([i915#14544] / [i915#9934]) -> [SKIP][404] ([i915#9934]) +2 other tests skip
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_flip@2x-plain-flip.html
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
- shard-rkl: [SKIP][405] ([i915#15643]) -> [SKIP][406] ([i915#14544] / [i915#15643])
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-rkl: [SKIP][407] ([i915#14544] / [i915#15643]) -> [SKIP][408] ([i915#15643]) +1 other test skip
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][409] ([i915#1825]) -> [SKIP][410] ([i915#14544] / [i915#1825]) +1 other test skip
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
- shard-dg1: [SKIP][411] ([i915#15990] / [i915#8708]) -> [SKIP][412] ([i915#15990] / [i915#4423] / [i915#8708])
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-12/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-dg1: [SKIP][413] -> [SKIP][414] ([i915#4423])
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-12/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-rkl: [SKIP][415] ([i915#5439]) -> [SKIP][416] ([i915#14544] / [i915#5439])
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte:
- shard-rkl: [SKIP][417] ([i915#15102]) -> [SKIP][418] ([i915#14544] / [i915#15102]) +14 other tests skip
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte.html
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-dg1: [SKIP][419] ([i915#15989]) -> [SKIP][420] ([i915#15989] / [i915#4423])
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-dg1-15/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-pwrite.html
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-dg1-12/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-rkl: [SKIP][421] ([i915#14544] / [i915#15102]) -> [SKIP][422] ([i915#15102]) +20 other tests skip
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-rkl: [SKIP][423] ([i915#14544] / [i915#1825]) -> [SKIP][424] ([i915#1825]) +2 other tests skip
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc.html
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_hdr@brightness-with-hdr:
- shard-rkl: [SKIP][425] ([i915#1187] / [i915#12713] / [i915#16644]) -> [SKIP][426] ([i915#12713] / [i915#16644])
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-3/igt@kms_hdr@brightness-with-hdr.html
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-4/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-rkl: [SKIP][427] ([i915#15460]) -> [SKIP][428] ([i915#14544] / [i915#15460])
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_joiner@invalid-modeset-big-joiner.html
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_plane@pixel-format-4-tiled-modifier:
- shard-rkl: [SKIP][429] ([i915#15709]) -> [SKIP][430] ([i915#14544] / [i915#15709])
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-modifier.html
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-modifier.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
- shard-rkl: [SKIP][431] ([i915#14544] / [i915#15709]) -> [SKIP][432] ([i915#15709]) +1 other test skip
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7:
- shard-tglu: [SKIP][433] ([i915#16386]) -> [ABORT][434] ([i915#16866])
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-tglu-2/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7.html
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-tglu-10/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7.html
* igt@kms_plane_lowres@tiling-yf:
- shard-rkl: [SKIP][435] ([i915#14544] / [i915#3555]) -> [SKIP][436] ([i915#3555]) +1 other test skip
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_plane_lowres@tiling-yf.html
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b:
- shard-rkl: [SKIP][437] ([i915#14544] / [i915#15329]) -> [SKIP][438] ([i915#15329]) +3 other tests skip
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b.html
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b.html
* igt@kms_pm_dc@dc5-psr:
- shard-rkl: [SKIP][439] ([i915#15948]) -> [SKIP][440] ([i915#14544] / [i915#15948])
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_pm_dc@dc5-psr.html
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_pm_dc@dc5-psr.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-rkl: [SKIP][441] ([i915#11520] / [i915#14544]) -> [SKIP][442] ([i915#11520]) +3 other tests skip
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
- shard-rkl: [SKIP][443] ([i915#11520]) -> [SKIP][444] ([i915#11520] / [i915#14544])
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr@fbc-psr-dpms:
- shard-rkl: [SKIP][445] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][446] ([i915#1072] / [i915#9732]) +7 other tests skip
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_psr@fbc-psr-dpms.html
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_psr@fbc-psr-dpms.html
* igt@kms_psr@psr-cursor-mmap-cpu:
- shard-rkl: [SKIP][447] ([i915#1072] / [i915#9732]) -> [SKIP][448] ([i915#1072] / [i915#14544] / [i915#9732]) +4 other tests skip
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@kms_psr@psr-cursor-mmap-cpu.html
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_psr@psr-cursor-mmap-cpu.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-rkl: [SKIP][449] ([i915#14544] / [i915#15949]) -> [SKIP][450] ([i915#15949])
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[450]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_vrr@flip-suspend:
- shard-rkl: [SKIP][451] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][452] ([i915#15243] / [i915#3555])
[451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-6/igt@kms_vrr@flip-suspend.html
[452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-8/igt@kms_vrr@flip-suspend.html
* igt@kms_vrr@negative-basic:
- shard-rkl: [SKIP][453] ([i915#3555] / [i915#9906]) -> [SKIP][454] ([i915#14544] / [i915#3555] / [i915#9906])
[453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-5/igt@kms_vrr@negative-basic.html
[454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@kms_vrr@negative-basic.html
* igt@perf@mi-rpc:
- shard-rkl: [SKIP][455] ([i915#2434]) -> [SKIP][456] ([i915#14544] / [i915#2434])
[455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19094/shard-rkl-2/igt@perf@mi-rpc.html
[456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/shard-rkl-6/igt@perf@mi-rpc.html
### Piglit changes ###
#### Issues hit ####
* igt@i915_selftest@live@reset (NEW):
- pig-kbl-iris: NOTRUN -> [{DMESG-WARN}][457] ([i915#13735]) +29 other tests {dmesg-warn}
[457]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/pig-kbl-iris/igt@i915_selftest@live@reset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
[i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11814
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
[i915#12193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12193
[i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
[i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
[i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
[i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
[i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781
[i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
[i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14586]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14586
[i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
[i915#14995]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14995
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
[i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
[i915#15492]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15492
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
[i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
[i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
[i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
[i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739
[i915#15768]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15768
[i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
[i915#15804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15804
[i915#15815]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15815
[i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
[i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
[i915#15948]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15948
[i915#15949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15949
[i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
[i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
[i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
[i915#16079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16079
[i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081
[i915#16162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16162
[i915#16182]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16182
[i915#16184]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16184
[i915#16276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16276
[i915#16348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16348
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16386
[i915#16420]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16420
[i915#16451]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16451
[i915#16471]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16471
[i915#16518]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16518
[i915#16545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16545
[i915#16600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16600
[i915#16644]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16644
[i915#16680]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16680
[i915#16837]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16837
[i915#16866]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16866
[i915#16867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16867
[i915#16876]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16876
[i915#16881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16881
[i915#16931]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16931
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
[i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
[i915#9979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9979
Build changes
-------------
* Linux: CI_DRM_19094 -> Patchwork_173452v7
CI-20190529: 20190529
CI_DRM_19094: 496ff8213a2d2e1e5b1c8efe8b55e1dcdc3e3f8f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9084: 9084
Patchwork_173452v7: 496ff8213a2d2e1e5b1c8efe8b55e1dcdc3e3f8f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v7/index.html
[-- Attachment #2: Type: text/html, Size: 162439 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v6 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-07 4:44 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 5:04 ` sashiko-bot
@ 2026-09-09 3:35 ` Xiao Lu
2026-09-09 3:35 ` [PATCH v6 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-09 4:10 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
1 sibling, 2 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-09 3:35 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
drm_dp_mst_is_virtual_dpcd() checks if a branch port qualifies as a
virtual DPCD device by looking for a downstream port with
Peer_Device_Type=3 (DP_PEER_DEVICE_SST_SINK).
Some PCON devices advertise their downstream HDMI sink port using
Peer_Device_Type=4 (DP_PEER_DEVICE_DP_LEGACY_CONV) with a non-zero
DPCD_Revision in the link address reply, indicating a virtual DPCD is
present (VESA SCR Option 2). The current check misses this case, so
passthrough_aux is never set and DSC passthrough modes are rejected.
Accept DP_PEER_DEVICE_DP_LEGACY_CONV as a valid downstream peer type
in the DP-to-DP branch so these PCON topologies are correctly
identified.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 4de36fda0..7d1128bcd 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -6045,7 +6045,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
port->mstb &&
port->mstb->num_ports == 2) {
list_for_each_entry(downstream_port, &port->mstb->ports, next) {
- if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
+ if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
+ downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
!downstream_port->input) {
mutex_unlock(&port->mgr->lock);
return true;
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v6 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 3:35 ` [PATCH v6 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
@ 2026-09-09 3:35 ` Xiao Lu
2026-09-09 3:47 ` sashiko-bot
2026-09-09 4:10 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
1 sibling, 1 reply; 30+ messages in thread
From: Xiao Lu @ 2026-09-09 3:35 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
combined with the downstream HDMI 2.1 sink's DSC 1.2 support from
EDID HF-VSDB. Cache the result in connector->dp.pcon_dsc_passthrough
(same lifecycle as fec_capability and dsc_dpcd).
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC parameters (slice count, bpc limits) from the downstream
HDMI sink's EDID DSC capabilities rather than from the PCON encoder
DPCD (all-zero for passthrough-only PCONs).
- Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults (version 1.2, convert_rgb per output format,
line_buf_depth=13, block_pred=true) instead of the PCON dsc_dpcd
fields which reflect passthrough device constraints, not the actual
HDMI sink decompressor.
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap from zeroing pipe.max_bpp.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path is preserved; the PCON
case is handled by redirecting aux to intel_dp->aux (SST) or
connector->mst.port->aux (MST via REMOTE_DPCD_WRITE) when
pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress.
- Add passthrough branch in intel_dp_mode_valid_with_dsc() to use
EDID max_slices capped by PCON dsc_dpcd slice capability.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected directly (SST)
and via PS8650 MST hub to a Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2, max 16 slices, 400 MHz/slice). At 4K@240Hz DSC compression is
required; driver now writes 0x160=0x02 explicitly and DSC parameters are
correctly derived from the HDMI sink EDID. Depends on the preceding
drm/dp/mst patch for MST topology support.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v6: Add intel_dp_pcon_set_dsc_passthrough_cap() call in
mst_connector_get_ddc_modes() after EDID parsing so that MST
connectors also have pcon_dsc_passthrough evaluated using the
correct display_info.hdmi.dsc_cap values. This ensures that
intel_dp_sink_set_dsc_decompression() is correctly bypassed for
PCON passthrough in MST topologies, preventing 0x160 bit0 from
overwriting bit1 after the passthrough enable.
Fix checkpatch warnings: break long lines in the non-passthrough
branch of intel_dp_dsc_compute_params() and fix parenthesis
alignment in drm_dbg_kms() call.
v5: Split into two patches: the drm/dp/mst fix for recognizing
DP-to-HDMI PCON as virtual DPCD is now patch 1/2.
Inline PCON passthrough DSC parameter overrides into
intel_dp_dsc_compute_params() instead of a separate function;
fix convert_rgb to depend on output_format instead of being
unconditionally true.
Remove intel_dp_pcon_set_dsc_passthrough_cap() call from
intel_dp_get_dsc_sink_cap() - keep only the intel_dp_set_edid()
call so MST streams do not incorrectly update the root connector.
Pass INT_MAX as src_max_slice_width to intel_hdmi_dsc_get_num_slices()
so only the HDMI spec 2720px limit applies.
Add hdisplay divisibility check for the computed slice count.
Add PCON passthrough branch in intel_dp_mode_valid_with_dsc() using
EDID max_slices capped by PCON dsc_dpcd slice capability.
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
Fix intel_hdmi_dsc_get_num_slices() call to pass output_format as
the 2nd argument matching the updated 6-parameter signature.
Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults instead of PCON dsc_dpcd fields.
Skip align_max_sink_dsc_input_bpp() for PCON passthrough.
Fix intel_dp_dsc_compute_config() to use correct connector context
instead of intel_dp->attached_connector for MST streams.
v3: Restrict PCON DSC passthrough to SST direct connections only.
In MST topologies the PCON is connected through an intermediate hub;
passthrough is already handled separately via the MST hub path in
intel_dp_sink_set_dsc_passthrough(), so skip it here by returning
early when connector->mst.port is set.
Fix intel_hdmi_dsc_get_num_slices() call to use drm_display_mode *
instead of intel_crtc_state * to match the updated function signature.
v2: Fix build failure on drm-tip - replace non-existent dsc.slice_count
field with dsc.slice_config. Introduce
intel_dp_pcon_passthrough_dsc_slice_config() which calls
intel_hdmi_dsc_get_num_slices() for the target slice count then
finds a matching intel_dsc_slice_config via intel_dsc_get_slice_config()
to satisfy Intel VDSC HW constraints.
Fix pcon_dsc_passthrough caching order: move
intel_dp_pcon_set_dsc_passthrough_cap() from intel_dp_get_dsc_sink_cap()
to intel_dp_set_edid() so it runs after EDID is parsed and
display_info.hdmi.dsc_cap is populated. Also clear pcon_dsc_passthrough
in intel_dp_unset_edid() to keep lifecycle consistent.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 279 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 7 +
3 files changed, 253 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..08409e1b9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,49 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ /* convert_rgb only applies for RGB output; leave false for YCbCr */
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB);
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb) {
+ u8 color_fmt_cap =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP -
+ DP_DSC_SUPPORT];
+
+ vdsc_cfg->convert_rgb = color_fmt_cap & DP_DSC_RGB;
+ }
+
+ vdsc_cfg->line_buf_depth =
+ min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2343,10 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2385,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2485,10 +2528,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
num_joined_pipes,
output_format,
pipe_bpp, INT_MAX);
- int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
- mode_clock,
- mode_hdisplay,
- num_joined_pipes);
+ int dsc_slice_count;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
+ drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
+ false));
+ } else {
+ dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ }
if (min_bpp_x16 <= 0 || min_bpp_x16 > max_bpp_x16)
return false;
@@ -2683,8 +2736,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2775,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3794,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3810,19 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (!connector->mst.port) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN on
+ * the PCON's own aux channel so it forwards the compressed
+ * stream to the HDMI sink instead of decoding it.
+ */
+ if (connector->dp.pcon_dsc_passthrough)
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3830,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4352,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+static void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
+{
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info;
+
+ if (!connector)
+ return;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * PCON DSC passthrough is only supported for SST direct connections.
+ * In MST topologies the intermediate hub may report incorrect virtual
+ * DPCD for the downstream PCON port, leading to mismatched DSC
+ * parameters. Skip passthrough for MST until hub firmware correctly
+ * reflects the PCON's capabilities.
+ */
+ if (connector->mst.port)
+ return;
+
+ if (!intel_dp_is_hdmi_2_1_sink(intel_dp))
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ info = &connector->base.display_info;
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * Derive the required slice count from the downstream HDMI 2.1 sink
+ * DSC capabilities in EDID (not from the PCON encoder DPCD which is
+ * all-zero for passthrough-only devices).
+ */
+ /*
+ * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
+ * applies; the source VDSC HW limit (5120px) is higher so it is not
+ * the binding constraint here.
+ * src_max_slices: use hdmi_max_slices as the binding upper limit since
+ * the PCON passthrough capability bit (already checked) is the gate;
+ * the for-loop below further constrains to what the Intel VDSC HW can
+ * actually produce.
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ hdmi_max_slices, INT_MAX,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+ int line_slices;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ line_slices = intel_dsc_line_slice_count(&config);
+ if (line_slices != target_slices)
+ continue;
+
+ /* Slice count must evenly divide the horizontal display width */
+ if (crtc_state->hw.adjusted_mode.hdisplay % line_slices)
+ continue;
+
+ *config_ret = config;
+ return true;
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4713,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -6148,6 +6352,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6380,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 6a869d0f6..2653f2347 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1451,6 +1451,13 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
ret = intel_connector_update_modes(&connector->base, drm_edid);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the MST
+ * connector's EDID has been parsed and display_info.hdmi.dsc_cap
+ * is populated.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_edid_free(drm_edid);
if (intel_dp_tunnel_uhbr_lanes_wa_setup(intel_dp)) {
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v6 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 3:35 ` [PATCH v6 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-09 3:47 ` sashiko-bot
0 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-09 3:47 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Flawed implementation of PCON DSC passthrough for MST topologies incorrectly targets the root SST connector, leading to broken MST support, data races, and lockless accesses.
- [High] Mode validation unconditionally rejects all DSC modes for passthrough-only PCONs by capping the slice count with an all-zero DPCD capability.
--
commit f1a37f1f267d3517b3c9a3c61b716d9649b3222e
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
This patch adds explicit driver control of PCON DSC passthrough. It detects
passthrough capability at connect time and uses the downstream HDMI 2.1 sink
DSC capabilities instead of the PCON's encoder constraints to derive DSC
parameters.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034cf..e23e4e8b32bf2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -2524,10 +2567,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
> num_joined_pipes,
> output_format,
> pipe_bpp, INT_MAX);
> - int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> - mode_clock,
> - mode_hdisplay,
> - num_joined_pipes);
> + int dsc_slice_count;
> +
> + if (connector->dp.pcon_dsc_passthrough) {
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
> + drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
> + false));
[Severity: High]
Does this unconditionally reject all modes requiring DSC for passthrough-only
PCONs?
The commit message notes that the PCON encoder DPCD is all-zero for
passthrough-only devices. When connector->dp.dsc_dpcd is all-zero,
drm_dp_dsc_sink_max_slice_count() evaluates to 0.
As a result, dsc_slice_count becomes 0 due to the min_t() cap, and the
subsequent check in intel_dp_mode_valid_with_dsc() (if dsc_slice_count == 0)
will return false, failing mode validation.
[ ... ]
> @@ -3755,6 +3833,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
> {
> struct intel_display *display = to_intel_display(connector);
>
> + /* PCON passthrough: PCON forwards the stream, sink decompresses. */
> + if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
> + return;
[Severity: High]
Will this short-circuit logic fail to bypass decompression for MST leaves?
For an MST leaf connector, connector->mst.dp points to the root intel_dp,
meaning the !connector->mst.dp check evaluates to false. This appears to
contradict the commit message's note about ensuring
intel_dp_sink_set_dsc_decompression() is correctly bypassed for PCON
passthrough in MST topologies.
[ ... ]
> @@ -4298,6 +4391,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
> }
> }
>
> +/*
> + * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
[ ... ]
> + */
> +static void
> +intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
> +{
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info;
> +
> + if (!connector)
> + return;
> +
> + connector->dp.pcon_dsc_passthrough = false;
> +
> + /*
> + * PCON DSC passthrough is only supported for SST direct connections.
> + * In MST topologies the intermediate hub may report incorrect virtual
> + * DPCD for the downstream PCON port, leading to mismatched DSC
> + * parameters. Skip passthrough for MST until hub firmware correctly
> + * reflects the PCON's capabilities.
> + */
> + if (connector->mst.port)
> + return;
[Severity: High]
When called during MST connector mode validation, does this locklessly mutate
the root SST connector's state instead of evaluating the MST leaf?
Since mst_connector_get_ddc_modes() passes the root intel_dp
(connector->mst.dp), intel_dp->attached_connector resolves to the root SST
connector.
Consequently, connector->mst.port is NULL for the root connector, the early
return is skipped, and it locklessly modifies the root connector's
pcon_dsc_passthrough flag using potentially stale display_info data.
[ ... ]
> +static bool
> +intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + struct intel_dsc_slice_config *config_ret)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info = &connector->base.display_info;
[Severity: High]
Could this result in using the wrong display_info during an MST stream's
atomic check?
If this is called for an MST stream, intel_dp is the root DP device, making
intel_dp->attached_connector the root SST connector. This causes the function
to read the root connector's display_info rather than the MST leaf's
display_info.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 6a869d0f6ffc0..2653f2347f235 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
[ ... ]
> @@ -1451,6 +1451,13 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
>
> ret = intel_connector_update_modes(&connector->base, drm_edid);
>
> + /*
> + * Re-evaluate PCON DSC passthrough capability now that the MST
> + * connector's EDID has been parsed and display_info.hdmi.dsc_cap
> + * is populated.
> + */
> + intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
[Severity: High]
Is intel_dp pointing to the root SST port here rather than the MST leaf?
As noted above, passing the root intel_dp into
intel_dp_pcon_set_dsc_passthrough_cap() causes the capability evaluation to
incorrectly target the root connector rather than the MST stream connector.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909033518.158995-1-xiaolu.xie@intel.com?part=2
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev9)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (6 preceding siblings ...)
2026-09-07 11:33 ` ✓ i915.CI.Full: " Patchwork
@ 2026-09-09 3:50 ` Patchwork
2026-09-09 4:24 ` ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev11) Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-09 3:50 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev9)
URL : https://patchwork.freedesktop.org/series/173452/
State : failure
== Summary ==
Error: make failed
DESCEND objtool
CC [M] drivers/gpu/drm/i915/display/intel_dp_mst.o
drivers/gpu/drm/i915/display/intel_dp_mst.c: In function ‘mst_connector_get_ddc_modes’:
drivers/gpu/drm/i915/display/intel_dp_mst.c:1459:9: error: implicit declaration of function ‘intel_dp_pcon_set_dsc_passthrough_cap’ [-Werror=implicit-function-declaration]
1459 | intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[6]: *** [scripts/Makefile.build:290: drivers/gpu/drm/i915/display/intel_dp_mst.o] Error 1
make[5]: *** [scripts/Makefile.build:551: drivers/gpu/drm/i915] Error 2
make[4]: *** [scripts/Makefile.build:551: drivers/gpu/drm] Error 2
make[3]: *** [scripts/Makefile.build:551: drivers/gpu] Error 2
make[2]: *** [scripts/Makefile.build:551: drivers] Error 2
make[1]: *** [/home/kbuild2/kernel/Makefile:2229: .] Error 2
make: *** [Makefile:248: __sub-make] Error 2
Build failed, no error log produced
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-09 3:35 ` [PATCH v6 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-09 3:35 ` [PATCH v6 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-09 4:10 ` Xiao Lu
2026-09-09 4:10 ` [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-09 4:20 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology sashiko-bot
1 sibling, 2 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-09 4:10 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
drm_dp_mst_is_virtual_dpcd() checks if a branch port qualifies as a
virtual DPCD device by looking for a downstream port with
Peer_Device_Type=3 (DP_PEER_DEVICE_SST_SINK).
Some PCON devices advertise their downstream HDMI sink port using
Peer_Device_Type=4 (DP_PEER_DEVICE_DP_LEGACY_CONV) with a non-zero
DPCD_Revision in the link address reply, indicating a virtual DPCD is
present (VESA SCR Option 2). The current check misses this case, so
passthrough_aux is never set and DSC passthrough modes are rejected.
Accept DP_PEER_DEVICE_DP_LEGACY_CONV as a valid downstream peer type
in the DP-to-DP branch so these PCON topologies are correctly
identified.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 4de36fda0..7d1128bcd 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -6045,7 +6045,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
port->mstb &&
port->mstb->num_ports == 2) {
list_for_each_entry(downstream_port, &port->mstb->ports, next) {
- if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
+ if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
+ downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
!downstream_port->input) {
mutex_unlock(&port->mgr->lock);
return true;
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 4:10 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
@ 2026-09-09 4:10 ` Xiao Lu
2026-09-09 4:21 ` sashiko-bot
` (2 more replies)
2026-09-09 4:20 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology sashiko-bot
1 sibling, 3 replies; 30+ messages in thread
From: Xiao Lu @ 2026-09-09 4:10 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
combined with the downstream HDMI 2.1 sink's DSC 1.2 support from
EDID HF-VSDB. Cache the result in connector->dp.pcon_dsc_passthrough
(same lifecycle as fec_capability and dsc_dpcd).
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC parameters (slice count, bpc limits) from the downstream
HDMI sink's EDID DSC capabilities rather than from the PCON encoder
DPCD (all-zero for passthrough-only PCONs).
- Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults (version 1.2, convert_rgb per output format,
line_buf_depth=13, block_pred=true) instead of the PCON dsc_dpcd
fields which reflect passthrough device constraints, not the actual
HDMI sink decompressor.
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap from zeroing pipe.max_bpp.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path is preserved; the PCON
case is handled by redirecting aux to intel_dp->aux (SST) or
connector->mst.port->aux (MST via REMOTE_DPCD_WRITE) when
pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress.
- Add passthrough branch in intel_dp_mode_valid_with_dsc() to use
EDID max_slices capped by PCON dsc_dpcd slice capability.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected directly (SST)
and via PS8650 MST hub to a Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2, max 16 slices, 400 MHz/slice). At 4K@240Hz DSC compression is
required; driver now writes 0x160=0x02 explicitly and DSC parameters are
correctly derived from the HDMI sink EDID. Depends on the preceding
drm/dp/mst patch for MST topology support.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v7: Fix intel_dp_pcon_set_dsc_passthrough_cap() to accept an explicit
connector parameter instead of deriving it from
intel_dp->attached_connector, fixing incorrect root SST connector
access in MST paths. Make the function non-static and add a header
declaration so intel_dp_mst.c can call it. Update both SST
(intel_dp_set_edid) and MST (mst_connector_get_ddc_modes) call
sites to pass the correct per-connector context.
Remove the !connector->mst.port early-return so MST connectors
can also have pcon_dsc_passthrough set, enabling the correct
REMOTE_DPCD_WRITE path in intel_dp_sink_set_dsc_passthrough().
Remove the !connector->mst.dp guard in
intel_dp_sink_set_dsc_decompression() so MST PCON passthrough
connectors are also short-circuited correctly.
Fix intel_dp_mode_valid_with_dsc() to handle all-zero PCON dsc_dpcd
by falling back to EDID max_slices when pcon_max is zero.
v6: Add intel_dp_pcon_set_dsc_passthrough_cap() call in
mst_connector_get_ddc_modes() after EDID parsing so that MST
connectors also have pcon_dsc_passthrough evaluated using the
correct display_info.hdmi.dsc_cap values. This ensures that
intel_dp_sink_set_dsc_decompression() is correctly bypassed for
PCON passthrough in MST topologies, preventing 0x160 bit0 from
overwriting bit1 after the passthrough enable.
Fix checkpatch warnings: break long lines in the non-passthrough
branch of intel_dp_dsc_compute_params() and fix parenthesis
alignment in drm_dbg_kms() call.
v5: Split into two patches: the drm/dp/mst fix for recognizing
DP-to-HDMI PCON as virtual DPCD is now patch 1/2.
Inline PCON passthrough DSC parameter overrides into
intel_dp_dsc_compute_params() instead of a separate function;
fix convert_rgb to depend on output_format instead of being
unconditionally true.
Remove intel_dp_pcon_set_dsc_passthrough_cap() call from
intel_dp_get_dsc_sink_cap() - keep only the intel_dp_set_edid()
call so MST streams do not incorrectly update the root connector.
Pass INT_MAX as src_max_slice_width to intel_hdmi_dsc_get_num_slices()
so only the HDMI spec 2720px limit applies.
Add hdisplay divisibility check for the computed slice count.
Add PCON passthrough branch in intel_dp_mode_valid_with_dsc() using
EDID max_slices capped by PCON dsc_dpcd slice capability.
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
Fix intel_hdmi_dsc_get_num_slices() call to pass output_format as
the 2nd argument matching the updated 6-parameter signature.
Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults instead of PCON dsc_dpcd fields.
Skip align_max_sink_dsc_input_bpp() for PCON passthrough.
Fix intel_dp_dsc_compute_config() to use correct connector context
instead of intel_dp->attached_connector for MST streams.
v3: Restrict PCON DSC passthrough to SST direct connections only.
In MST topologies the PCON is connected through an intermediate hub;
passthrough is already handled separately via the MST hub path in
intel_dp_sink_set_dsc_passthrough(), so skip it here by returning
early when connector->mst.port is set.
Fix intel_hdmi_dsc_get_num_slices() call to use drm_display_mode *
instead of intel_crtc_state * to match the updated function signature.
v2: Fix build failure on drm-tip - replace non-existent dsc.slice_count
field with dsc.slice_config. Introduce
intel_dp_pcon_passthrough_dsc_slice_config() which calls
intel_hdmi_dsc_get_num_slices() for the target slice count then
finds a matching intel_dsc_slice_config via intel_dsc_get_slice_config()
to satisfy Intel VDSC HW constraints.
Fix pcon_dsc_passthrough caching order: move
intel_dp_pcon_set_dsc_passthrough_cap() from intel_dp_get_dsc_sink_cap()
to intel_dp_set_edid() so it runs after EDID is parsed and
display_info.hdmi.dsc_cap is populated. Also clear pcon_dsc_passthrough
in intel_dp_unset_edid() to keep lifecycle consistent.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 279 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 7 +
3 files changed, 253 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..08409e1b9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,49 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ /* convert_rgb only applies for RGB output; leave false for YCbCr */
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB);
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb) {
+ u8 color_fmt_cap =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP -
+ DP_DSC_SUPPORT];
+
+ vdsc_cfg->convert_rgb = color_fmt_cap & DP_DSC_RGB;
+ }
+
+ vdsc_cfg->line_buf_depth =
+ min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2343,10 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2385,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2485,10 +2528,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
num_joined_pipes,
output_format,
pipe_bpp, INT_MAX);
- int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
- mode_clock,
- mode_hdisplay,
- num_joined_pipes);
+ int dsc_slice_count;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
+ drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
+ false));
+ } else {
+ dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ }
if (min_bpp_x16 <= 0 || min_bpp_x16 > max_bpp_x16)
return false;
@@ -2683,8 +2736,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2775,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3794,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3810,19 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (!connector->mst.port) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN on
+ * the PCON's own aux channel so it forwards the compressed
+ * stream to the HDMI sink instead of decoding it.
+ */
+ if (connector->dp.pcon_dsc_passthrough)
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3830,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4352,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+static void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
+{
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info;
+
+ if (!connector)
+ return;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * PCON DSC passthrough is only supported for SST direct connections.
+ * In MST topologies the intermediate hub may report incorrect virtual
+ * DPCD for the downstream PCON port, leading to mismatched DSC
+ * parameters. Skip passthrough for MST until hub firmware correctly
+ * reflects the PCON's capabilities.
+ */
+ if (connector->mst.port)
+ return;
+
+ if (!intel_dp_is_hdmi_2_1_sink(intel_dp))
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ info = &connector->base.display_info;
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * Derive the required slice count from the downstream HDMI 2.1 sink
+ * DSC capabilities in EDID (not from the PCON encoder DPCD which is
+ * all-zero for passthrough-only devices).
+ */
+ /*
+ * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
+ * applies; the source VDSC HW limit (5120px) is higher so it is not
+ * the binding constraint here.
+ * src_max_slices: use hdmi_max_slices as the binding upper limit since
+ * the PCON passthrough capability bit (already checked) is the gate;
+ * the for-loop below further constrains to what the Intel VDSC HW can
+ * actually produce.
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ hdmi_max_slices, INT_MAX,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+ int line_slices;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ line_slices = intel_dsc_line_slice_count(&config);
+ if (line_slices != target_slices)
+ continue;
+
+ /* Slice count must evenly divide the horizontal display width */
+ if (crtc_state->hw.adjusted_mode.hdisplay % line_slices)
+ continue;
+
+ *config_ret = config;
+ return true;
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4713,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -6148,6 +6352,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6380,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 6a869d0f6..2653f2347 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1451,6 +1451,13 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
ret = intel_connector_update_modes(&connector->base, drm_edid);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the MST
+ * connector's EDID has been parsed and display_info.hdmi.dsc_cap
+ * is populated.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
+
drm_edid_free(drm_edid);
if (intel_dp_tunnel_uhbr_lanes_wa_setup(intel_dp)) {
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
2026-09-09 4:10 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-09 4:10 ` [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-09 4:20 ` sashiko-bot
1 sibling, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-09 4:20 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm_dp_mst_is_virtual_dpcd() unconditionally accepts DP_PEER_DEVICE_DP_LEGACY_CONV as a virtual DPCD without checking for a non-zero DPCD revision.
--
commit 7fdc1d351cc143b9e4d9acdb9eabc2fbc5bb1fee
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology
This commit attempts to correctly identify DP-to-HDMI PCON devices as having
a virtual DPCD within DP-to-DP topologies. It updates the peer device check
to accept legacy converters as valid downstream peer types.
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
[ ... ]
> @@ -6047,7 +6047,8 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
> port->mstb &&
> port->mstb->num_ports == 2) {
> list_for_each_entry(downstream_port, &port->mstb->ports, next) {
> - if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
> + if ((downstream_port->pdt == DP_PEER_DEVICE_SST_SINK ||
> + downstream_port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) &&
> !downstream_port->input) {
[Severity: High]
Does this code also need to check for a non-zero DPCD revision?
The commit message specifies that PCON devices indicating a virtual DPCD
advertise DP_PEER_DEVICE_DP_LEGACY_CONV with a non-zero DPCD_Revision (VESA
SCR Option 2). However, this new condition accepts any downstream port with
the legacy converter peer type without verifying that
downstream_port->dpcd_rev != 0.
Standard legacy converters (like DP-to-VGA or standard DP-to-HDMI adapters)
with an internal MST branch will typically have a DPCD revision of 0. By
omitting the dpcd_rev != 0 check, these standard legacy converters might be
falsely identified as having a virtual DPCD.
If this happens, drm_dp_mst_dsc_aux_for_port() treats the adapter as having
a virtual DPCD and attempts a remote DPCD read on the legacy port. Since
the legacy port has no virtual DPCD, the remote DPCD read receives a NAK
and returns -EIO, causing drm_dp_mst_dsc_aux_for_port() to return NULL and
potentially disable DSC for the port entirely.
> mutex_unlock(&port->mgr->lock);
> return true;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909041041.244531-1-xiaolu.xie@intel.com?part=1
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 4:10 ` [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
@ 2026-09-09 4:21 ` sashiko-bot
2026-09-09 5:13 ` [PATCH v8] " Xiao Lu
2026-09-09 5:42 ` [PATCH v9] " Xiao Lu
2 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-09 4:21 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 6 potential issue(s) to consider:
- [High] Incorrect connector context used for MST streams, causing root connector state corruption and broken MST passthrough.
- [High] Mode rejection due to unhandled all-zero PCON `dsc_dpcd` evaluating to 0 `dsc_slice_count`.
- [High] Stale early return guards prevent PCON passthrough from functioning over MST and risk hardware misconfiguration.
- [High] `intel_dp_dsc_compute_config` unconditionally fails because it calls `intel_dp_dsc_supports_format` with an all-zero DPCD.
- [Low] Implicit declaration of static function causing a build failure across translation units.
- [Low] Unused static helper function `intel_dp_pcon_dsc_enc_slice_height`.
--
commit e900995cfc29f9b4c87a5f8c6c73b97d623e0e33
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
This commit enables explicit driver control of PCON DSC passthrough for
HDMI 2.1 sinks that decompress the stream themselves. It adds paths to
detect capability, compute DSC parameters from the EDID instead of PCON
DPCD, and correctly configure passthrough via DPCD.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034cf..e23e4e8b32bf2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -2393,7 +2424,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> }
> }
>
> - if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
> + if (connector->dp.pcon_dsc_passthrough) {
[Severity: High]
Earlier in this function, intel_dp_dsc_supports_format() is called. Since
passthrough-only PCONs have an all-zero cached dsc_dpcd, does that check
unconditionally return false and abort the configuration with -EINVAL
before reaching this passthrough logic?
> + /*
> + * PCON passthrough: no PCON encoder DPCD, derive slice config
> + * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
> + */
> + if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
> + pipe_config,
> + &pipe_config->dsc.slice_config)) {
> + drm_dbg_kms(display->drm,
> + "PCON DSC passthrough: no valid slice config\n");
> + return -EINVAL;
> + }
> + } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
> adjusted_mode->crtc_hdisplay, num_joined_pipes,
> &pipe_config->dsc.slice_config))
> return -EINVAL;
[ ... ]
> @@ -2524,10 +2567,20 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
> num_joined_pipes,
> output_format,
> pipe_bpp, INT_MAX);
> - int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> - mode_clock,
> - mode_hdisplay,
> - num_joined_pipes);
> + int dsc_slice_count;
> +
> + if (connector->dp.pcon_dsc_passthrough) {
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + dsc_slice_count = min_t(int, info->hdmi.dsc_cap.max_slices,
> + drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
> + false));
[Severity: High]
Since passthrough-only PCONs lack a DSC decoder, their dsc_dpcd array is
all zeros, which makes drm_dp_dsc_sink_max_slice_count() return 0.
Does this cause the min_t() to evaluate to 0, resulting in valid modes
being unconditionally rejected?
The v7 changelog mentions falling back to EDID max_slices when pcon_max is
zero, but the code appears to use a direct min_t comparison.
> + } else {
> + dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> + mode_clock,
> + mode_hdisplay,
> + num_joined_pipes);
> + }
[ ... ]
> @@ -3755,6 +3833,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
> {
> struct intel_display *display = to_intel_display(connector);
>
> + /* PCON passthrough: PCON forwards the stream, sink decompresses. */
> + if (!connector->mst.dp && connector->dp.pcon_dsc_passthrough)
> + return;
[Severity: High]
Does this guard inadvertently prevent the short-circuit for PCON
passthrough over MST?
The v7 changelog indicates the !connector->mst.dp check was removed to
support MST, but it appears to still be present here. If an MST connection
is used, DP_DECOMPRESSION_EN might be erroneously written to a passthrough
device that does not support decompression.
> +
> if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
> DP_DECOMPRESSION_EN, enable) < 0)
> drm_dbg_kms(display->drm,
[ ... ]
> @@ -4298,6 +4391,116 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
> }
> }
>
> +/*
> + * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
> + *
> + * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
> + * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
> + * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
> + * without repeating the DPCD and EDID lookups.
> + *
> + * A PCON supports DSC passthrough when it explicitly advertises
> + * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
> + * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
> + * source VDSC engine is forwarded unchanged through the PCON to the HDMI
> + * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
> + */
> +static void
> +intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp)
[Severity: Low]
Does intel_dp_pcon_set_dsc_passthrough_cap() need to be non-static?
The v7 changelog mentions it was made non-static to fix a build failure,
but it remains static here. Compiling this might fail with an implicit
declaration error when called from
drivers/gpu/drm/i915/display/intel_dp_mst.c.
> +{
> + struct intel_connector *connector = intel_dp->attached_connector;
[Severity: High]
Could this cause state corruption for MST streams?
In an MST topology, intel_dp->attached_connector resolves to the root SST
connector, not the leaf MST connector. The v7 changelog notes that this
was fixed by accepting an explicit connector parameter, but it seems
intel_dp->attached_connector is still being used here.
> + const struct drm_display_info *info;
> +
> + if (!connector)
> + return;
> +
> + connector->dp.pcon_dsc_passthrough = false;
> +
> + /*
> + * PCON DSC passthrough is only supported for SST direct connections.
> + * In MST topologies the intermediate hub may report incorrect virtual
> + * DPCD for the downstream PCON port, leading to mismatched DSC
> + * parameters. Skip passthrough for MST until hub firmware correctly
> + * reflects the PCON's capabilities.
> + */
> + if (connector->mst.port)
> + return;
[Severity: High]
Does this early return explicitly disable passthrough capability checking
for MST connectors?
The v7 changelog indicates the !connector->mst.port early-return was
removed to support MST topologies, but it is still present in this patch.
[ ... ]
> +static bool
> +intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + struct intel_dsc_slice_config *config_ret)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info = &connector->base.display_info;
[Severity: High]
Similar to the issue above, does this read the root connector's display
info instead of the MST sink's EDID?
If this is executed for an MST stream, it will use the root connector's
HDMI capabilities (or lack thereof) instead of the actual downstream sink,
which might lead to invalid DSC slice configurations.
[ ... ]
> +static int
> +intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
> +{
> + int vactive = crtc_state->hw.adjusted_mode.vdisplay;
> +
> + return intel_hdmi_dsc_get_slice_height(vactive);
> +}
[Severity: Low]
Is intel_dp_pcon_dsc_enc_slice_height() intended to be used?
It appears to be newly defined as a static helper but is not called
anywhere in this patch, which might increase binary size or cause compiler
warnings for unused functions.
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 6a869d0f6ffc0..2653f2347f235 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1451,6 +1451,13 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
>
> ret = intel_connector_update_modes(&connector->base, drm_edid);
>
> + /*
> + * Re-evaluate PCON DSC passthrough capability now that the MST
> + * connector's EDID has been parsed and display_info.hdmi.dsc_cap
> + * is populated.
> + */
> + intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
[Severity: Low]
Because intel_dp_pcon_set_dsc_passthrough_cap() remains static in
intel_dp.c, will this cross-file call trigger a build failure?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909041041.244531-1-xiaolu.xie@intel.com?part=2
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev11)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (7 preceding siblings ...)
2026-09-09 3:50 ` ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev9) Patchwork
@ 2026-09-09 4:24 ` Patchwork
2026-09-09 6:01 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev12) Patchwork
2026-09-09 6:36 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev13) Patchwork
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-09 4:24 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev11)
URL : https://patchwork.freedesktop.org/series/173452/
State : failure
== Summary ==
Error: make failed
DESCEND objtool
CC [M] drivers/gpu/drm/i915/display/intel_dp_mst.o
drivers/gpu/drm/i915/display/intel_dp_mst.c: In function ‘mst_connector_get_ddc_modes’:
drivers/gpu/drm/i915/display/intel_dp_mst.c:1459:9: error: implicit declaration of function ‘intel_dp_pcon_set_dsc_passthrough_cap’ [-Werror=implicit-function-declaration]
1459 | intel_dp_pcon_set_dsc_passthrough_cap(intel_dp);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[6]: *** [scripts/Makefile.build:290: drivers/gpu/drm/i915/display/intel_dp_mst.o] Error 1
make[5]: *** [scripts/Makefile.build:551: drivers/gpu/drm/i915] Error 2
make[4]: *** [scripts/Makefile.build:551: drivers/gpu/drm] Error 2
make[3]: *** [scripts/Makefile.build:551: drivers/gpu] Error 2
make[2]: *** [scripts/Makefile.build:551: drivers] Error 2
make[1]: *** [/home/kbuild/kernel/Makefile:2229: .] Error 2
make: *** [Makefile:248: __sub-make] Error 2
Build failed, no error log produced
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v8] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 4:10 ` [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-09 4:21 ` sashiko-bot
@ 2026-09-09 5:13 ` Xiao Lu
2026-09-09 5:29 ` sashiko-bot
2026-09-09 5:42 ` [PATCH v9] " Xiao Lu
2 siblings, 1 reply; 30+ messages in thread
From: Xiao Lu @ 2026-09-09 5:13 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
combined with the downstream HDMI 2.1 sink's DSC 1.2 support from
EDID HF-VSDB. Cache the result in connector->dp.pcon_dsc_passthrough
(same lifecycle as fec_capability and dsc_dpcd).
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC parameters (slice count, bpc limits) from the downstream
HDMI sink's EDID DSC capabilities rather than from the PCON encoder
DPCD (all-zero for passthrough-only PCONs).
- Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults (version 1.2, convert_rgb per output format,
line_buf_depth=13, block_pred=true) instead of the PCON dsc_dpcd
fields which reflect passthrough device constraints, not the actual
HDMI sink decompressor.
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap from zeroing pipe.max_bpp.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path is preserved; the PCON
case is handled by redirecting aux to intel_dp->aux (SST) or
connector->mst.port->aux (MST via REMOTE_DPCD_WRITE) when
pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress.
- Add passthrough branch in intel_dp_mode_valid_with_dsc() to use
EDID max_slices capped by PCON dsc_dpcd slice capability.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected directly (SST)
and via PS8650 MST hub to a Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2, max 16 slices, 400 MHz/slice). At 4K@240Hz DSC compression is
required; driver now writes 0x160=0x02 explicitly and DSC parameters are
correctly derived from the HDMI sink EDID. Depends on the preceding
drm/dp/mst patch for MST topology support.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v8: Sincere apologies - v7 was sent with a typo that left the old
single-parameter signature for intel_dp_pcon_set_dsc_passthrough_cap()
in place, causing the build failure. This version correctly updates
the function to accept an explicit struct intel_connector * parameter.
v7: Fix intel_dp_pcon_set_dsc_passthrough_cap() to accept an explicit
connector parameter instead of deriving it from
intel_dp->attached_connector, fixing incorrect root SST connector
access in MST paths. Make the function non-static and add a header
declaration so intel_dp_mst.c can call it. Update both SST
(intel_dp_set_edid) and MST (mst_connector_get_ddc_modes) call
sites to pass the correct per-connector context.
Remove the !connector->mst.port early-return so MST connectors
can also have pcon_dsc_passthrough set, enabling the correct
REMOTE_DPCD_WRITE path in intel_dp_sink_set_dsc_passthrough().
Remove the !connector->mst.dp guard in
intel_dp_sink_set_dsc_decompression() so MST PCON passthrough
connectors are also short-circuited correctly.
Fix intel_dp_mode_valid_with_dsc() to handle all-zero PCON dsc_dpcd
by falling back to EDID max_slices when pcon_max is zero.
v6: Add intel_dp_pcon_set_dsc_passthrough_cap() call in
mst_connector_get_ddc_modes() after EDID parsing so that MST
connectors also have pcon_dsc_passthrough evaluated using the
correct display_info.hdmi.dsc_cap values.
Fix checkpatch warnings: break long lines in the non-passthrough
branch of intel_dp_dsc_compute_params() and fix parenthesis
alignment in drm_dbg_kms() call.
v5: Split into two patches: the drm/dp/mst fix for recognizing
DP-to-HDMI PCON as virtual DPCD is now patch 1/2.
Inline PCON passthrough DSC parameter overrides into
intel_dp_dsc_compute_params() instead of a separate function;
fix convert_rgb to depend on output_format instead of being
unconditionally true.
Remove intel_dp_pcon_set_dsc_passthrough_cap() call from
intel_dp_get_dsc_sink_cap() - keep only the intel_dp_set_edid()
call so MST streams do not incorrectly update the root connector.
Pass INT_MAX as src_max_slice_width to intel_hdmi_dsc_get_num_slices()
so only the HDMI spec 2720px limit applies.
Add hdisplay divisibility check for the computed slice count.
Add PCON passthrough branch in intel_dp_mode_valid_with_dsc() using
EDID max_slices capped by PCON dsc_dpcd slice capability.
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
v3: Restrict PCON DSC passthrough to SST direct connections only.
v2: Fix build failure on drm-tip.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 286 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp.h | 2 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 7 +
4 files changed, 262 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..83d3a7648 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,49 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ /* Only set convert_rgb for RGB output; leave unchanged for YCbCr */
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB);
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb) {
+ u8 color_fmt_cap =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP -
+ DP_DSC_SUPPORT];
+
+ vdsc_cfg->convert_rgb = color_fmt_cap & DP_DSC_RGB;
+ }
+
+ vdsc_cfg->line_buf_depth =
+ min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2343,10 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2385,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2485,10 +2528,27 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
num_joined_pipes,
output_format,
pipe_bpp, INT_MAX);
- int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
- mode_clock,
- mode_hdisplay,
- num_joined_pipes);
+ int dsc_slice_count;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough, use the HDMI sink EDID max_slices
+ * capped by the PCON's own slice capability from dsc_dpcd.
+ * If the PCON dsc_dpcd is all-zero, fall back to EDID only.
+ */
+ const struct drm_display_info *info = &connector->base.display_info;
+ int pcon_max = drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
+ false);
+
+ dsc_slice_count = pcon_max ?
+ min_t(int, info->hdmi.dsc_cap.max_slices, pcon_max) :
+ info->hdmi.dsc_cap.max_slices;
+ } else {
+ dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ }
if (min_bpp_x16 <= 0 || min_bpp_x16 > max_bpp_x16)
return false;
@@ -2683,8 +2743,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2782,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3801,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3817,22 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN
+ * directly to the PCON so it forwards the compressed stream
+ * to the HDMI sink. For SST use the root port aux; for MST
+ * use the MST port aux which routes via REMOTE_DPCD_WRITE.
+ */
+ if (connector->mst.port)
+ aux = &connector->mst.port->aux;
+ else
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else if (connector->mst.port) {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3840,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4362,113 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp,
+ struct intel_connector *connector)
+{
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * Check PCON HDMI 2.1 capability directly from this connector's
+ * display_info so that MST connectors use their own EDID data
+ * rather than intel_dp->attached_connector (the SST root connector).
+ */
+ if (!drm_dp_is_branch(intel_dp->dpcd))
+ return;
+
+ if (!info->is_hdmi)
+ return;
+
+ if (!info->hdmi.max_frl_rate_per_lane)
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * Derive the required slice count from the downstream HDMI 2.1 sink
+ * DSC capabilities in EDID (not from the PCON encoder DPCD which is
+ * all-zero for passthrough-only devices).
+ */
+ /*
+ * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
+ * applies; the source VDSC HW limit (5120px) is higher so it is not
+ * the binding constraint here.
+ * src_max_slices: use hdmi_max_slices as the binding upper limit since
+ * the PCON passthrough capability bit (already checked) is the gate;
+ * the for-loop below further constrains to what the Intel VDSC HW can
+ * actually produce.
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ hdmi_max_slices, INT_MAX,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+ int line_slices;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ line_slices = intel_dsc_line_slice_count(&config);
+ if (line_slices != target_slices)
+ continue;
+
+ /* Slice count must evenly divide the horizontal display width */
+ if (crtc_state->hw.adjusted_mode.hdisplay % line_slices)
+ continue;
+
+ *config_ret = config;
+ return true;
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4720,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -6148,6 +6359,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp, connector);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6387,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 04fae203b..42c2fb5c2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -187,6 +187,8 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_dp_check_frl_training(struct intel_dp *intel_dp);
+void intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp,
+ struct intel_connector *connector);
void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 6a869d0f6..d48fe87ce 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1451,6 +1451,13 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
ret = intel_connector_update_modes(&connector->base, drm_edid);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the MST
+ * connector's EDID has been parsed and display_info.hdmi.dsc_cap
+ * is populated.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp, connector);
+
drm_edid_free(drm_edid);
if (intel_dp_tunnel_uhbr_lanes_wa_setup(intel_dp)) {
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v8] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 5:13 ` [PATCH v8] " Xiao Lu
@ 2026-09-09 5:29 ` sashiko-bot
0 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-09 5:29 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Incorrect connector reference in MST DSC slice configuration causes unconditional failure.
- [Medium] PCON hardware maximum slice limit is ignored during passthrough configuration.
--
commit 76a629f18177f4364fe642d6c3207fc584a095ea
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034cf..e0e90219a150d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -2393,7 +2424,19 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> }
> }
>
> - if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
> + if (connector->dp.pcon_dsc_passthrough) {
> + /*
> + * PCON passthrough: no PCON encoder DPCD, derive slice config
> + * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
> + */
> + if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
> + pipe_config,
> + &pipe_config->dsc.slice_config)) {
> + drm_dbg_kms(display->drm,
> + "PCON DSC passthrough: no valid slice config\n");
> + return -EINVAL;
> + }
> + } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
> adjusted_mode->crtc_hdisplay, num_joined_pipes,
> &pipe_config->dsc.slice_config))
> return -EINVAL;
[ ... ]
> +static bool
> +intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + struct intel_dsc_slice_config *config_ret)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info = &connector->base.display_info;
> + int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
> + int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
> + int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
> + int target_slices;
> + int slices_per_pipe;
[Severity: High]
Does this code correctly handle MST topologies? The caller
intel_dp_dsc_compute_config() already has the correct connector available, but
does not pass it down. Instead, intel_dp_pcon_passthrough_dsc_slice_config()
derives it via intel_dp->attached_connector.
For an MST topology, this points to the physical root connector (the hub), not
the virtual MST connector corresponding to the display. The root connector's
display_info lacks the downstream HDMI sink's DSC capabilities from EDID, which
causes info->hdmi.dsc_cap.max_slices and clk_per_slice to be zero, leading
intel_hdmi_dsc_get_num_slices() to fail unconditionally.
Should intel_dp_pcon_passthrough_dsc_slice_config() accept an explicit
struct intel_connector * parameter from its caller to ensure MST streams use
the correct EDID capabilities?
> +
> + /*
> + * Derive the required slice count from the downstream HDMI 2.1 sink
> + * DSC capabilities in EDID (not from the PCON encoder DPCD which is
> + * all-zero for passthrough-only devices).
> + */
> + /*
> + * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
> + * applies; the source VDSC HW limit (5120px) is higher so it is not
> + * the binding constraint here.
> + * src_max_slices: use hdmi_max_slices as the binding upper limit since
> + * the PCON passthrough capability bit (already checked) is the gate;
> + * the for-loop below further constrains to what the Intel VDSC HW can
> + * actually produce.
> + */
> + target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
> + crtc_state->output_format,
> + hdmi_max_slices, INT_MAX,
> + hdmi_max_slices,
> + hdmi_throughput);
[Severity: Medium]
Does this configuration respect the PCON adapter's passthrough limits?
While intel_dp_mode_valid_with_dsc() properly caps the validated slice count
using the PCON's own passthrough limit from dsc_dpcd, this function directly
passes hdmi_max_slices as the src_max_slices parameter to
intel_hdmi_dsc_get_num_slices().
If the HDMI 2.1 sink supports a higher maximum DSC slice count than the
intermediate PCON adapter, the source VDSC engine could be configured with a
slice count that the PCON cannot forward.
Should this be bounded by the PCON's DPCD slice limit to ensure the source is
not programmed beyond the adapter's capabilities?
> + if (!target_slices)
> + return false;
> +
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909051308.388381-1-xiaolu.xie@intel.com?part=1
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v9] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 4:10 ` [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-09 4:21 ` sashiko-bot
2026-09-09 5:13 ` [PATCH v8] " Xiao Lu
@ 2026-09-09 5:42 ` Xiao Lu
2026-09-09 5:57 ` sashiko-bot
2 siblings, 1 reply; 30+ messages in thread
From: Xiao Lu @ 2026-09-09 5:42 UTC (permalink / raw)
To: intel-gfx
Cc: jani.nikula, ville.syrjala, imre.deak, ankit.k.nautiyal, Xiao Lu
HDMI 2.1 PCON devices (e.g. Parade PS196) that do not have an internal
DSC encoder can still forward a DSC-compressed stream from the DP source
to the downstream HDMI 2.1 sink unchanged (passthrough mode). The HDMI
sink (e.g. Lenovo ThinkVision Pro 27UD-10) then decompresses the stream
itself. This mode is signalled by DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD
0x060 bit1) on the PCON.
Previously the driver had no awareness of this path: the PCON would fall
back to its autonomous passthrough mode and write 0x160=0x02 by itself,
leaving the source with no control over DSC parameters or DPCD 0x160.
This patch adds explicit driver control of PCON DSC passthrough:
- Detect passthrough capability at connect time from DPCD 0x060 bit1
combined with the downstream HDMI 2.1 sink's DSC 1.2 support from
EDID HF-VSDB. Cache the result in connector->dp.pcon_dsc_passthrough
(same lifecycle as fec_capability and dsc_dpcd).
- Treat the PCON as DSC-capable in intel_dp_has_dsc() when passthrough
is supported, allowing the normal DSC compute_config path to proceed.
- Derive DSC parameters (slice count, bpc limits) from the downstream
HDMI sink's EDID DSC capabilities rather than from the PCON encoder
DPCD (all-zero for passthrough-only PCONs).
- Add PCON passthrough branch in intel_dp_dsc_compute_params() to use
DSC 1.2 defaults (version 1.2, convert_rgb per output format,
line_buf_depth=13, block_pred=true) instead of the PCON dsc_dpcd
fields which reflect passthrough device constraints, not the actual
HDMI sink decompressor.
- Skip align_max_sink_dsc_input_bpp() for PCON passthrough to prevent
the PCON dsc_dpcd color_depth_cap from zeroing pipe.max_bpp.
- Write DP_DSC_PASSTHROUGH_EN (0x160 bit1) to the PCON via
intel_dp_sink_set_dsc_passthrough() on enable, and clear it on
disable. The existing MST hub passthrough path is preserved; the PCON
case is handled by redirecting aux to intel_dp->aux (SST) or
connector->mst.port->aux (MST via REMOTE_DPCD_WRITE) when
pcon_dsc_passthrough is set.
- Short-circuit intel_dp_sink_set_dsc_decompression() for PCON
passthrough since the PCON itself does not decompress.
- Add passthrough branch in intel_dp_mode_valid_with_dsc() to use
EDID max_slices capped by PCON dsc_dpcd slice capability.
Tested with Parade PS196G (HW 0.2, SW 241.62) connected directly (SST)
and via PS8650 MST hub to a Lenovo ThinkVision Pro 27UD-10 (HDMI 2.1,
DSC 1.2, max 16 slices, 400 MHz/slice). At 4K@240Hz DSC compression is
required; driver now writes 0x160=0x02 explicitly and DSC parameters are
correctly derived from the HDMI sink EDID. Depends on the preceding
drm/dp/mst patch for MST topology support.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
v9: Based on Sashiko AI review feedback:
Fix intel_dp_pcon_passthrough_dsc_slice_config() to accept an
explicit connector parameter instead of intel_dp->attached_connector,
fixing incorrect HDMI sink EDID lookup in MST paths (connector was
always the SST root connector regardless of which MST stream was
being configured).
Fix src_max_slices to use drm_dp_dsc_sink_max_slice_count() from
the PCON dsc_dpcd instead of hdmi_max_slices, so the PCON hardware
slice limit is respected as an upper bound alongside the HDMI sink
EDID limit.
v8: Sincere apologies - v7 was sent with a typo that left the old
single-parameter signature for intel_dp_pcon_set_dsc_passthrough_cap()
in place, causing the build failure. This version correctly updates
the function to accept an explicit struct intel_connector * parameter.
v7: Fix intel_dp_pcon_set_dsc_passthrough_cap() to accept an explicit
connector parameter instead of deriving it from
intel_dp->attached_connector, fixing incorrect root SST connector
access in MST paths. Make the function non-static and add a header
declaration so intel_dp_mst.c can call it. Update both SST
(intel_dp_set_edid) and MST (mst_connector_get_ddc_modes) call
sites to pass the correct per-connector context.
Remove the !connector->mst.port early-return so MST connectors
can also have pcon_dsc_passthrough set.
Remove the !connector->mst.dp guard in
intel_dp_sink_set_dsc_decompression() so MST PCON passthrough
connectors are also short-circuited correctly.
Fix intel_dp_mode_valid_with_dsc() to handle all-zero PCON dsc_dpcd
by falling back to EDID max_slices when pcon_max is zero.
v6: Add intel_dp_pcon_set_dsc_passthrough_cap() call in
mst_connector_get_ddc_modes() after EDID parsing so that MST
connectors also have pcon_dsc_passthrough evaluated correctly.
Fix checkpatch warnings.
v5: Split into two patches. Inline PCON passthrough DSC parameter
overrides into intel_dp_dsc_compute_params(). Fix convert_rgb to
depend on output_format. Remove intel_dp_pcon_set_dsc_passthrough_cap()
from intel_dp_get_dsc_sink_cap(). Pass INT_MAX as src_max_slice_width.
Add hdisplay divisibility check. Add PCON passthrough branch in
intel_dp_mode_valid_with_dsc().
v4: Rebase onto drm-intel-next-2026-09-03 to fix compilation failures.
v3: Restrict PCON DSC passthrough to SST direct connections only.
v2: Fix build failure on drm-tip.
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 287 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp.h | 2 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 7 +
4 files changed, 263 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0..90d77aa4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -564,6 +564,7 @@ struct intel_connector {
u8 dsc_hblank_expansion_quirk:1;
u8 dsc_throughput_quirk:1;
u8 dsc_decompression_enabled:1;
+ u8 pcon_dsc_passthrough:1; /* PCON DSC PT supported and HDMI sink DSC 1.2 */
struct {
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c46397edf..1768ca6df 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1259,8 +1259,14 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
connector->panel.vbt.edp.dsc_disable)
return false;
- if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))
- return false;
+ if (!drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)) {
+ /*
+ * PCON passthrough: PCON has no DSC decoder so dsc_dpcd is
+ * zero, but if pcon_dsc_passthrough is set (cached at connect
+ * time) the downstream HDMI 2.1 sink will decompress instead.
+ */
+ return connector->dp.pcon_dsc_passthrough;
+ }
return true;
}
@@ -1866,28 +1872,49 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,
if (ret)
return ret;
- vdsc_cfg->dsc_version_major =
- (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(intel_dp_source_dsc_version_minor(display),
- intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
- if (vdsc_cfg->convert_rgb)
- vdsc_cfg->convert_rgb =
- connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
- drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
- if (!vdsc_cfg->line_buf_depth) {
- drm_dbg_kms(display->drm,
- "DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough the HDMI 2.1 sink decompresses, not the
+ * PCON. The PCON dsc_dpcd fields reflect passthrough device
+ * constraints and are not valid for configuring the source VDSC
+ * engine. Use DSC 1.2 sink defaults instead.
+ */
+ vdsc_cfg->dsc_version_major = 1;
+ vdsc_cfg->dsc_version_minor = min(intel_dp_source_dsc_version_minor(display), 2);
+ /* Only set convert_rgb for RGB output; leave unchanged for YCbCr */
+ if (vdsc_cfg->convert_rgb)
+ vdsc_cfg->convert_rgb =
+ (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB);
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, 13);
+ vdsc_cfg->block_pred_enable = true;
+ } else {
+ vdsc_cfg->dsc_version_major =
+ (connector->dp.dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+ DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+ vdsc_cfg->dsc_version_minor =
+ min(intel_dp_source_dsc_version_minor(display),
+ intel_dp_sink_dsc_version_minor(connector->dp.dsc_dpcd));
+ if (vdsc_cfg->convert_rgb) {
+ u8 color_fmt_cap =
+ connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP -
+ DP_DSC_SUPPORT];
+
+ vdsc_cfg->convert_rgb = color_fmt_cap & DP_DSC_RGB;
+ }
+
+ vdsc_cfg->line_buf_depth =
+ min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+ drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
+ drm_dbg_kms(display->drm,
+ "DSC Sink Line Buffer Depth invalid\n");
+ return -EINVAL;
+ }
- vdsc_cfg->block_pred_enable =
- connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ vdsc_cfg->block_pred_enable =
+ connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+ }
return drm_dsc_compute_rc_parameters(vdsc_cfg);
}
@@ -2316,6 +2343,11 @@ void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state)
memset(&crtc_state->dsc.config, 0, sizeof(crtc_state->dsc.config));
}
+static bool intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_connector *connector,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret);
+
int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state,
@@ -2354,7 +2386,20 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
}
}
- if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: no PCON encoder DPCD, derive slice config
+ * from the downstream HDMI 2.1 sink DSC capabilities in EDID.
+ */
+ if (!intel_dp_pcon_passthrough_dsc_slice_config(intel_dp,
+ connector,
+ pipe_config,
+ &pipe_config->dsc.slice_config)) {
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: no valid slice config\n");
+ return -EINVAL;
+ }
+ } else if (!intel_dp_dsc_get_slice_config(connector, adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay, num_joined_pipes,
&pipe_config->dsc.slice_config))
return -EINVAL;
@@ -2485,10 +2530,27 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
num_joined_pipes,
output_format,
pipe_bpp, INT_MAX);
- int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
- mode_clock,
- mode_hdisplay,
- num_joined_pipes);
+ int dsc_slice_count;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * For PCON passthrough, use the HDMI sink EDID max_slices
+ * capped by the PCON's own slice capability from dsc_dpcd.
+ * If the PCON dsc_dpcd is all-zero, fall back to EDID only.
+ */
+ const struct drm_display_info *info = &connector->base.display_info;
+ int pcon_max = drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
+ false);
+
+ dsc_slice_count = pcon_max ?
+ min_t(int, info->hdmi.dsc_cap.max_slices, pcon_max) :
+ info->hdmi.dsc_cap.max_slices;
+ } else {
+ dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+ mode_clock,
+ mode_hdisplay,
+ num_joined_pipes);
+ }
if (min_bpp_x16 <= 0 || min_bpp_x16 > max_bpp_x16)
return false;
@@ -2683,8 +2745,33 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
return false;
}
- if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
- return false;
+ if (dsc) {
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * PCON passthrough: PCON has no DSC encoder DPCD so
+ * intel_dp_dsc_compute_pipe_bpp_limits() would see
+ * all-zero dsc_dpcd and fail. Use the downstream HDMI
+ * sink DSC bpc cap to constrain the pipe bpp instead.
+ */
+ const struct drm_display_info *info =
+ &connector->base.display_info;
+ u8 hdmi_max_bpc = info->hdmi.dsc_cap.bpc_supported ?: 8;
+ int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
+ int dsc_max_bpc = min_t(int,
+ intel_dp_dsc_max_src_input_bpc(display),
+ hdmi_max_bpc);
+
+ limits->pipe.min_bpp = max(limits->pipe.min_bpp,
+ dsc_min_bpc * 3);
+ limits->pipe.max_bpp = min(limits->pipe.max_bpp,
+ dsc_max_bpc * 3);
+
+ if (limits->pipe.min_bpp > limits->pipe.max_bpp)
+ return false;
+ } else if (!intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) {
+ return false;
+ }
+ }
/*
* crtc_state->pipe_bpp is the non-DP specific baseline (platform /
@@ -2697,7 +2784,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
*/
limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
limits->pipe.max_bpp);
- if (dsc)
+ if (dsc && !connector->dp.pcon_dsc_passthrough)
limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
limits->pipe.max_bpp);
@@ -3716,6 +3803,10 @@ intel_dp_sink_set_dsc_decompression(struct intel_connector *connector,
{
struct intel_display *display = to_intel_display(connector);
+ /* PCON passthrough: PCON forwards the stream, sink decompresses. */
+ if (connector->dp.pcon_dsc_passthrough)
+ return;
+
if (write_dsc_decompression_flag(connector->dp.dsc_decompression_aux,
DP_DECOMPRESSION_EN, enable) < 0)
drm_dbg_kms(display->drm,
@@ -3728,8 +3819,22 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
bool enable)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_dp_aux *aux = connector->mst.port ?
- connector->mst.port->passthrough_aux : NULL;
+ struct drm_dp_aux *aux = NULL;
+
+ if (connector->dp.pcon_dsc_passthrough) {
+ /*
+ * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN
+ * directly to the PCON so it forwards the compressed stream
+ * to the HDMI sink. For SST use the root port aux; for MST
+ * use the MST port aux which routes via REMOTE_DPCD_WRITE.
+ */
+ if (connector->mst.port)
+ aux = &connector->mst.port->aux;
+ else
+ aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
+ } else if (connector->mst.port) {
+ aux = connector->mst.port->passthrough_aux;
+ }
if (!aux)
return;
@@ -3737,7 +3842,7 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
if (write_dsc_decompression_flag(aux,
DP_DSC_PASSTHROUGH_EN, enable) < 0)
drm_dbg_kms(display->drm,
- "Failed to %s sink compression passthrough state\n",
+ "Failed to %s DSC passthrough\n",
str_enable_disable(enable));
}
@@ -4259,6 +4364,112 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
}
}
+/*
+ * intel_dp_pcon_set_dsc_passthrough_cap - cache PCON DSC passthrough capability
+ *
+ * Called once at connect time (from intel_dp_get_dsc_sink_cap()) after
+ * dsc_dpcd and the HDMI sink EDID have been read. Caches the result in
+ * connector->dp.pcon_dsc_passthrough so modeset paths can read it cheaply
+ * without repeating the DPCD and EDID lookups.
+ *
+ * A PCON supports DSC passthrough when it explicitly advertises
+ * DP_DSC_PASSTHROUGH_IS_SUPPORTED (DPCD 0x060 bit1) and the downstream
+ * HDMI 2.1 sink supports DSC 1.2. The compressed stream produced by the
+ * source VDSC engine is forwarded unchanged through the PCON to the HDMI
+ * sink for decompression (DP_DSC_ENABLE bit1 on the PCON).
+ */
+void
+intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp,
+ struct intel_connector *connector)
+{
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ connector->dp.pcon_dsc_passthrough = false;
+
+ /*
+ * Check PCON HDMI 2.1 capability directly from this connector's
+ * display_info so that MST connectors use their own EDID data
+ * rather than intel_dp->attached_connector (the SST root connector).
+ */
+ if (!drm_dp_is_branch(intel_dp->dpcd))
+ return;
+
+ if (!info->is_hdmi)
+ return;
+
+ if (!info->hdmi.max_frl_rate_per_lane)
+ return;
+
+ if (!(connector->dp.dsc_dpcd[0] & DP_DSC_PASSTHROUGH_IS_SUPPORTED))
+ return;
+
+ connector->dp.pcon_dsc_passthrough = info->hdmi.dsc_cap.v_1p2;
+}
+
+static bool
+intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
+ const struct intel_connector *connector,
+ const struct intel_crtc_state *crtc_state,
+ struct intel_dsc_slice_config *config_ret)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ const struct drm_display_info *info = &connector->base.display_info;
+ int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
+ int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
+ int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
+ /*
+ * Use the PCON's own DSC passthrough capability (from its virtual
+ * DPCD) as the source constraint, mirroring what
+ * intel_dp_pcon_dsc_enc_slices() does for encoder mode. This handles
+ * multi-hop topologies (e.g. MST hub -> PCON) where the intermediate
+ * hub virtual DPCD may be more restrictive than the HDMI sink EDID.
+ */
+ int pcon_max_slices = drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, false);
+ int target_slices;
+ int slices_per_pipe;
+
+ /*
+ * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
+ * applies; the source VDSC HW limit (5120px) is not the binding constraint.
+ * src_max_slices: use PCON dsc_dpcd slice capability as upper bound.
+ */
+ target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ pcon_max_slices, INT_MAX,
+ hdmi_max_slices,
+ hdmi_throughput);
+ if (!target_slices)
+ return false;
+
+ drm_dbg_kms(display->drm,
+ "PCON DSC passthrough: target %d slices from HDMI sink EDID cap"
+ " (max_slices=%d clk_per_slice=%d MHz)\n",
+ target_slices, hdmi_max_slices, hdmi_throughput);
+
+ for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
+ struct intel_dsc_slice_config config;
+ int line_slices;
+
+ if (!intel_dsc_get_slice_config(display,
+ num_joined_pipes, slices_per_pipe,
+ &config))
+ continue;
+
+ line_slices = intel_dsc_line_slice_count(&config);
+ if (line_slices != target_slices)
+ continue;
+
+ /* Slice count must evenly divide the horizontal display width */
+ if (crtc_state->hw.adjusted_mode.hdisplay % line_slices)
+ continue;
+
+ *config_ret = config;
+ return true;
+ }
+
+ return false;
+}
+
static int
intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
{
@@ -4510,6 +4721,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
memset(&connector->dp.dsc_branch_caps, 0, sizeof(connector->dp.dsc_branch_caps));
connector->dp.dsc_throughput_quirk = false;
+ connector->dp.pcon_dsc_passthrough = false;
if (dpcd_rev < DP_DPCD_REV_14)
return;
@@ -6148,6 +6360,12 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
intel_dp_update_dfp(intel_dp, drm_edid);
intel_dp_update_420(intel_dp);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the EDID has
+ * been parsed and display_info.hdmi.dsc_cap is up to date.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp, connector);
+
drm_dp_cec_attach(&intel_dp->aux,
connector->base.display_info.source_physical_address);
}
@@ -6170,6 +6388,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
+ connector->dp.pcon_dsc_passthrough = false;
drm_connector_set_vrr_capable_property(&connector->base,
false);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 04fae203b..42c2fb5c2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -187,6 +187,8 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_dp_check_frl_training(struct intel_dp *intel_dp);
+void intel_dp_pcon_set_dsc_passthrough_cap(struct intel_dp *intel_dp,
+ struct intel_connector *connector);
void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 6a869d0f6..d48fe87ce 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1451,6 +1451,13 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
ret = intel_connector_update_modes(&connector->base, drm_edid);
+ /*
+ * Re-evaluate PCON DSC passthrough capability now that the MST
+ * connector's EDID has been parsed and display_info.hdmi.dsc_cap
+ * is populated.
+ */
+ intel_dp_pcon_set_dsc_passthrough_cap(intel_dp, connector);
+
drm_edid_free(drm_edid);
if (intel_dp_tunnel_uhbr_lanes_wa_setup(intel_dp)) {
--
2.43.0
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v9] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
2026-09-09 5:42 ` [PATCH v9] " Xiao Lu
@ 2026-09-09 5:57 ` sashiko-bot
0 siblings, 0 replies; 30+ messages in thread
From: sashiko-bot @ 2026-09-09 5:57 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] `intel_dp_pcon_passthrough_dsc_slice_config()` unconditionally fails for passthrough-only PCONs due to passing a zero slice count to `intel_hdmi_dsc_get_num_slices()`.
- [High] `intel_dp_sink_set_dsc_passthrough()` skips enabling DSC passthrough on intermediate MST hubs when a PCON is connected.
- [High] Incorrect uncompressed dotclk validation applied to DSC passthrough modes due to zero slice count.
--
commit 8ca09416b752ce965e92cfcd6a72b6d5b9efeae5
Author: Xiao Lu <xiaolu.xie@intel.com>
drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices
This commit enables explicit driver control of DSC passthrough for HDMI 2.1
PCON devices that lack an internal DSC encoder. It derives DSC parameters
from the HDMI sink's EDID and writes the appropriate passthrough enable bits.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034cf..939c707d34316 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -2524,10 +2569,27 @@ bool intel_dp_mode_valid_with_dsc(struct intel_connector *connector,
> num_joined_pipes,
> output_format,
> pipe_bpp, INT_MAX);
> - int dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> - mode_clock,
> - mode_hdisplay,
> - num_joined_pipes);
> + int dsc_slice_count;
> +
> + if (connector->dp.pcon_dsc_passthrough) {
> + /*
> + * For PCON passthrough, use the HDMI sink EDID max_slices
> + * capped by the PCON's own slice capability from dsc_dpcd.
> + * If the PCON dsc_dpcd is all-zero, fall back to EDID only.
> + */
> + const struct drm_display_info *info = &connector->base.display_info;
> + int pcon_max = drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd,
> + false);
> +
> + dsc_slice_count = pcon_max ?
> + min_t(int, info->hdmi.dsc_cap.max_slices, pcon_max) :
> + info->hdmi.dsc_cap.max_slices;
[Severity: High]
While the slice count is calculated correctly here with a fallback, does this
leave callers like intel_dp_mode_valid_format() and
mst_connector_mode_valid_ctx() with an incorrect slice count?
Those outer functions obtain the slice count by calling
intel_dp_dsc_get_slice_count() directly. For passthrough-only PCONs with an
all-zero DPCD, this returns 0. When intel_dp_dotclk_valid() is later called
with a slice count of 0, will it incorrectly evaluate DSC passthrough modes
against uncompressed dotclock limits?
> + } else {
> + dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
> + mode_clock,
> + mode_hdisplay,
> + num_joined_pipes);
> + }
[ ... ]
> @@ -3767,8 +3858,22 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
> bool enable)
> {
> struct intel_display *display = to_intel_display(connector);
> - struct drm_dp_aux *aux = connector->mst.port ?
> - connector->mst.port->passthrough_aux : NULL;
> + struct drm_dp_aux *aux = NULL;
> +
> + if (connector->dp.pcon_dsc_passthrough) {
> + /*
> + * HDMI 2.1 PCON passthrough: write DP_DSC_PASSTHROUGH_EN
> + * directly to the PCON so it forwards the compressed stream
> + * to the HDMI sink. For SST use the root port aux; for MST
> + * use the MST port aux which routes via REMOTE_DPCD_WRITE.
> + */
> + if (connector->mst.port)
> + aux = &connector->mst.port->aux;
> + else
> + aux = &intel_attached_dp((struct intel_connector *)connector)->aux;
> + } else if (connector->mst.port) {
> + aux = connector->mst.port->passthrough_aux;
> + }
[Severity: High]
When connecting a PCON through an MST hub, doesn't the driver need to instruct
both the intermediate MST hub (passthrough_aux) and the PCON
(connector->mst.port->aux) to pass through the DSC stream?
The mutually exclusive if/else if structure here appears to force the driver
to write DP_DSC_PASSTHROUGH_EN only to the PCON, bypassing the MST hub
configuration entirely. Can this prevent the compressed stream from being
properly forwarded?
>
> if (!aux)
> return;
[ ... ]
> @@ -4298,6 +4403,112 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
> +static bool
> +intel_dp_pcon_passthrough_dsc_slice_config(struct intel_dp *intel_dp,
> + const struct intel_connector *connector,
> + const struct intel_crtc_state *crtc_state,
> + struct intel_dsc_slice_config *config_ret)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + const struct drm_display_info *info = &connector->base.display_info;
> + int num_joined_pipes = intel_crtc_num_joined_pipes(crtc_state);
> + int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
> + int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
> + /*
> + * Use the PCON's own DSC passthrough capability (from its virtual
> + * DPCD) as the source constraint, mirroring what
> + * intel_dp_pcon_dsc_enc_slices() does for encoder mode. This handles
> + * multi-hop topologies (e.g. MST hub -> PCON) where the intermediate
> + * hub virtual DPCD may be more restrictive than the HDMI sink EDID.
> + */
> + int pcon_max_slices = drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, false);
> + int target_slices;
> + int slices_per_pipe;
> +
> + /*
> + * src_max_slice_width: pass INT_MAX so the HDMI spec limit of 2720px
> + * applies; the source VDSC HW limit (5120px) is not the binding constraint.
> + * src_max_slices: use PCON dsc_dpcd slice capability as upper bound.
> + */
> + target_slices = intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
> + crtc_state->output_format,
> + pcon_max_slices, INT_MAX,
> + hdmi_max_slices,
> + hdmi_throughput);
[Severity: High]
If a passthrough-only PCON has an all-zero DPCD DSC capability,
drm_dp_dsc_sink_max_slice_count() will evaluate to 0 for pcon_max_slices.
Does this cause intel_hdmi_dsc_get_num_slices() to unconditionally fail and
return 0, since it requires src_max_slices >= 1? Should there be a fallback to
EDID slice limits (e.g. pcon_max_slices ? pcon_max_slices : hdmi_max_slices)
to prevent this?
> + if (!target_slices)
> + return false;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909054225.456573-1-xiaolu.xie@intel.com?part=1
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev12)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (8 preceding siblings ...)
2026-09-09 4:24 ` ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev11) Patchwork
@ 2026-09-09 6:01 ` Patchwork
2026-09-09 6:36 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev13) Patchwork
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-09 6:01 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5237 bytes --]
== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev12)
URL : https://patchwork.freedesktop.org/series/173452/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19108 -> Patchwork_173452v12
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/index.html
Participating hosts (38 -> 38)
------------------------------
Additional (1): bat-adls-6
Missing (1): bat-dg2-13
Known issues
------------
Here are the changes found in Patchwork_173452v12 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adls-6: NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic@basic:
- bat-adls-6: NOTRUN -> [SKIP][2] ([i915#15656])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@gem_tiled_pread_basic@basic.html
* igt@intel_hwmon@hwmon-read:
- bat-adls-6: NOTRUN -> [SKIP][3] ([i915#7707]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adls-6: NOTRUN -> [SKIP][4] ([i915#4103]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-adls-6: NOTRUN -> [SKIP][5] ([i915#16361])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adls-6: NOTRUN -> [SKIP][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adls-6: NOTRUN -> [SKIP][7] ([i915#5354])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-mmap-gtt:
- bat-adls-6: NOTRUN -> [SKIP][8] ([i915#1072] / [i915#9732]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adls-6: NOTRUN -> [SKIP][9] ([i915#3555])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adls-6: NOTRUN -> [SKIP][10] ([i915#3291]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-adls-6/igt@prime_vgem@basic-fence-read.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-arlh-2: [INCOMPLETE][11] ([i915#16547]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19108/bat-arlh-2/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-arlh-2/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_heartbeat:
- bat-arlh-2: [INCOMPLETE][13] ([i915#17007]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19108/bat-arlh-2/igt@i915_selftest@live@gt_heartbeat.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/bat-arlh-2/igt@i915_selftest@live@gt_heartbeat.html
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16547]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16547
[i915#17007]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17007
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_19108 -> Patchwork_173452v12
CI-20190529: 20190529
CI_DRM_19108: dd822035c9dcd89e47cbfa75da6f3119617fbada @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9086: a89061ecccede222b8da2f310f3bf71ed908c365 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_173452v12: dd822035c9dcd89e47cbfa75da6f3119617fbada @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v12/index.html
[-- Attachment #2: Type: text/html, Size: 6140 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev13)
2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
` (9 preceding siblings ...)
2026-09-09 6:01 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev12) Patchwork
@ 2026-09-09 6:36 ` Patchwork
10 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2026-09-09 6:36 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx
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== Series Details ==
Series: drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev13)
URL : https://patchwork.freedesktop.org/series/173452/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19108 -> Patchwork_173452v13
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/index.html
Participating hosts (38 -> 38)
------------------------------
Additional (1): bat-adls-6
Missing (1): bat-dg2-13
Known issues
------------
Here are the changes found in Patchwork_173452v13 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adls-6: NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic@basic:
- bat-adls-6: NOTRUN -> [SKIP][2] ([i915#15656])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@gem_tiled_pread_basic@basic.html
* igt@intel_hwmon@hwmon-read:
- bat-adls-6: NOTRUN -> [SKIP][3] ([i915#7707]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adls-6: NOTRUN -> [SKIP][4] ([i915#4103]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-adls-6: NOTRUN -> [SKIP][5] ([i915#16361])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adls-6: NOTRUN -> [SKIP][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adls-6: NOTRUN -> [SKIP][7] ([i915#5354])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-mmap-gtt:
- bat-adls-6: NOTRUN -> [SKIP][8] ([i915#1072] / [i915#9732]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adls-6: NOTRUN -> [SKIP][9] ([i915#3555])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adls-6: NOTRUN -> [SKIP][10] ([i915#3291]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-adls-6/igt@prime_vgem@basic-fence-read.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-arlh-2: [INCOMPLETE][11] ([i915#16547]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19108/bat-arlh-2/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-arlh-2/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_heartbeat:
- bat-arlh-2: [INCOMPLETE][13] ([i915#17007]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19108/bat-arlh-2/igt@i915_selftest@live@gt_heartbeat.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/bat-arlh-2/igt@i915_selftest@live@gt_heartbeat.html
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16547]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16547
[i915#17007]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17007
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_19108 -> Patchwork_173452v13
CI-20190529: 20190529
CI_DRM_19108: dd822035c9dcd89e47cbfa75da6f3119617fbada @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9086: a89061ecccede222b8da2f310f3bf71ed908c365 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_173452v13: dd822035c9dcd89e47cbfa75da6f3119617fbada @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_173452v13/index.html
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2026-09-06 9:41 [PATCH v4] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-06 10:00 ` sashiko-bot
2026-09-06 10:23 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev4) Patchwork
2026-09-06 12:28 ` ✗ i915.CI.Full: failure " Patchwork
2026-09-07 4:41 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-07 4:41 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 4:56 ` sashiko-bot
2026-09-07 4:53 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology sashiko-bot
2026-09-07 4:44 ` [PATCH v5 0/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 4:44 ` [PATCH v5 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-07 4:54 ` sashiko-bot
2026-09-07 4:44 ` [PATCH v5 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-07 5:04 ` sashiko-bot
2026-09-09 3:35 ` [PATCH v6 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-09 3:35 ` [PATCH v6 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-09 3:47 ` sashiko-bot
2026-09-09 4:10 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology Xiao Lu
2026-09-09 4:10 ` [PATCH v7 2/2] drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices Xiao Lu
2026-09-09 4:21 ` sashiko-bot
2026-09-09 5:13 ` [PATCH v8] " Xiao Lu
2026-09-09 5:29 ` sashiko-bot
2026-09-09 5:42 ` [PATCH v9] " Xiao Lu
2026-09-09 5:57 ` sashiko-bot
2026-09-09 4:20 ` [PATCH v7 1/2] drm/dp/mst: recognize DP-to-HDMI PCON as virtual DPCD in DP-to-DP topology sashiko-bot
2026-09-07 6:30 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev7) Patchwork
2026-09-07 11:33 ` ✓ i915.CI.Full: " Patchwork
2026-09-09 3:50 ` ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev9) Patchwork
2026-09-09 4:24 ` ✗ Fi.CI.BUILD: failure for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev11) Patchwork
2026-09-09 6:01 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev12) Patchwork
2026-09-09 6:36 ` ✓ i915.CI.BAT: success for drm/i915/dp: enable DSC passthrough for HDMI 2.1 PCON devices (rev13) Patchwork
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