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* [PATCH] drm/i915/display: Update the CMN_SDP_TL in fastset path
@ 2026-09-23 13:33 Ankit Nautiyal
  2026-09-23 14:00 ` sashiko-bot
                   ` (6 more replies)
  0 siblings, 7 replies; 9+ messages in thread
From: Ankit Nautiyal @ 2026-09-23 13:33 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: suraj.kandpal, Ankit Nautiyal

Commit bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line")
enabled the CMN_SDP_TL for the modeset path, but missed to add it to the
fastset path.

Since dip.cmn_sdp_tl is already skipped from the strict pipe-config
comparison during fastsets, it was always intended to get updated
without full modeset, but the update to the register was missed.

During a fastset, if CMN_SDP_TL changes, update the register
similar to the EMP_AS_SDP_TL, which gets updated in
intel_vrr_set_transcoder_timings().

Fixes: bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line")
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e3e0d2f8faef..01604c4e8615 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -69,6 +69,7 @@
 #include "intel_cx0_phy.h"
 #include "intel_ddi.h"
 #include "intel_de.h"
+#include "intel_dip.h"
 #include "intel_display_driver.h"
 #include "intel_display_power.h"
 #include "intel_display_regs.h"
@@ -999,6 +1000,12 @@ static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state,
 		old_crtc_state->vrr.cmrr.cmrr_n != new_crtc_state->vrr.cmrr.cmrr_n;
 }
 
+static bool cmn_sdp_changed(const struct intel_crtc_state *old_crtc_state,
+			    const struct intel_crtc_state *new_crtc_state)
+{
+	return old_crtc_state->dip.cmn_sdp_tl != new_crtc_state->dip.cmn_sdp_tl;
+}
+
 static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state,
 				    struct intel_crtc *crtc)
 {
@@ -6924,6 +6931,9 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
 		if (vrr_params_changed(old_crtc_state, new_crtc_state) ||
 		    cmrr_params_changed(old_crtc_state, new_crtc_state))
 			intel_vrr_set_transcoder_timings(new_crtc_state);
+
+		if (cmn_sdp_changed(old_crtc_state, new_crtc_state))
+			intel_dip_cmn_sdp_transmission_line_enable(new_crtc_state);
 	}
 
 	intel_fbc_update(state, crtc);
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2026-09-26  8:32 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-23 13:33 [PATCH] drm/i915/display: Update the CMN_SDP_TL in fastset path Ankit Nautiyal
2026-09-23 14:00 ` sashiko-bot
2026-09-23 22:13 ` ✓ i915.CI.BAT: success for " Patchwork
2026-09-24  2:19 ` [PATCH v2] " Ankit Nautiyal
2026-09-24  3:40   ` Kandpal, Suraj
2026-09-24  3:29 ` ✓ i915.CI.BAT: success for drm/i915/display: Update the CMN_SDP_TL in fastset path (rev2) Patchwork
2026-09-25  2:58 ` ✗ i915.CI.Full: failure " Patchwork
2026-09-25 23:07 ` ✓ i915.CI.Full: success " Patchwork
2026-09-26  8:32 ` Patchwork

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