From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: <John.C.Harrison@Intel.com>, <Intel-GFX@Lists.FreeDesktop.Org>
Cc: DRI-Devel@Lists.FreeDesktop.Org
Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915/guc: Update to GuC version 70.1.1
Date: Mon, 11 Apr 2022 17:36:25 -0700 [thread overview]
Message-ID: <240cd202-319d-2b8e-0d32-2f037b332028@intel.com> (raw)
In-Reply-To: <20220408180326.1454951-4-John.C.Harrison@Intel.com>
On 4/8/2022 11:03 AM, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Update to the latest GuC firmware release.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
> ---
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 32 ++++++++++++------------
> 1 file changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index bb864655c495..cb5dd16421d0 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -53,22 +53,22 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
> * firmware as TGL.
> */
> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
> - fw_def(DG2, 0, guc_def(dg2, 69, 0, 3)) \
> - fw_def(ALDERLAKE_P, 0, guc_def(adlp, 69, 0, 3)) \
> - fw_def(ALDERLAKE_S, 0, guc_def(tgl, 69, 0, 3)) \
> - fw_def(DG1, 0, guc_def(dg1, 69, 0, 3)) \
> - fw_def(ROCKETLAKE, 0, guc_def(tgl, 69, 0, 3)) \
> - fw_def(TIGERLAKE, 0, guc_def(tgl, 69, 0, 3)) \
> - fw_def(JASPERLAKE, 0, guc_def(ehl, 69, 0, 3)) \
> - fw_def(ELKHARTLAKE, 0, guc_def(ehl, 69, 0, 3)) \
> - fw_def(ICELAKE, 0, guc_def(icl, 69, 0, 3)) \
> - fw_def(COMETLAKE, 5, guc_def(cml, 69, 0, 3)) \
> - fw_def(COMETLAKE, 0, guc_def(kbl, 69, 0, 3)) \
> - fw_def(COFFEELAKE, 0, guc_def(kbl, 69, 0, 3)) \
> - fw_def(GEMINILAKE, 0, guc_def(glk, 69, 0, 3)) \
> - fw_def(KABYLAKE, 0, guc_def(kbl, 69, 0, 3)) \
> - fw_def(BROXTON, 0, guc_def(bxt, 69, 0, 3)) \
> - fw_def(SKYLAKE, 0, guc_def(skl, 69, 0, 3))
> + fw_def(DG2, 0, guc_def(dg2, 70, 1, 1)) \
> + fw_def(ALDERLAKE_P, 0, guc_def(adlp, 70, 1, 1)) \
> + fw_def(ALDERLAKE_S, 0, guc_def(tgl, 70, 1, 1)) \
> + fw_def(DG1, 0, guc_def(dg1, 70, 1, 1)) \
> + fw_def(ROCKETLAKE, 0, guc_def(tgl, 70, 1, 1)) \
> + fw_def(TIGERLAKE, 0, guc_def(tgl, 70, 1, 1)) \
> + fw_def(JASPERLAKE, 0, guc_def(ehl, 70, 1, 1)) \
> + fw_def(ELKHARTLAKE, 0, guc_def(ehl, 70, 1, 1)) \
> + fw_def(ICELAKE, 0, guc_def(icl, 70, 1, 1)) \
> + fw_def(COMETLAKE, 5, guc_def(cml, 70, 1, 1)) \
> + fw_def(COMETLAKE, 0, guc_def(kbl, 70, 1, 1)) \
> + fw_def(COFFEELAKE, 0, guc_def(kbl, 70, 1, 1)) \
> + fw_def(GEMINILAKE, 0, guc_def(glk, 70, 1, 1)) \
> + fw_def(KABYLAKE, 0, guc_def(kbl, 70, 1, 1)) \
> + fw_def(BROXTON, 0, guc_def(bxt, 70, 1, 1)) \
> + fw_def(SKYLAKE, 0, guc_def(skl, 70, 1, 1))
>
> #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
> fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
next prev parent reply other threads:[~2022-04-12 0:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-08 18:03 [Intel-gfx] [PATCH 0/3] Update to GuC v70 John.C.Harrison
2022-04-08 18:03 ` [Intel-gfx] [PATCH 1/3] drm/i915/guc: Update context registration to new GuC API John.C.Harrison
2022-04-12 0:13 ` Ceraolo Spurio, Daniele
2022-04-08 18:03 ` [Intel-gfx] [PATCH 2/3] drm/i915/guc: Update scheduling policies " John.C.Harrison
2022-04-12 0:35 ` Ceraolo Spurio, Daniele
2022-04-08 18:03 ` [Intel-gfx] [PATCH 3/3] drm/i915/guc: Update to GuC version 70.1.1 John.C.Harrison
2022-04-12 0:36 ` Ceraolo Spurio, Daniele [this message]
2022-04-08 21:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Update to GuC v70 Patchwork
2022-04-08 21:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-08 22:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-09 0:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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