[PATCH v8 00/11] Panel replay selective update support

[PATCH v8 00/11] Panel replay selective update support

[Jouni Högander]

This patch set is implementing panel replay selective update support
for Intel hardware.

v8:
  - use correct offset for DP_PANEL_PANEL_REPLAY_CAPABILITY
v7:
  - use always vsc revision 0x6 for Panel Replay
v6:
  - fixes split to separate patch set
v5:
  - do not use PSR2_STATUS for PSR1
v4:
  - do not rename intel_psr_enabled
  - do not add sel_update_et_enabled into struct intel_psr
v3:
  - do not disable panel replay by default
  - set has_psr for panel replay as well
  - enable sink before link training
  - do not apply all PSR workarounds for panel replay
  - do not write/read registers/bits not applicable for panel replay
  - use psr bit definitions in granularity configuration as well
  - goto unsupported instead of return when global enabled check fails
  - update module parameter descriptions.
v2:
  - make psr pause/resume to work for panel replay as well

Jouni Högander (11):
  drm/i915/psr: Rename has_psr2 as has_sel_update
  drm/i915/dp: Use always vsc revision 0x6 for Panel Replay
  drm/i915/psr: Rename psr2_enabled as sel_update_enabled
  drm/panelreplay: dpcd register definition for panelreplay SU
  drm/i915/psr: Detect panel replay selective update support
  drm/i915/psr: Modify intel_dp_get_su_granularity to support panel
    replay
  drm/i915/psr: Panel replay uses SRD_STATUS to track it's status
  drm/i915/psr: Do not apply workarounds in case of panel replay
  drm/i915/psr: Update PSR module parameter descriptions
  drm/i915/psr: Split intel_psr2_config_valid for panel replay
  drm/i915/psr: Add panel replay sel update support to debugfs interface

 .../drm/i915/display/intel_crtc_state_dump.c  |  10 +-
 drivers/gpu/drm/i915/display/intel_display.c  |   2 +-
 .../drm/i915/display/intel_display_params.c   |   5 +-
 .../drm/i915/display/intel_display_types.h    |   5 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  17 +-
 drivers/gpu/drm/i915/display/intel_fbc.c      |   5 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   3 +-
 drivers/gpu/drm/i915/display/intel_psr.c      | 227 ++++++++++++------
 include/drm/display/drm_dp.h                  |   6 +
 9 files changed, 185 insertions(+), 95 deletions(-)

-- 
2.34.1

[PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update

[Jouni Högander]

We are going to reuse has_psr2 for panel_replay as well. Rename it
as has_sel_update to avoid confusion.

v2: Rebase

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++-----
 drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
 drivers/gpu/drm/i915/display/intel_display_types.h   |  2 +-
 drivers/gpu/drm/i915/display/intel_dp.c              |  2 +-
 drivers/gpu/drm/i915/display/intel_fbc.c             |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c             | 10 +++++-----
 6 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index ccaa4cb2809b..2c391714f28e 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
 		drm_printf(&p, "sdp split: %s\n",
 			   str_enabled_disabled(pipe_config->sdp_split_enable));
 
-		drm_printf(&p, "psr: %s, psr2: %s, panel replay: %s, selective fetch: %s\n",
-			   str_enabled_disabled(pipe_config->has_psr),
-			   str_enabled_disabled(pipe_config->has_psr2),
-			   str_enabled_disabled(pipe_config->has_panel_replay),
-			   str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
+		drm_printf(&p, "psr: %s, selective update: %s, panel replay: %s, selective fetch: %s\n",
+			    str_enabled_disabled(pipe_config->has_psr),
+			    str_enabled_disabled(pipe_config->has_sel_update),
+			    str_enabled_disabled(pipe_config->has_panel_replay),
+			    str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
 	}
 
 	drm_printf(&p, "framestart delay: %d, MSA timing delay: %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f45e5f02096d..c1aba4e8ac54 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5319,7 +5319,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	 */
 	if (current_config->has_panel_replay || pipe_config->has_panel_replay) {
 		PIPE_CONF_CHECK_BOOL(has_psr);
-		PIPE_CONF_CHECK_BOOL(has_psr2);
+		PIPE_CONF_CHECK_BOOL(has_sel_update);
 		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
 		PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
 		PIPE_CONF_CHECK_BOOL(has_panel_replay);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 62f7a30c37dc..6747c10da298 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1189,7 +1189,7 @@ struct intel_crtc_state {
 
 	/* PSR is supported but might not be enabled due the lack of enabled planes */
 	bool has_psr;
-	bool has_psr2;
+	bool has_sel_update;
 	bool enable_psr2_sel_fetch;
 	bool enable_psr2_su_region_et;
 	bool req_psr2_sdp_prior_scanline;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e05e25cd4a94..a7c406a9695f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2660,7 +2660,7 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
 		intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
 						 vsc);
-	} else if (crtc_state->has_psr2) {
+	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {
 		/*
 		 * [PSR2 without colorimetry]
 		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 151dcd0c45b6..984f13d8c0c8 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1251,7 +1251,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 	 * Recommendation is to keep this combination disabled
 	 * Bspec: 50422 HSD: 14010260002
 	 */
-	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
+	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update) {
 		plane_state->no_fbc_reason = "PSR2 enabled";
 		return 0;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f5b33335a9ae..a2f7d998d342 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp *intel_dp,
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	u8 dpcd_val = DP_PSR_ENABLE;
 
-	if (crtc_state->has_psr2) {
+	if (crtc_state->has_sel_update) {
 		/* Enable ALPM at sink for psr2 */
 		if (!crtc_state->has_panel_replay) {
 			drm_dp_dpcd_writeb(&intel_dp->aux,
@@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	if (!crtc_state->has_psr)
 		return;
 
-	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
+	crtc_state->has_sel_update = intel_psr2_config_valid(intel_dp, crtc_state);
 }
 
 void intel_psr_get_config(struct intel_encoder *encoder,
@@ -1672,7 +1672,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
 		pipe_config->has_psr = true;
 	}
 
-	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
+	pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
 	pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
 
 	if (!intel_dp->psr.psr2_enabled)
@@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 
 	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
 
-	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
+	intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
 	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
 	intel_dp->psr.busy_frontbuffer_bits = 0;
 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
@@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state,
 		needs_to_disable |= intel_crtc_needs_modeset(new_crtc_state);
 		needs_to_disable |= !new_crtc_state->has_psr;
 		needs_to_disable |= !new_crtc_state->active_planes;
-		needs_to_disable |= new_crtc_state->has_psr2 != psr->psr2_enabled;
+		needs_to_disable |= new_crtc_state->has_sel_update != psr->psr2_enabled;
 		needs_to_disable |= DISPLAY_VER(i915) < 11 &&
 			new_crtc_state->wm_level_disabled;
 
-- 
2.34.1

RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Monday, April 29, 2024 5:38 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> has_sel_update
> 
> We are going to reuse has_psr2 for panel_replay as well. Rename it as
> has_sel_update to avoid confusion.
> 
> v2: Rebase
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++-----
>  drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
>  drivers/gpu/drm/i915/display/intel_display_types.h   |  2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c              |  2 +-
>  drivers/gpu/drm/i915/display/intel_fbc.c             |  2 +-
>  drivers/gpu/drm/i915/display/intel_psr.c             | 10 +++++-----
>  6 files changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index ccaa4cb2809b..2c391714f28e 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct
> intel_crtc_state *pipe_config,
>  		drm_printf(&p, "sdp split: %s\n",
>  			   str_enabled_disabled(pipe_config-
> >sdp_split_enable));
> 
> -		drm_printf(&p, "psr: %s, psr2: %s, panel replay: %s, selective
> fetch: %s\n",
> -			   str_enabled_disabled(pipe_config->has_psr),
> -			   str_enabled_disabled(pipe_config->has_psr2),
> -			   str_enabled_disabled(pipe_config-
> >has_panel_replay),
> -			   str_enabled_disabled(pipe_config-
> >enable_psr2_sel_fetch));
> +		drm_printf(&p, "psr: %s, selective update: %s, panel replay:
> %s, selective fetch: %s\n",
> +			    str_enabled_disabled(pipe_config->has_psr),
> +			    str_enabled_disabled(pipe_config-
> >has_sel_update),
> +			    str_enabled_disabled(pipe_config-
> >has_panel_replay),
> +			    str_enabled_disabled(pipe_config-
> >enable_psr2_sel_fetch));

During panel-replay has_psr flag also will be true. So will get print as psr enabled.
Something below may give correct info,
                if (pipe_config->has_panel_replay)
                        drm_printf(&p, "psr: disabled, panel replay: enabled");
                else
                        drm_printf(&p, "psr: %s, panel replay: disabled",
                                             str_enabled_disabled(pipe_config->has_psr));

                drm_printf(&p, "selective update: %s, selective fetch: %s\n",
                                     str_enabled_disabled(pipe_config->has_sel_update),
                                     str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));

Regards,
Animesh

>  	}
> 
>  	drm_printf(&p, "framestart delay: %d, MSA timing delay: %d\n", diff
> --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f45e5f02096d..c1aba4e8ac54 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5319,7 +5319,7 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>  	 */
>  	if (current_config->has_panel_replay || pipe_config-
> >has_panel_replay) {
>  		PIPE_CONF_CHECK_BOOL(has_psr);
> -		PIPE_CONF_CHECK_BOOL(has_psr2);
> +		PIPE_CONF_CHECK_BOOL(has_sel_update);
>  		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
>  		PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
>  		PIPE_CONF_CHECK_BOOL(has_panel_replay);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 62f7a30c37dc..6747c10da298 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1189,7 +1189,7 @@ struct intel_crtc_state {
> 
>  	/* PSR is supported but might not be enabled due the lack of enabled
> planes */
>  	bool has_psr;
> -	bool has_psr2;
> +	bool has_sel_update;
>  	bool enable_psr2_sel_fetch;
>  	bool enable_psr2_su_region_et;
>  	bool req_psr2_sdp_prior_scanline;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index e05e25cd4a94..a7c406a9695f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2660,7 +2660,7 @@ static void intel_dp_compute_vsc_sdp(struct
> intel_dp *intel_dp,
>  	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
>  		intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
>  						 vsc);
> -	} else if (crtc_state->has_psr2) {
> +	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {
>  		/*
>  		 * [PSR2 without colorimetry]
>  		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 151dcd0c45b6..984f13d8c0c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1251,7 +1251,7 @@ static int intel_fbc_check_plane(struct
> intel_atomic_state *state,
>  	 * Recommendation is to keep this combination disabled
>  	 * Bspec: 50422 HSD: 14010260002
>  	 */
> -	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
> +	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update) {
>  		plane_state->no_fbc_reason = "PSR2 enabled";
>  		return 0;
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index f5b33335a9ae..a2f7d998d342 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp *intel_dp,
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	u8 dpcd_val = DP_PSR_ENABLE;
> 
> -	if (crtc_state->has_psr2) {
> +	if (crtc_state->has_sel_update) {
>  		/* Enable ALPM at sink for psr2 */
>  		if (!crtc_state->has_panel_replay) {
>  			drm_dp_dpcd_writeb(&intel_dp->aux,
> @@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  	if (!crtc_state->has_psr)
>  		return;
> 
> -	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
> +	crtc_state->has_sel_update = intel_psr2_config_valid(intel_dp,
> +crtc_state);
>  }
> 
>  void intel_psr_get_config(struct intel_encoder *encoder, @@ -1672,7
> +1672,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
>  		pipe_config->has_psr = true;
>  	}
> 
> -	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
> +	pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
>  	pipe_config->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
> 
>  	if (!intel_dp->psr.psr2_enabled)
> @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct intel_dp
> *intel_dp,
> 
>  	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> 
> -	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> +	intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
>  	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
>  	intel_dp->psr.busy_frontbuffer_bits = 0;
>  	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
> @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct
> intel_atomic_state *state,
>  		needs_to_disable |=
> intel_crtc_needs_modeset(new_crtc_state);
>  		needs_to_disable |= !new_crtc_state->has_psr;
>  		needs_to_disable |= !new_crtc_state->active_planes;
> -		needs_to_disable |= new_crtc_state->has_psr2 != psr-
> >psr2_enabled;
> +		needs_to_disable |= new_crtc_state->has_sel_update !=
> +psr->psr2_enabled;
>  		needs_to_disable |= DISPLAY_VER(i915) < 11 &&
>  			new_crtc_state->wm_level_disabled;
> 
> --
> 2.34.1

RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update

[Manna, Animesh]

> -----Original Message-----
> From: Manna, Animesh
> Sent: Tuesday, April 30, 2024 12:24 AM
> To: Hogander, Jouni <jouni.hogander@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> has_sel_update
> 
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Monday, April 29, 2024 5:38 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>
> > Subject: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> > has_sel_update
> >
> > We are going to reuse has_psr2 for panel_replay as well. Rename it as
> > has_sel_update to avoid confusion.
> >
> > v2: Rebase
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++-----
> >  drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
> >  drivers/gpu/drm/i915/display/intel_display_types.h   |  2 +-
> >  drivers/gpu/drm/i915/display/intel_dp.c              |  2 +-
> >  drivers/gpu/drm/i915/display/intel_fbc.c             |  2 +-
> >  drivers/gpu/drm/i915/display/intel_psr.c             | 10 +++++-----
> >  6 files changed, 14 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > index ccaa4cb2809b..2c391714f28e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > @@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct
> > intel_crtc_state *pipe_config,
> >  		drm_printf(&p, "sdp split: %s\n",
> >  			   str_enabled_disabled(pipe_config-
> > >sdp_split_enable));
> >
> > -		drm_printf(&p, "psr: %s, psr2: %s, panel replay: %s, selective
> > fetch: %s\n",
> > -			   str_enabled_disabled(pipe_config->has_psr),
> > -			   str_enabled_disabled(pipe_config->has_psr2),
> > -			   str_enabled_disabled(pipe_config-
> > >has_panel_replay),
> > -			   str_enabled_disabled(pipe_config-
> > >enable_psr2_sel_fetch));
> > +		drm_printf(&p, "psr: %s, selective update: %s, panel replay:
> > %s, selective fetch: %s\n",
> > +			    str_enabled_disabled(pipe_config->has_psr),
> > +			    str_enabled_disabled(pipe_config-
> > >has_sel_update),
> > +			    str_enabled_disabled(pipe_config-
> > >has_panel_replay),
> > +			    str_enabled_disabled(pipe_config-
> > >enable_psr2_sel_fetch));
> 
> During panel-replay has_psr flag also will be true. So will get print as psr
> enabled.
> Something below may give correct info,
>                 if (pipe_config->has_panel_replay)
>                         drm_printf(&p, "psr: disabled, panel replay: enabled");
>                 else
>                         drm_printf(&p, "psr: %s, panel replay: disabled",
>                                              str_enabled_disabled(pipe_config->has_psr));
> 
>                 drm_printf(&p, "selective update: %s, selective fetch: %s\n",
>                                      str_enabled_disabled(pipe_config->has_sel_update),
>                                      str_enabled_disabled(pipe_config-
> >enable_psr2_sel_fetch));
> 
> Regards,
> Animesh
> 
> >  	}
> >
> >  	drm_printf(&p, "framestart delay: %d, MSA timing delay: %d\n", diff
> > --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index f45e5f02096d..c1aba4e8ac54 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5319,7 +5319,7 @@ intel_pipe_config_compare(const struct
> > intel_crtc_state *current_config,
> >  	 */
> >  	if (current_config->has_panel_replay || pipe_config-
> > >has_panel_replay) {
> >  		PIPE_CONF_CHECK_BOOL(has_psr);
> > -		PIPE_CONF_CHECK_BOOL(has_psr2);
> > +		PIPE_CONF_CHECK_BOOL(has_sel_update);
> >  		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
> >  		PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
> >  		PIPE_CONF_CHECK_BOOL(has_panel_replay);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 62f7a30c37dc..6747c10da298 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1189,7 +1189,7 @@ struct intel_crtc_state {
> >
> >  	/* PSR is supported but might not be enabled due the lack of enabled
> > planes */
> >  	bool has_psr;
> > -	bool has_psr2;
> > +	bool has_sel_update;
> >  	bool enable_psr2_sel_fetch;
> >  	bool enable_psr2_su_region_et;
> >  	bool req_psr2_sdp_prior_scanline;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index e05e25cd4a94..a7c406a9695f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2660,7 +2660,7 @@ static void intel_dp_compute_vsc_sdp(struct
> > intel_dp *intel_dp,
> >  	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> >  		intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
> >  						 vsc);
> > -	} else if (crtc_state->has_psr2) {
> > +	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {

has_psr check may not be needed if patch2 of this series is placed at 1st position.

Regards,
Animesh
> >  		/*
> >  		 * [PSR2 without colorimetry]
> >  		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
> diff
> > --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 151dcd0c45b6..984f13d8c0c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1251,7 +1251,7 @@ static int intel_fbc_check_plane(struct
> > intel_atomic_state *state,
> >  	 * Recommendation is to keep this combination disabled
> >  	 * Bspec: 50422 HSD: 14010260002
> >  	 */
> > -	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
> > +	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update) {
> >  		plane_state->no_fbc_reason = "PSR2 enabled";
> >  		return 0;
> >  	}
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index f5b33335a9ae..a2f7d998d342 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp
> *intel_dp,
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >  	u8 dpcd_val = DP_PSR_ENABLE;
> >
> > -	if (crtc_state->has_psr2) {
> > +	if (crtc_state->has_sel_update) {
> >  		/* Enable ALPM at sink for psr2 */
> >  		if (!crtc_state->has_panel_replay) {
> >  			drm_dp_dpcd_writeb(&intel_dp->aux,
> > @@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> >  	if (!crtc_state->has_psr)
> >  		return;
> >
> > -	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
> > +	crtc_state->has_sel_update = intel_psr2_config_valid(intel_dp,
> > +crtc_state);
> >  }
> >
> >  void intel_psr_get_config(struct intel_encoder *encoder, @@ -1672,7
> > +1672,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
> >  		pipe_config->has_psr = true;
> >  	}
> >
> > -	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
> > +	pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
> >  	pipe_config->infoframes.enable |=
> > intel_hdmi_infoframe_enable(DP_SDP_VSC);
> >
> >  	if (!intel_dp->psr.psr2_enabled)
> > @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct
> > intel_dp *intel_dp,
> >
> >  	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> >
> > -	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> > +	intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
> >  	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
> >  	intel_dp->psr.busy_frontbuffer_bits = 0;
> >  	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
> > @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct
> > intel_atomic_state *state,
> >  		needs_to_disable |=
> > intel_crtc_needs_modeset(new_crtc_state);
> >  		needs_to_disable |= !new_crtc_state->has_psr;
> >  		needs_to_disable |= !new_crtc_state->active_planes;
> > -		needs_to_disable |= new_crtc_state->has_psr2 != psr-
> > >psr2_enabled;
> > +		needs_to_disable |= new_crtc_state->has_sel_update !=
> > +psr->psr2_enabled;
> >  		needs_to_disable |= DISPLAY_VER(i915) < 11 &&
> >  			new_crtc_state->wm_level_disabled;
> >
> > --
> > 2.34.1

Re: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update

[Hogander, Jouni]

On Mon, 2024-04-29 at 19:08 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Manna, Animesh
> > Sent: Tuesday, April 30, 2024 12:24 AM
> > To: Hogander, Jouni <jouni.hogander@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Subject: RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> > has_sel_update
> > 
> > 
> > 
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Monday, April 29, 2024 5:38 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> > > <jouni.hogander@intel.com>
> > > Subject: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> > > has_sel_update
> > > 
> > > We are going to reuse has_psr2 for panel_replay as well. Rename
> > > it as
> > > has_sel_update to avoid confusion.
> > > 
> > > v2: Rebase
> > > 
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++-
> > > ----
> > >  drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_display_types.h   |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_dp.c              |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_fbc.c             |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_psr.c             | 10 +++++-
> > > ----
> > >  6 files changed, 14 insertions(+), 14 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > index ccaa4cb2809b..2c391714f28e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > @@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct
> > > intel_crtc_state *pipe_config,
> > >                 drm_printf(&p, "sdp split: %s\n",
> > >                            str_enabled_disabled(pipe_config-
> > > > sdp_split_enable));
> > > 
> > > -               drm_printf(&p, "psr: %s, psr2: %s, panel replay:
> > > %s, selective
> > > fetch: %s\n",
> > > -                          str_enabled_disabled(pipe_config-
> > > >has_psr),
> > > -                          str_enabled_disabled(pipe_config-
> > > >has_psr2),
> > > -                          str_enabled_disabled(pipe_config-
> > > > has_panel_replay),
> > > -                          str_enabled_disabled(pipe_config-
> > > > enable_psr2_sel_fetch));
> > > +               drm_printf(&p, "psr: %s, selective update: %s,
> > > panel replay:
> > > %s, selective fetch: %s\n",
> > > +                           str_enabled_disabled(pipe_config-
> > > >has_psr),
> > > +                           str_enabled_disabled(pipe_config-
> > > > has_sel_update),
> > > +                           str_enabled_disabled(pipe_config-
> > > > has_panel_replay),
> > > +                           str_enabled_disabled(pipe_config-
> > > > enable_psr2_sel_fetch));
> > 
> > During panel-replay has_psr flag also will be true. So will get
> > print as psr
> > enabled.
> > Something below may give correct info,
> >                 if (pipe_config->has_panel_replay)
> >                         drm_printf(&p, "psr: disabled, panel
> > replay: enabled");
> >                 else
> >                         drm_printf(&p, "psr: %s, panel replay:
> > disabled",
> >                                             
> > str_enabled_disabled(pipe_config->has_psr));
> > 
> >                 drm_printf(&p, "selective update: %s, selective
> > fetch: %s\n",
> >                                     
> > str_enabled_disabled(pipe_config->has_sel_update),
> >                                     
> > str_enabled_disabled(pipe_config-
> > > enable_psr2_sel_fetch));
> > 
> > Regards,
> > Animesh
> > 
> > >         }
> > > 
> > >         drm_printf(&p, "framestart delay: %d, MSA timing delay:
> > > %d\n", diff
> > > --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index f45e5f02096d..c1aba4e8ac54 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -5319,7 +5319,7 @@ intel_pipe_config_compare(const struct
> > > intel_crtc_state *current_config,
> > >          */
> > >         if (current_config->has_panel_replay || pipe_config-
> > > > has_panel_replay) {
> > >                 PIPE_CONF_CHECK_BOOL(has_psr);
> > > -               PIPE_CONF_CHECK_BOOL(has_psr2);
> > > +               PIPE_CONF_CHECK_BOOL(has_sel_update);
> > >                 PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
> > >                 PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
> > >                 PIPE_CONF_CHECK_BOOL(has_panel_replay);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index 62f7a30c37dc..6747c10da298 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1189,7 +1189,7 @@ struct intel_crtc_state {
> > > 
> > >         /* PSR is supported but might not be enabled due the lack
> > > of enabled
> > > planes */
> > >         bool has_psr;
> > > -       bool has_psr2;
> > > +       bool has_sel_update;
> > >         bool enable_psr2_sel_fetch;
> > >         bool enable_psr2_su_region_et;
> > >         bool req_psr2_sdp_prior_scanline;
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > > b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index e05e25cd4a94..a7c406a9695f 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -2660,7 +2660,7 @@ static void intel_dp_compute_vsc_sdp(struct
> > > intel_dp *intel_dp,
> > >         if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> > >                 intel_dp_compute_vsc_colorimetry(crtc_state,
> > > conn_state,
> > >                                                  vsc);
> > > -       } else if (crtc_state->has_psr2) {
> > > +       } else if (crtc_state->has_psr && crtc_state-
> > > >has_sel_update) {
> 
> has_psr check may not be needed if patch2 of this series is placed at
> 1st position.

I can drop has_psr check without order change as at this point
selective update is not possible with Panel Replay.

BR,

Jouni Högander

> 
> Regards,
> Animesh
> > >                 /*
> > >                  * [PSR2 without colorimetry]
> > >                  * Prepare VSC Header for SU as per eDP 1.4 spec,
> > > Table 6-11
> > diff
> > > --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 151dcd0c45b6..984f13d8c0c8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -1251,7 +1251,7 @@ static int intel_fbc_check_plane(struct
> > > intel_atomic_state *state,
> > >          * Recommendation is to keep this combination disabled
> > >          * Bspec: 50422 HSD: 14010260002
> > >          */
> > > -       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2)
> > > {
> > > +       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state-
> > > >has_sel_update) {
> > >                 plane_state->no_fbc_reason = "PSR2 enabled";
> > >                 return 0;
> > >         }
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index f5b33335a9ae..a2f7d998d342 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp
> > *intel_dp,
> > >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > >         u8 dpcd_val = DP_PSR_ENABLE;
> > > 
> > > -       if (crtc_state->has_psr2) {
> > > +       if (crtc_state->has_sel_update) {
> > >                 /* Enable ALPM at sink for psr2 */
> > >                 if (!crtc_state->has_panel_replay) {
> > >                         drm_dp_dpcd_writeb(&intel_dp->aux,
> > > @@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct
> > > intel_dp
> > > *intel_dp,
> > >         if (!crtc_state->has_psr)
> > >                 return;
> > > 
> > > -       crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> > > crtc_state);
> > > +       crtc_state->has_sel_update =
> > > intel_psr2_config_valid(intel_dp,
> > > +crtc_state);
> > >  }
> > > 
> > >  void intel_psr_get_config(struct intel_encoder *encoder, @@ -
> > > 1672,7
> > > +1672,7 @@ void intel_psr_get_config(struct intel_encoder
> > > *encoder,
> > >                 pipe_config->has_psr = true;
> > >         }
> > > 
> > > -       pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
> > > +       pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
> > >         pipe_config->infoframes.enable |=
> > > intel_hdmi_infoframe_enable(DP_SDP_VSC);
> > > 
> > >         if (!intel_dp->psr.psr2_enabled)
> > > @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct
> > > intel_dp *intel_dp,
> > > 
> > >         drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> > > 
> > > -       intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> > > +       intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
> > >         intel_dp->psr.panel_replay_enabled = crtc_state-
> > > >has_panel_replay;
> > >         intel_dp->psr.busy_frontbuffer_bits = 0;
> > >         intel_dp->psr.pipe = to_intel_crtc(crtc_state-
> > > >uapi.crtc)->pipe;
> > > @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct
> > > intel_atomic_state *state,
> > >                 needs_to_disable |=
> > > intel_crtc_needs_modeset(new_crtc_state);
> > >                 needs_to_disable |= !new_crtc_state->has_psr;
> > >                 needs_to_disable |= !new_crtc_state-
> > > >active_planes;
> > > -               needs_to_disable |= new_crtc_state->has_psr2 !=
> > > psr-
> > > > psr2_enabled;
> > > +               needs_to_disable |= new_crtc_state-
> > > >has_sel_update !=
> > > +psr->psr2_enabled;
> > >                 needs_to_disable |= DISPLAY_VER(i915) < 11 &&
> > >                         new_crtc_state->wm_level_disabled;
> > > 
> > > --
> > > 2.34.1
> 

Re: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update

[Hogander, Jouni]

On Mon, 2024-04-29 at 18:54 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Monday, April 29, 2024 5:38 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>
> > Subject: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> > has_sel_update
> > 
> > We are going to reuse has_psr2 for panel_replay as well. Rename it
> > as
> > has_sel_update to avoid confusion.
> > 
> > v2: Rebase
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++---
> > --
> >  drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
> >  drivers/gpu/drm/i915/display/intel_display_types.h   |  2 +-
> >  drivers/gpu/drm/i915/display/intel_dp.c              |  2 +-
> >  drivers/gpu/drm/i915/display/intel_fbc.c             |  2 +-
> >  drivers/gpu/drm/i915/display/intel_psr.c             | 10 +++++---
> > --
> >  6 files changed, 14 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > index ccaa4cb2809b..2c391714f28e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > @@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct
> > intel_crtc_state *pipe_config,
> >                 drm_printf(&p, "sdp split: %s\n",
> >                            str_enabled_disabled(pipe_config-
> > > sdp_split_enable));
> > 
> > -               drm_printf(&p, "psr: %s, psr2: %s, panel replay:
> > %s, selective
> > fetch: %s\n",
> > -                          str_enabled_disabled(pipe_config-
> > >has_psr),
> > -                          str_enabled_disabled(pipe_config-
> > >has_psr2),
> > -                          str_enabled_disabled(pipe_config-
> > > has_panel_replay),
> > -                          str_enabled_disabled(pipe_config-
> > > enable_psr2_sel_fetch));
> > +               drm_printf(&p, "psr: %s, selective update: %s,
> > panel replay:
> > %s, selective fetch: %s\n",
> > +                           str_enabled_disabled(pipe_config-
> > >has_psr),
> > +                           str_enabled_disabled(pipe_config-
> > > has_sel_update),
> > +                           str_enabled_disabled(pipe_config-
> > > has_panel_replay),
> > +                           str_enabled_disabled(pipe_config-
> > > enable_psr2_sel_fetch));
> 
> During panel-replay has_psr flag also will be true. So will get print
> as psr enabled.
> Something below may give correct info,
>                 if (pipe_config->has_panel_replay)
>                         drm_printf(&p, "psr: disabled, panel replay:
> enabled");
>                 else
>                         drm_printf(&p, "psr: %s, panel replay:
> disabled",
>                                             
> str_enabled_disabled(pipe_config->has_psr));
> 
>                 drm_printf(&p, "selective update: %s, selective
> fetch: %s\n",
>                                     
> str_enabled_disabled(pipe_config->has_sel_update),
>                                     
> str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));

This is actually not in scope of this patch. Would you mind if we
change this in separate patch not in this set?

BR,

Jouni Högander


> 
> Regards,
> Animesh
> 
> >         }
> > 
> >         drm_printf(&p, "framestart delay: %d, MSA timing delay:
> > %d\n", diff
> > --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index f45e5f02096d..c1aba4e8ac54 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5319,7 +5319,7 @@ intel_pipe_config_compare(const struct
> > intel_crtc_state *current_config,
> >          */
> >         if (current_config->has_panel_replay || pipe_config-
> > > has_panel_replay) {
> >                 PIPE_CONF_CHECK_BOOL(has_psr);
> > -               PIPE_CONF_CHECK_BOOL(has_psr2);
> > +               PIPE_CONF_CHECK_BOOL(has_sel_update);
> >                 PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
> >                 PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
> >                 PIPE_CONF_CHECK_BOOL(has_panel_replay);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 62f7a30c37dc..6747c10da298 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1189,7 +1189,7 @@ struct intel_crtc_state {
> > 
> >         /* PSR is supported but might not be enabled due the lack
> > of enabled
> > planes */
> >         bool has_psr;
> > -       bool has_psr2;
> > +       bool has_sel_update;
> >         bool enable_psr2_sel_fetch;
> >         bool enable_psr2_su_region_et;
> >         bool req_psr2_sdp_prior_scanline;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index e05e25cd4a94..a7c406a9695f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2660,7 +2660,7 @@ static void intel_dp_compute_vsc_sdp(struct
> > intel_dp *intel_dp,
> >         if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> >                 intel_dp_compute_vsc_colorimetry(crtc_state,
> > conn_state,
> >                                                  vsc);
> > -       } else if (crtc_state->has_psr2) {
> > +       } else if (crtc_state->has_psr && crtc_state-
> > >has_sel_update) {
> >                 /*
> >                  * [PSR2 without colorimetry]
> >                  * Prepare VSC Header for SU as per eDP 1.4 spec,
> > Table 6-11
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 151dcd0c45b6..984f13d8c0c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1251,7 +1251,7 @@ static int intel_fbc_check_plane(struct
> > intel_atomic_state *state,
> >          * Recommendation is to keep this combination disabled
> >          * Bspec: 50422 HSD: 14010260002
> >          */
> > -       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
> > +       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state-
> > >has_sel_update) {
> >                 plane_state->no_fbc_reason = "PSR2 enabled";
> >                 return 0;
> >         }
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index f5b33335a9ae..a2f7d998d342 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp
> > *intel_dp,
> >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >         u8 dpcd_val = DP_PSR_ENABLE;
> > 
> > -       if (crtc_state->has_psr2) {
> > +       if (crtc_state->has_sel_update) {
> >                 /* Enable ALPM at sink for psr2 */
> >                 if (!crtc_state->has_panel_replay) {
> >                         drm_dp_dpcd_writeb(&intel_dp->aux,
> > @@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> >         if (!crtc_state->has_psr)
> >                 return;
> > 
> > -       crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> > crtc_state);
> > +       crtc_state->has_sel_update =
> > intel_psr2_config_valid(intel_dp,
> > +crtc_state);
> >  }
> > 
> >  void intel_psr_get_config(struct intel_encoder *encoder, @@ -
> > 1672,7
> > +1672,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
> >                 pipe_config->has_psr = true;
> >         }
> > 
> > -       pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
> > +       pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
> >         pipe_config->infoframes.enable |=
> > intel_hdmi_infoframe_enable(DP_SDP_VSC);
> > 
> >         if (!intel_dp->psr.psr2_enabled)
> > @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct
> > intel_dp
> > *intel_dp,
> > 
> >         drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> > 
> > -       intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> > +       intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
> >         intel_dp->psr.panel_replay_enabled = crtc_state-
> > >has_panel_replay;
> >         intel_dp->psr.busy_frontbuffer_bits = 0;
> >         intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)-
> > >pipe;
> > @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct
> > intel_atomic_state *state,
> >                 needs_to_disable |=
> > intel_crtc_needs_modeset(new_crtc_state);
> >                 needs_to_disable |= !new_crtc_state->has_psr;
> >                 needs_to_disable |= !new_crtc_state->active_planes;
> > -               needs_to_disable |= new_crtc_state->has_psr2 !=
> > psr-
> > > psr2_enabled;
> > +               needs_to_disable |= new_crtc_state->has_sel_update
> > !=
> > +psr->psr2_enabled;
> >                 needs_to_disable |= DISPLAY_VER(i915) < 11 &&
> >                         new_crtc_state->wm_level_disabled;
> > 
> > --
> > 2.34.1
> 

RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Tuesday, April 30, 2024 11:52 AM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> has_sel_update
> 
> On Mon, 2024-04-29 at 18:54 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Monday, April 29, 2024 5:38 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> > > <jouni.hogander@intel.com>
> > > Subject: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> > > has_sel_update
> > >
> > > We are going to reuse has_psr2 for panel_replay as well. Rename it
> > > as
> > > has_sel_update to avoid confusion.
> > >
> > > v2: Rebase
> > >
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++---
> > > --
> > >  drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_display_types.h   |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_dp.c              |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_fbc.c             |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_psr.c             | 10 +++++---
> > > --
> > >  6 files changed, 14 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > index ccaa4cb2809b..2c391714f28e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > > @@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct
> > > intel_crtc_state *pipe_config,
> > >                 drm_printf(&p, "sdp split: %s\n",
> > >                            str_enabled_disabled(pipe_config-
> > > > sdp_split_enable));
> > >
> > > -               drm_printf(&p, "psr: %s, psr2: %s, panel replay:
> > > %s, selective
> > > fetch: %s\n",
> > > -                          str_enabled_disabled(pipe_config-
> > > >has_psr),
> > > -                          str_enabled_disabled(pipe_config-
> > > >has_psr2),
> > > -                          str_enabled_disabled(pipe_config-
> > > > has_panel_replay),
> > > -                          str_enabled_disabled(pipe_config-
> > > > enable_psr2_sel_fetch));
> > > +               drm_printf(&p, "psr: %s, selective update: %s,
> > > panel replay:
> > > %s, selective fetch: %s\n",
> > > +                           str_enabled_disabled(pipe_config-
> > > >has_psr),
> > > +                           str_enabled_disabled(pipe_config-
> > > > has_sel_update),
> > > +                           str_enabled_disabled(pipe_config-
> > > > has_panel_replay),
> > > +                           str_enabled_disabled(pipe_config-
> > > > enable_psr2_sel_fetch));
> >
> > During panel-replay has_psr flag also will be true. So will get print
> > as psr enabled.
> > Something below may give correct info,
> >                 if (pipe_config->has_panel_replay)
> >                         drm_printf(&p, "psr: disabled, panel replay:
> > enabled");
> >                 else
> >                         drm_printf(&p, "psr: %s, panel replay:
> > disabled",
> >
> > str_enabled_disabled(pipe_config->has_psr));
> >
> >                 drm_printf(&p, "selective update: %s, selective
> > fetch: %s\n",
> >
> > str_enabled_disabled(pipe_config->has_sel_update),
> >
> > str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
> 
> This is actually not in scope of this patch. Would you mind if we
> change this in separate patch not in this set?

Yes a separate patch will be good, but need to add in same patch series to adhere to documentation of these psr/pr related flags.

Regards,
Animesh

> 
> BR,
> 
> Jouni Högander
> 
> 
> >
> > Regards,
> > Animesh
> >
> > >         }
> > >
> > >         drm_printf(&p, "framestart delay: %d, MSA timing delay:
> > > %d\n", diff
> > > --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index f45e5f02096d..c1aba4e8ac54 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -5319,7 +5319,7 @@ intel_pipe_config_compare(const struct
> > > intel_crtc_state *current_config,
> > >          */
> > >         if (current_config->has_panel_replay || pipe_config-
> > > > has_panel_replay) {
> > >                 PIPE_CONF_CHECK_BOOL(has_psr);
> > > -               PIPE_CONF_CHECK_BOOL(has_psr2);
> > > +               PIPE_CONF_CHECK_BOOL(has_sel_update);
> > >                 PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
> > >                 PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
> > >                 PIPE_CONF_CHECK_BOOL(has_panel_replay);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index 62f7a30c37dc..6747c10da298 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1189,7 +1189,7 @@ struct intel_crtc_state {
> > >
> > >         /* PSR is supported but might not be enabled due the lack
> > > of enabled
> > > planes */
> > >         bool has_psr;
> > > -       bool has_psr2;
> > > +       bool has_sel_update;
> > >         bool enable_psr2_sel_fetch;
> > >         bool enable_psr2_su_region_et;
> > >         bool req_psr2_sdp_prior_scanline;
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > > b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index e05e25cd4a94..a7c406a9695f 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -2660,7 +2660,7 @@ static void intel_dp_compute_vsc_sdp(struct
> > > intel_dp *intel_dp,
> > >         if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> > >                 intel_dp_compute_vsc_colorimetry(crtc_state,
> > > conn_state,
> > >                                                  vsc);
> > > -       } else if (crtc_state->has_psr2) {
> > > +       } else if (crtc_state->has_psr && crtc_state-
> > > >has_sel_update) {
> > >                 /*
> > >                  * [PSR2 without colorimetry]
> > >                  * Prepare VSC Header for SU as per eDP 1.4 spec,
> > > Table 6-11
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 151dcd0c45b6..984f13d8c0c8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -1251,7 +1251,7 @@ static int intel_fbc_check_plane(struct
> > > intel_atomic_state *state,
> > >          * Recommendation is to keep this combination disabled
> > >          * Bspec: 50422 HSD: 14010260002
> > >          */
> > > -       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
> > > +       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state-
> > > >has_sel_update) {
> > >                 plane_state->no_fbc_reason = "PSR2 enabled";
> > >                 return 0;
> > >         }
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index f5b33335a9ae..a2f7d998d342 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp
> > > *intel_dp,
> > >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > >         u8 dpcd_val = DP_PSR_ENABLE;
> > >
> > > -       if (crtc_state->has_psr2) {
> > > +       if (crtc_state->has_sel_update) {
> > >                 /* Enable ALPM at sink for psr2 */
> > >                 if (!crtc_state->has_panel_replay) {
> > >                         drm_dp_dpcd_writeb(&intel_dp->aux,
> > > @@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct intel_dp
> > > *intel_dp,
> > >         if (!crtc_state->has_psr)
> > >                 return;
> > >
> > > -       crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> > > crtc_state);
> > > +       crtc_state->has_sel_update =
> > > intel_psr2_config_valid(intel_dp,
> > > +crtc_state);
> > >  }
> > >
> > >  void intel_psr_get_config(struct intel_encoder *encoder, @@ -
> > > 1672,7
> > > +1672,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
> > >                 pipe_config->has_psr = true;
> > >         }
> > >
> > > -       pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
> > > +       pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
> > >         pipe_config->infoframes.enable |=
> > > intel_hdmi_infoframe_enable(DP_SDP_VSC);
> > >
> > >         if (!intel_dp->psr.psr2_enabled)
> > > @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct
> > > intel_dp
> > > *intel_dp,
> > >
> > >         drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> > >
> > > -       intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> > > +       intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
> > >         intel_dp->psr.panel_replay_enabled = crtc_state-
> > > >has_panel_replay;
> > >         intel_dp->psr.busy_frontbuffer_bits = 0;
> > >         intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)-
> > > >pipe;
> > > @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct
> > > intel_atomic_state *state,
> > >                 needs_to_disable |=
> > > intel_crtc_needs_modeset(new_crtc_state);
> > >                 needs_to_disable |= !new_crtc_state->has_psr;
> > >                 needs_to_disable |= !new_crtc_state->active_planes;
> > > -               needs_to_disable |= new_crtc_state->has_psr2 !=
> > > psr-
> > > > psr2_enabled;
> > > +               needs_to_disable |= new_crtc_state->has_sel_update
> > > !=
> > > +psr->psr2_enabled;
> > >                 needs_to_disable |= DISPLAY_VER(i915) < 11 &&
> > >                         new_crtc_state->wm_level_disabled;
> > >
> > > --
> > > 2.34.1
> >

[PATCH v8 02/11] drm/i915/dp: Use always vsc revision 0x6 for Panel Replay

[Jouni Högander]

We are about to enable Panel Replay Selective update mode. Vsc revision 0x6
for Panel Replay no matter if it is selective update or full frame update
mode. Take this into account when preparing VSC SDP package.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a7c406a9695f..313e7c25b25f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2660,14 +2660,6 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
 		intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
 						 vsc);
-	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {
-		/*
-		 * [PSR2 without colorimetry]
-		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
-		 * 3D stereo + PSR/PSR2 + Y-coordinate.
-		 */
-		vsc->revision = 0x4;
-		vsc->length = 0xe;
 	} else if (crtc_state->has_panel_replay) {
 		/*
 		 * [Panel Replay without colorimetry info]
@@ -2676,6 +2668,14 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 		 */
 		vsc->revision = 0x6;
 		vsc->length = 0x10;
+	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {
+		/*
+		 * [PSR2 without colorimetry]
+		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
+		 * 3D stereo + PSR/PSR2 + Y-coordinate.
+		 */
+		vsc->revision = 0x4;
+		vsc->length = 0xe;
 	} else {
 		/*
 		 * [PSR1]
-- 
2.34.1

[PATCH v8 03/11] drm/i915/psr: Rename psr2_enabled as sel_update_enabled

[Jouni Högander]

We are about to reuse psr2_enabled for panel replay as well. Rename
it as sel_update_enabled to avoid confusion.

v3: Rebase
v2: Rebase

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c      | 52 +++++++++----------
 2 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 6747c10da298..150e6c8e0320 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1695,7 +1695,7 @@ struct intel_psr {
 	unsigned int busy_frontbuffer_bits;
 	bool sink_psr2_support;
 	bool link_standby;
-	bool psr2_enabled;
+	bool sel_update_enabled;
 	bool psr2_sel_fetch_enabled;
 	bool psr2_sel_fetch_cff_enabled;
 	bool req_psr2_sdp_prior_scanline;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a2f7d998d342..af18728460c9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -356,12 +356,12 @@ static void psr_irq_control(struct intel_dp *intel_dp)
 }
 
 static void psr_event_print(struct drm_i915_private *i915,
-			    u32 val, bool psr2_enabled)
+			    u32 val, bool sel_update_enabled)
 {
 	drm_dbg_kms(&i915->drm, "PSR exit events: 0x%x\n", val);
 	if (val & PSR_EVENT_PSR2_WD_TIMER_EXPIRE)
 		drm_dbg_kms(&i915->drm, "\tPSR2 watchdog timer expired\n");
-	if ((val & PSR_EVENT_PSR2_DISABLED) && psr2_enabled)
+	if ((val & PSR_EVENT_PSR2_DISABLED) && sel_update_enabled)
 		drm_dbg_kms(&i915->drm, "\tPSR2 disabled\n");
 	if (val & PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN)
 		drm_dbg_kms(&i915->drm, "\tSU dirty FIFO underrun\n");
@@ -389,7 +389,7 @@ static void psr_event_print(struct drm_i915_private *i915,
 		drm_dbg_kms(&i915->drm, "\tVBI enabled\n");
 	if (val & PSR_EVENT_LPSP_MODE_EXIT)
 		drm_dbg_kms(&i915->drm, "\tLPSP mode exited\n");
-	if ((val & PSR_EVENT_PSR_DISABLE) && !psr2_enabled)
+	if ((val & PSR_EVENT_PSR_DISABLE) && !sel_update_enabled)
 		drm_dbg_kms(&i915->drm, "\tPSR disabled\n");
 }
 
@@ -417,7 +417,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
 
 			val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder), 0, 0);
 
-			psr_event_print(dev_priv, val, intel_dp->psr.psr2_enabled);
+			psr_event_print(dev_priv, val, intel_dp->psr.sel_update_enabled);
 		}
 	}
 
@@ -1672,10 +1672,10 @@ void intel_psr_get_config(struct intel_encoder *encoder,
 		pipe_config->has_psr = true;
 	}
 
-	pipe_config->has_sel_update = intel_dp->psr.psr2_enabled;
+	pipe_config->has_sel_update = intel_dp->psr.sel_update_enabled;
 	pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
 
-	if (!intel_dp->psr.psr2_enabled)
+	if (!intel_dp->psr.sel_update_enabled)
 		goto unlock;
 
 	if (HAS_PSR2_SEL_FETCH(dev_priv)) {
@@ -1711,7 +1711,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
 	/* psr1, psr2 and panel-replay are mutually exclusive.*/
 	if (intel_dp->psr.panel_replay_enabled)
 		dg2_activate_panel_replay(intel_dp);
-	else if (intel_dp->psr.psr2_enabled)
+	else if (intel_dp->psr.sel_update_enabled)
 		hsw_activate_psr2(intel_dp);
 	else
 		hsw_activate_psr1(intel_dp);
@@ -1770,7 +1770,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
 	struct intel_psr *psr = &intel_dp->psr;
 	u32 alpm_ctl;
 
-	if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.psr2_enabled &&
+	if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled &&
 					   !intel_dp_is_edp(intel_dp)))
 		return;
 
@@ -1894,7 +1894,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 	 */
 	wm_optimization_wa(intel_dp, crtc_state);
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.sel_update_enabled) {
 		if (DISPLAY_VER(dev_priv) == 9)
 			intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
 				     PSR2_VSC_ENABLE_PROG_HEADER |
@@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 
 	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
 
-	intel_dp->psr.psr2_enabled = crtc_state->has_sel_update;
+	intel_dp->psr.sel_update_enabled = crtc_state->has_sel_update;
 	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
 	intel_dp->psr.busy_frontbuffer_bits = 0;
 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
@@ -1981,7 +1981,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
 	} else {
 		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
-			    intel_dp->psr.psr2_enabled ? "2" : "1");
+			    intel_dp->psr.sel_update_enabled ? "2" : "1");
 
 		/*
 		 * Panel replay has to be enabled before link training: doing it
@@ -2021,7 +2021,7 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
 	if (intel_dp->psr.panel_replay_enabled) {
 		intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder),
 			     TRANS_DP2_PANEL_REPLAY_ENABLE, 0);
-	} else if (intel_dp->psr.psr2_enabled) {
+	} else if (intel_dp->psr.sel_update_enabled) {
 		tgl_disallow_dc3co_on_psr2_exit(intel_dp);
 
 		val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
@@ -2044,7 +2044,7 @@ static void intel_psr_wait_exit_locked(struct intel_dp *intel_dp)
 	i915_reg_t psr_status;
 	u32 psr_status_mask;
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.sel_update_enabled) {
 		psr_status = EDP_PSR2_STATUS(cpu_transcoder);
 		psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;
 	} else {
@@ -2072,7 +2072,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 		drm_dbg_kms(&dev_priv->drm, "Disabling Panel Replay\n");
 	else
 		drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
-			    intel_dp->psr.psr2_enabled ? "2" : "1");
+			    intel_dp->psr.sel_update_enabled ? "2" : "1");
 
 	intel_psr_exit(intel_dp);
 	intel_psr_wait_exit_locked(intel_dp);
@@ -2085,7 +2085,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,
 			     wa_16013835468_bit_get(intel_dp), 0);
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.sel_update_enabled) {
 		/* Wa_16012604467:adlp,mtl[a0,b0] */
 		if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
 			intel_de_rmw(dev_priv,
@@ -2114,12 +2114,12 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 			   intel_psr_get_enable_sink_offset(intel_dp), 0);
 
 	if (!intel_dp->psr.panel_replay_enabled &&
-	    intel_dp->psr.psr2_enabled)
+	    intel_dp->psr.sel_update_enabled)
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, 0);
 
 	intel_dp->psr.enabled = false;
 	intel_dp->psr.panel_replay_enabled = false;
-	intel_dp->psr.psr2_enabled = false;
+	intel_dp->psr.sel_update_enabled = false;
 	intel_dp->psr.psr2_sel_fetch_enabled = false;
 	intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
 }
@@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state,
 		needs_to_disable |= intel_crtc_needs_modeset(new_crtc_state);
 		needs_to_disable |= !new_crtc_state->has_psr;
 		needs_to_disable |= !new_crtc_state->active_planes;
-		needs_to_disable |= new_crtc_state->has_sel_update != psr->psr2_enabled;
+		needs_to_disable |= new_crtc_state->has_sel_update != psr->sel_update_enabled;
 		needs_to_disable |= DISPLAY_VER(i915) < 11 &&
 			new_crtc_state->wm_level_disabled;
 
@@ -2806,7 +2806,7 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat
 		if (!intel_dp->psr.enabled)
 			continue;
 
-		if (intel_dp->psr.psr2_enabled)
+		if (intel_dp->psr.sel_update_enabled)
 			ret = _psr2_ready_for_pipe_update_locked(intel_dp);
 		else
 			ret = _psr1_ready_for_pipe_update_locked(intel_dp);
@@ -2827,7 +2827,7 @@ static bool __psr_wait_for_idle_locked(struct intel_dp *intel_dp)
 	if (!intel_dp->psr.enabled)
 		return false;
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.sel_update_enabled) {
 		reg = EDP_PSR2_STATUS(cpu_transcoder);
 		mask = EDP_PSR2_STATUS_STATE_MASK;
 	} else {
@@ -3068,7 +3068,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
-	if (!intel_dp->psr.dc3co_exitline || !intel_dp->psr.psr2_enabled ||
+	if (!intel_dp->psr.dc3co_exitline || !intel_dp->psr.sel_update_enabled ||
 	    !intel_dp->psr.active)
 		return;
 
@@ -3266,7 +3266,7 @@ static void psr_alpm_check(struct intel_dp *intel_dp)
 	u8 val;
 	int r;
 
-	if (!psr->psr2_enabled)
+	if (!psr->sel_update_enabled)
 		return;
 
 	r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val);
@@ -3446,7 +3446,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file *m)
 	const char *status = "unknown";
 	u32 val, status_val;
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.sel_update_enabled) {
 		static const char * const live_status[] = {
 			"IDLE",
 			"CAPTURE",
@@ -3510,7 +3510,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	if (psr->panel_replay_enabled)
 		status = "Panel Replay Enabled";
 	else if (psr->enabled)
-		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
+		status = psr->sel_update_enabled ? "PSR2 enabled" : "PSR1 enabled";
 	else
 		status = "disabled";
 	seq_printf(m, "PSR mode: %s\n", status);
@@ -3525,7 +3525,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	if (psr->panel_replay_enabled) {
 		val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
 		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
-	} else if (psr->psr2_enabled) {
+	} else if (psr->sel_update_enabled) {
 		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
 		enabled = val & EDP_PSR2_ENABLE;
 	} else {
@@ -3551,7 +3551,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 		seq_printf(m, "Last exit at: %lld\n", psr->last_exit);
 	}
 
-	if (psr->psr2_enabled) {
+	if (psr->sel_update_enabled) {
 		u32 su_frames_val[3];
 		int frame;
 
-- 
2.34.1

[PATCH v8 04/11] drm/panelreplay: dpcd register definition for panelreplay SU

[Jouni Högander]

Add definitions for panel replay selective update

v2: Remove unnecessary Cc from commit message

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
---
 include/drm/display/drm_dp.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 0b032faa8cf2..906949ca3cee 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -548,6 +548,12 @@
 # define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
 # define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
 
+#define DP_PANEL_PANEL_REPLAY_CAPABILITY		0xb1
+# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
+
+#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY		0xb2
+#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY		0xb4
+
 /* Link Configuration */
 #define	DP_LINK_BW_SET		            0x100
 # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
-- 
2.34.1

[PATCH v8 05/11] drm/i915/psr: Detect panel replay selective update support

[Jouni Högander]

Add new boolean to store panel replay selective update support of sink into
intel_psr struct.  Detect panel replay selective update support and store
it into this new boolean.

v3: Clear sink_panel_replay_su_support in intel_dp_detect
v2: Merge adding new boolean into this patch

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c            |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c           | 10 ++++++++--
 3 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 150e6c8e0320..a693728f8344 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1719,6 +1719,7 @@ struct intel_psr {
 	u16 su_y_granularity;
 	bool source_panel_replay_support;
 	bool sink_panel_replay_support;
+	bool sink_panel_replay_su_support;
 	bool panel_replay_enabled;
 	u32 dc3co_exitline;
 	u32 dc3co_exit_delay;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 313e7c25b25f..6f72896b7197 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5858,6 +5858,7 @@ intel_dp_detect(struct drm_connector *connector,
 		memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
 		memset(intel_connector->dp.dsc_dpcd, 0, sizeof(intel_connector->dp.dsc_dpcd));
 		intel_dp->psr.sink_panel_replay_support = false;
+		intel_dp->psr.sink_panel_replay_su_support = false;
 
 		intel_dp_mst_disconnect(intel_dp);
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index af18728460c9..b94f8e33ed1f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -520,9 +520,15 @@ static void _panel_replay_init_dpcd(struct intel_dp *intel_dp)
 		return;
 	}
 
-	drm_dbg_kms(&i915->drm,
-		    "Panel replay is supported by panel\n");
 	intel_dp->psr.sink_panel_replay_support = true;
+
+	if (pr_dpcd & DP_PANEL_REPLAY_SU_SUPPORT)
+		intel_dp->psr.sink_panel_replay_su_support = true;
+
+	drm_dbg_kms(&i915->drm,
+		    "Panel replay %sis supported by panel\n",
+		    intel_dp->psr.sink_panel_replay_su_support ?
+		    "selective_update " : "");
 }
 
 static void _psr_init_dpcd(struct intel_dp *intel_dp)
-- 
2.34.1

[PATCH v8 06/11] drm/i915/psr: Modify intel_dp_get_su_granularity to support panel replay

[Jouni Högander]

Currently intel_dp_get_su_granularity doesn't support panel replay.
This fix modifies it to support panel replay as well.

v3: use correct offset for DP_PANEL_PANEL_REPLAY_CAPABILITY
v2: rely on PSR definitions on common bits

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 62 +++++++++++++++++++++---
 1 file changed, 55 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b94f8e33ed1f..807423db3a13 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -466,6 +466,40 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp)
 	return val;
 }
 
+static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp)
+{
+	u8 su_capability;
+
+	if (intel_dp->psr.sink_panel_replay_su_support)
+		drm_dp_dpcd_read(&intel_dp->aux,
+				 DP_PANEL_PANEL_REPLAY_CAPABILITY,
+				 &su_capability, 1);
+	else
+		su_capability = intel_dp->psr_dpcd[1];
+
+	return su_capability;
+}
+
+static unsigned int
+intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp)
+{
+	return intel_dp->psr.sink_panel_replay_su_support ?
+		DP_PANEL_PANEL_REPLAY_X_GRANULARITY :
+		DP_PSR2_SU_X_GRANULARITY;
+}
+
+static unsigned int
+intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp)
+{
+	return intel_dp->psr.sink_panel_replay_su_support ?
+		DP_PANEL_PANEL_REPLAY_Y_GRANULARITY :
+		DP_PSR2_SU_Y_GRANULARITY;
+}
+
+/*
+ * Note: Bits related to granularity are same in panel replay and psr
+ * registers. Rely on PSR definitions on these "common" bits.
+ */
 static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
@@ -473,18 +507,29 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 	u16 w;
 	u8 y;
 
-	/* If sink don't have specific granularity requirements set legacy ones */
-	if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED)) {
+	/*
+	 * TODO: Do we need to take into account panel supporting both PSR and
+	 * Panel replay?
+	 */
+
+	/*
+	 * If sink don't have specific granularity requirements set legacy
+	 * ones.
+	 */
+	if (!(intel_dp_get_su_capability(intel_dp) &
+	      DP_PSR2_SU_GRANULARITY_REQUIRED)) {
 		/* As PSR2 HW sends full lines, we do not care about x granularity */
 		w = 4;
 		y = 4;
 		goto exit;
 	}
 
-	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &w, 2);
+	r = drm_dp_dpcd_read(&intel_dp->aux,
+			     intel_dp_get_su_x_granularity_offset(intel_dp),
+			     &w, 2);
 	if (r != 2)
 		drm_dbg_kms(&i915->drm,
-			    "Unable to read DP_PSR2_SU_X_GRANULARITY\n");
+			    "Unable to read selective update x granularity\n");
 	/*
 	 * Spec says that if the value read is 0 the default granularity should
 	 * be used instead.
@@ -492,10 +537,12 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 	if (r != 2 || w == 0)
 		w = 4;
 
-	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY, &y, 1);
+	r = drm_dp_dpcd_read(&intel_dp->aux,
+			     intel_dp_get_su_y_granularity_offset(intel_dp),
+			     &y, 1);
 	if (r != 1) {
 		drm_dbg_kms(&i915->drm,
-			    "Unable to read DP_PSR2_SU_Y_GRANULARITY\n");
+			    "Unable to read selective update y granularity\n");
 		y = 4;
 	}
 	if (y == 0)
@@ -588,7 +635,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 	if (intel_dp->psr_dpcd[0])
 		_psr_init_dpcd(intel_dp);
 
-	if (intel_dp->psr.sink_psr2_support)
+	if (intel_dp->psr.sink_psr2_support ||
+	    intel_dp->psr.sink_panel_replay_su_support)
 		intel_dp_get_su_granularity(intel_dp);
 }
 
-- 
2.34.1

RE: [PATCH v8 06/11] drm/i915/psr: Modify intel_dp_get_su_granularity to support panel replay

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Monday, April 29, 2024 5:38 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: [PATCH v8 06/11] drm/i915/psr: Modify intel_dp_get_su_granularity
> to support panel replay
> 
> Currently intel_dp_get_su_granularity doesn't support panel replay.
> This fix modifies it to support panel replay as well.
> 
> v3: use correct offset for DP_PANEL_PANEL_REPLAY_CAPABILITY
> v2: rely on PSR definitions on common bits
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 62 +++++++++++++++++++++---
>  1 file changed, 55 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index b94f8e33ed1f..807423db3a13 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -466,6 +466,40 @@ static u8 intel_dp_get_sink_sync_latency(struct
> intel_dp *intel_dp)
>  	return val;
>  }
> 
> +static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp) {
> +	u8 su_capability;
> +
> +	if (intel_dp->psr.sink_panel_replay_su_support)
> +		drm_dp_dpcd_read(&intel_dp->aux,
> +				 DP_PANEL_PANEL_REPLAY_CAPABILITY,
> +				 &su_capability, 1);

drm_dp_dpcd_readb() can be used here, otherwise looks good to me.

Regards,
Animesh

> +	else
> +		su_capability = intel_dp->psr_dpcd[1];
> +
> +	return su_capability;
> +}
> +
> +static unsigned int
> +intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp) {
> +	return intel_dp->psr.sink_panel_replay_su_support ?
> +		DP_PANEL_PANEL_REPLAY_X_GRANULARITY :
> +		DP_PSR2_SU_X_GRANULARITY;
> +}
> +
> +static unsigned int
> +intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp) {
> +	return intel_dp->psr.sink_panel_replay_su_support ?
> +		DP_PANEL_PANEL_REPLAY_Y_GRANULARITY :
> +		DP_PSR2_SU_Y_GRANULARITY;
> +}
> +
> +/*
> + * Note: Bits related to granularity are same in panel replay and psr
> + * registers. Rely on PSR definitions on these "common" bits.
> + */
>  static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -473,18
> +507,29 @@ static void intel_dp_get_su_granularity(struct intel_dp
> *intel_dp)
>  	u16 w;
>  	u8 y;
> 
> -	/* If sink don't have specific granularity requirements set legacy ones
> */
> -	if (!(intel_dp->psr_dpcd[1] &
> DP_PSR2_SU_GRANULARITY_REQUIRED)) {
> +	/*
> +	 * TODO: Do we need to take into account panel supporting both PSR
> and
> +	 * Panel replay?
> +	 */
> +
> +	/*
> +	 * If sink don't have specific granularity requirements set legacy
> +	 * ones.
> +	 */
> +	if (!(intel_dp_get_su_capability(intel_dp) &
> +	      DP_PSR2_SU_GRANULARITY_REQUIRED)) {
>  		/* As PSR2 HW sends full lines, we do not care about x
> granularity */
>  		w = 4;
>  		y = 4;
>  		goto exit;
>  	}
> 
> -	r = drm_dp_dpcd_read(&intel_dp->aux,
> DP_PSR2_SU_X_GRANULARITY, &w, 2);
> +	r = drm_dp_dpcd_read(&intel_dp->aux,
> +			     intel_dp_get_su_x_granularity_offset(intel_dp),
> +			     &w, 2);
>  	if (r != 2)
>  		drm_dbg_kms(&i915->drm,
> -			    "Unable to read
> DP_PSR2_SU_X_GRANULARITY\n");
> +			    "Unable to read selective update x granularity\n");
>  	/*
>  	 * Spec says that if the value read is 0 the default granularity should
>  	 * be used instead.
> @@ -492,10 +537,12 @@ static void intel_dp_get_su_granularity(struct
> intel_dp *intel_dp)
>  	if (r != 2 || w == 0)
>  		w = 4;
> 
> -	r = drm_dp_dpcd_read(&intel_dp->aux,
> DP_PSR2_SU_Y_GRANULARITY, &y, 1);
> +	r = drm_dp_dpcd_read(&intel_dp->aux,
> +			     intel_dp_get_su_y_granularity_offset(intel_dp),
> +			     &y, 1);
>  	if (r != 1) {
>  		drm_dbg_kms(&i915->drm,
> -			    "Unable to read
> DP_PSR2_SU_Y_GRANULARITY\n");
> +			    "Unable to read selective update y granularity\n");
>  		y = 4;
>  	}
>  	if (y == 0)
> @@ -588,7 +635,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
>  	if (intel_dp->psr_dpcd[0])
>  		_psr_init_dpcd(intel_dp);
> 
> -	if (intel_dp->psr.sink_psr2_support)
> +	if (intel_dp->psr.sink_psr2_support ||
> +	    intel_dp->psr.sink_panel_replay_su_support)
>  		intel_dp_get_su_granularity(intel_dp);
>  }
> 
> --
> 2.34.1

[PATCH v8 07/11] drm/i915/psr: Panel replay uses SRD_STATUS to track it's status

[Jouni Högander]

DP Panel replay uses SRD_STATUS to track it's status despite selective
update mode.

Bspec: 53370, 68920

v3:
  - do not use PSR2_STATUS for PSR1
v2:
  - use intel_dp_is_edp to differentiate
  - modify debugfs status as well

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 807423db3a13..f1b7d17f7b27 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2860,7 +2860,8 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat
 		if (!intel_dp->psr.enabled)
 			continue;
 
-		if (intel_dp->psr.sel_update_enabled)
+		if (intel_dp_is_edp(intel_dp) &&
+		    intel_dp->psr.sel_update_enabled)
 			ret = _psr2_ready_for_pipe_update_locked(intel_dp);
 		else
 			ret = _psr1_ready_for_pipe_update_locked(intel_dp);
@@ -2881,7 +2882,8 @@ static bool __psr_wait_for_idle_locked(struct intel_dp *intel_dp)
 	if (!intel_dp->psr.enabled)
 		return false;
 
-	if (intel_dp->psr.sel_update_enabled) {
+	if (!intel_dp->psr.panel_replay_enabled &&
+	    intel_dp->psr.sel_update_enabled) {
 		reg = EDP_PSR2_STATUS(cpu_transcoder);
 		mask = EDP_PSR2_STATUS_STATE_MASK;
 	} else {
@@ -3500,7 +3502,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file *m)
 	const char *status = "unknown";
 	u32 val, status_val;
 
-	if (intel_dp->psr.sel_update_enabled) {
+	if (intel_dp_is_edp(intel_dp) && intel_dp->psr.sel_update_enabled) {
 		static const char * const live_status[] = {
 			"IDLE",
 			"CAPTURE",
-- 
2.34.1

[PATCH v8 08/11] drm/i915/psr: Do not apply workarounds in case of panel replay

[Jouni Högander]

There are some workarounds that are not applicable for panel replay. Do not
apply these if panel replay is used.

Bspec: 66624, 50422

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c  |  5 +++--
 drivers/gpu/drm/i915/display/intel_hdmi.c |  3 ++-
 drivers/gpu/drm/i915/display/intel_psr.c  | 16 ++++++++++------
 3 files changed, 15 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 984f13d8c0c8..50dd8eb9012e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1251,7 +1251,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 	 * Recommendation is to keep this combination disabled
 	 * Bspec: 50422 HSD: 14010260002
 	 */
-	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update) {
+	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update &&
+	    !crtc_state->has_panel_replay) {
 		plane_state->no_fbc_reason = "PSR2 enabled";
 		return 0;
 	}
@@ -1259,7 +1260,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 	/* Wa_14016291713 */
 	if ((IS_DISPLAY_VER(i915, 12, 13) ||
 	     IS_DISPLAY_IP_STEP(i915, IP_VER(14, 0), STEP_A0, STEP_C0)) &&
-	    crtc_state->has_psr) {
+	    crtc_state->has_psr && !crtc_state->has_panel_replay) {
 		plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
 		return 0;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 5f6deceaf8ba..0faf2afa1c09 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -532,7 +532,8 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
 			       0);
 
 	/* Wa_14013475917 */
-	if (!(IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC))
+	if (!(IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr &&
+	      !crtc_state->has_panel_replay && type == DP_SDP_VSC))
 		val |= hsw_infoframe_enable(type);
 
 	if (type == DP_SDP_VSC)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f1b7d17f7b27..ad97d58decb6 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1959,13 +1959,15 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 		 * All supported adlp panels have 1-based X granularity, this may
 		 * cause issues if non-supported panels are used.
 		 */
-		if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) ||
-		    IS_ALDERLAKE_P(dev_priv))
+		if (!intel_dp->psr.panel_replay_enabled &&
+		    (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) ||
+		     IS_ALDERLAKE_P(dev_priv)))
 			intel_de_rmw(dev_priv, hsw_chicken_trans_reg(dev_priv, cpu_transcoder),
 				     0, ADLP_1_BASED_X_GRANULARITY);
 
 		/* Wa_16012604467:adlp,mtl[a0,b0] */
-		if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
+		if (!intel_dp->psr.panel_replay_enabled &&
+		    IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
 			intel_de_rmw(dev_priv,
 				     MTL_CLKGATE_DIS_TRANS(cpu_transcoder), 0,
 				     MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS);
@@ -2141,7 +2143,8 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 
 	if (intel_dp->psr.sel_update_enabled) {
 		/* Wa_16012604467:adlp,mtl[a0,b0] */
-		if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
+		if (!intel_dp->psr.panel_replay_enabled &&
+		    IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0))
 			intel_de_rmw(dev_priv,
 				     MTL_CLKGATE_DIS_TRANS(cpu_transcoder),
 				     MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS, 0);
@@ -2627,8 +2630,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 		goto skip_sel_fetch_set_loop;
 
 	/* Wa_14014971492 */
-	if ((IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) ||
-	     IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv)) &&
+	if (!crtc_state->has_panel_replay &&
+	    ((IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) ||
+	      IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv))) &&
 	    crtc_state->splitter.enable)
 		crtc_state->psr2_su_area.y1 = 0;
 
-- 
2.34.1

[PATCH v8 09/11] drm/i915/psr: Update PSR module parameter descriptions

[Jouni Högander]

We are re-using PSR module parameters for panel replay. Update module
parameter descriptions with panel replay information:

enable_psr:

-1 (default) == follow what is in VBT
0 == disable PSR/PR
1 == Allow PSR1 and PR full frame update
2 == allow PSR1/PSR2 and PR Selective Update

enable_psr2_sel_fetch

0 == disable selective fetch for PSR and PR
1 (default) == allow selective fetch for PSR PR

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_params.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 1799a6643128..aebdb7b59dbf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -106,7 +106,8 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
 
 intel_display_param_named_unsafe(enable_psr, int, 0400,
 	"Enable PSR "
-	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
+	"(0=disabled, 1=enable up to PSR1 and Panel Replay full frame update, "
+	"2=enable up to PSR2 and Panel Replay Selective Update) "
 	"Default: -1 (use per-chip default)");
 
 intel_display_param_named(psr_safest_params, bool, 0400,
@@ -116,7 +117,7 @@ intel_display_param_named(psr_safest_params, bool, 0400,
 	"Default: 0");
 
 intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
-	"Enable PSR2 selective fetch "
+	"Enable PSR2 and Panel Replay selective fetch "
 	"(0=disabled, 1=enabled) "
 	"Default: 1");
 
-- 
2.34.1

[PATCH v8 10/11] drm/i915/psr: Split intel_psr2_config_valid for panel replay

[Jouni Högander]

Part of intel_psr2_config_valid is valid for panel replay. rename it as
intel_sel_update_config_valid. Split psr2 specific part and name it as
intel_psr2_config_valid.

v3:
  - move early transport check to psr2 specific check
  - check intel_psr2_config_valid only for non-Panel Replay case
v2:
  - use psr2_global_enabled for panel replay as well
  - goto unsupported instead of return when global enabled check fails

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 76 ++++++++++++++----------
 1 file changed, 46 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ad97d58decb6..3197491349cc 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1142,9 +1142,6 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (psr2_su_region_et_valid(intel_dp))
-		crtc_state->enable_psr2_su_region_et = true;
-
 	return crtc_state->enable_psr2_sel_fetch = true;
 }
 
@@ -1515,11 +1512,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!psr2_global_enabled(intel_dp)) {
-		drm_dbg_kms(&dev_priv->drm, "PSR2 disabled by flag\n");
-		return false;
-	}
-
 	/*
 	 * DSC and PSR2 cannot be enabled simultaneously. If a requested
 	 * resolution requires DSC to be enabled, priority is given to DSC
@@ -1532,12 +1524,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (crtc_state->crc_enabled) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR2 not enabled because it would inhibit pipe CRC calculation\n");
-		return false;
-	}
-
 	if (DISPLAY_VER(dev_priv) >= 12) {
 		psr_max_h = 5120;
 		psr_max_v = 3200;
@@ -1588,30 +1574,60 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (HAS_PSR2_SEL_FETCH(dev_priv)) {
-		if (!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) &&
-		    !HAS_PSR_HW_TRACKING(dev_priv)) {
-			drm_dbg_kms(&dev_priv->drm,
-				    "PSR2 not enabled, selective fetch not valid and no HW tracking available\n");
-			return false;
-		}
-	}
-
-	if (!psr2_granularity_check(intel_dp, crtc_state)) {
-		drm_dbg_kms(&dev_priv->drm, "PSR2 not enabled, SU granularity not compatible\n");
-		goto unsupported;
-	}
-
 	if (!crtc_state->enable_psr2_sel_fetch &&
 	    (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "PSR2 not enabled, resolution %dx%d > max supported %dx%d\n",
 			    crtc_hdisplay, crtc_vdisplay,
 			    psr_max_h, psr_max_v);
-		goto unsupported;
+		return false;
 	}
 
 	tgl_dc3co_exitline_compute_config(intel_dp, crtc_state);
+
+	if (psr2_su_region_et_valid(intel_dp))
+		crtc_state->enable_psr2_su_region_et = true;
+
+	return true;
+}
+
+static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
+					  struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	if (HAS_PSR2_SEL_FETCH(dev_priv) &&
+	    !intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) &&
+	    !HAS_PSR_HW_TRACKING(dev_priv)) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "Selective update not enabled, selective fetch not valid and no HW tracking available\n");
+		goto unsupported;
+	}
+
+	if (!psr2_global_enabled(intel_dp)) {
+		drm_dbg_kms(&dev_priv->drm, "Selective update disabled by flag\n");
+		goto unsupported;
+	}
+
+	if (!crtc_state->has_panel_replay && !intel_psr2_config_valid(intel_dp, crtc_state))
+		goto unsupported;
+
+	if (crtc_state->has_panel_replay && (DISPLAY_VER(dev_priv) < 14 ||
+					     !intel_dp->psr.sink_panel_replay_su_support))
+		goto unsupported;
+
+	if (crtc_state->crc_enabled) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "Selective update not enabled because it would inhibit pipe CRC calculation\n");
+		goto unsupported;
+	}
+
+	if (!psr2_granularity_check(intel_dp, crtc_state)) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "Selective update not enabled, SU granularity not compatible\n");
+		goto unsupported;
+	}
+
 	return true;
 
 unsupported:
@@ -1693,7 +1709,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	if (!crtc_state->has_psr)
 		return;
 
-	crtc_state->has_sel_update = intel_psr2_config_valid(intel_dp, crtc_state);
+	crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state);
 }
 
 void intel_psr_get_config(struct intel_encoder *encoder,
-- 
2.34.1

[PATCH v8 11/11] drm/i915/psr: Add panel replay sel update support to debugfs interface

[Jouni Högander]

Add panel replay selective update support to debugfs status interface. In
case of sink supporting panel replay we will print out:

Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes

and PSR mode will look like this if printing out enabled panel replay
selective update:

PSR mode: Panel Replay Selective Update Enabled

Current PSR and panel replay printouts remain same.

Cc: Kunal Joshi <kunal1.joshi@intel.com>

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 3197491349cc..09a667c3ad6f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3575,7 +3575,9 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 
 	if (psr->sink_support)
 		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
-	seq_printf(m, ", Panel Replay = %s\n", str_yes_no(psr->sink_panel_replay_support));
+	seq_printf(m, ", Panel Replay = %s", str_yes_no(psr->sink_panel_replay_support));
+	seq_printf(m, ", Panel Replay Selective Update = %s\n",
+		   str_yes_no(psr->sink_panel_replay_su_support));
 
 	if (!(psr->sink_support || psr->sink_panel_replay_support))
 		return 0;
@@ -3584,9 +3586,10 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	mutex_lock(&psr->lock);
 
 	if (psr->panel_replay_enabled)
-		status = "Panel Replay Enabled";
+		status = psr->sel_update_enabled ? "Panel Replay Selective Update Enabled" :
+			"Panel Replay Enabled";
 	else if (psr->enabled)
-		status = psr->sel_update_enabled ? "PSR2 enabled" : "PSR1 enabled";
+		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
 	else
 		status = "disabled";
 	seq_printf(m, "PSR mode: %s\n", status);
-- 
2.34.1

✗ Fi.CI.CHECKPATCH: warning for Panel replay selective update support (rev9)

[Patchwork]

== Series Details ==

Series: Panel replay selective update support (rev9)
URL   : https://patchwork.freedesktop.org/series/128193/
State : warning

== Summary ==

Error: dim checkpatch failed
9bb430152399 drm/i915/psr: Rename has_psr2 as has_sel_update
-:31: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#31: FILE: drivers/gpu/drm/i915/display/intel_crtc_state_dump.c:255:
+		drm_printf(&p, "psr: %s, selective update: %s, panel replay: %s, selective fetch: %s\n",
+			    str_enabled_disabled(pipe_config->has_psr),

total: 0 errors, 0 warnings, 1 checks, 88 lines checked
8ef3cd76835e drm/i915/dp: Use always vsc revision 0x6 for Panel Replay
7b514a1f4574 drm/i915/psr: Rename psr2_enabled as sel_update_enabled
0937c4291a83 drm/panelreplay: dpcd register definition for panelreplay SU
0df0cd345e84 drm/i915/psr: Detect panel replay selective update support
66b27bb1fa50 drm/i915/psr: Modify intel_dp_get_su_granularity to support panel replay
c517635fafcf drm/i915/psr: Panel replay uses SRD_STATUS to track it's status
a4b90fdd0406 drm/i915/psr: Do not apply workarounds in case of panel replay
09af34d837c0 drm/i915/psr: Update PSR module parameter descriptions
c7a55ec2d438 drm/i915/psr: Split intel_psr2_config_valid for panel replay
130abeaddc5d drm/i915/psr: Add panel replay sel update support to debugfs interface
-:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#13: 
Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes

total: 0 errors, 1 warnings, 0 checks, 22 lines checked

✗ Fi.CI.SPARSE: warning for Panel replay selective update support (rev9)

[Patchwork]

== Series Details ==

Series: Panel replay selective update support (rev9)
URL   : https://patchwork.freedesktop.org/series/128193/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2

✓ Fi.CI.BAT: success for Panel replay selective update support (rev9)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2116 bytes --]

== Series Details ==

Series: Panel replay selective update support (rev9)
URL   : https://patchwork.freedesktop.org/series/128193/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14672 -> Patchwork_128193v9
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/index.html

Participating hosts (40 -> 38)
------------------------------

  Additional (1): fi-glk-j4005 
  Missing    (3): bat-kbl-2 fi-snb-2520m fi-kbl-8809g 

Known issues
------------

  Here are the changes found in Patchwork_128193v9 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-glk-j4005:       NOTRUN -> [SKIP][1] ([i915#2190])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/fi-glk-j4005/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-glk-j4005:       NOTRUN -> [SKIP][2] ([i915#4613]) +3 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/fi-glk-j4005/igt@gem_lmem_swapping@basic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-glk-j4005:       NOTRUN -> [SKIP][3] +10 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/fi-glk-j4005/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613


Build changes
-------------

  * Linux: CI_DRM_14672 -> Patchwork_128193v9

  CI-20190529: 20190529
  CI_DRM_14672: ea200da5ea9860ec9e7b772607760c19fdfdd2fc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7825: 28b2a1b0be86e33a2fc04a022e04f07bd25b66d9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128193v9: ea200da5ea9860ec9e7b772607760c19fdfdd2fc @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/index.html

[-- Attachment #2: Type: text/html, Size: 2775 bytes --]

✗ Fi.CI.IGT: failure for Panel replay selective update support (rev9)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 77913 bytes --]

== Series Details ==

Series: Panel replay selective update support (rev9)
URL   : https://patchwork.freedesktop.org/series/128193/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14672_full -> Patchwork_128193v9_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_128193v9_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128193v9_full, please notify your bug team ('I915-ci-infra@lists.freedesktop.org') to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_128193v9_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-snb:          [PASS][2] -> [ABORT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-snb5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-snb2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-hdmi-a4:
    - shard-dg1:          [PASS][4] -> [INCOMPLETE][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-18/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-hdmi-a4.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-hdmi-a4.html

  * igt@kms_flip@blocking-absolute-wf_vblank-interruptible@b-hdmi-a3:
    - shard-dg2:          [PASS][6] -> [INCOMPLETE][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-7/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@b-hdmi-a3.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-6/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@b-hdmi-a3.html

  * igt@sysfs_heartbeat_interval@mixed@rcs0:
    - shard-mtlp:         [PASS][8] -> [FAIL][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-mtlp-2/igt@sysfs_heartbeat_interval@mixed@rcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-5/igt@sysfs_heartbeat_interval@mixed@rcs0.html

  
Known issues
------------

  Here are the changes found in Patchwork_128193v9_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-keep-cache:
    - shard-dg1:          NOTRUN -> [SKIP][10] ([i915#8411])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@api_intel_bb@blit-reloc-keep-cache.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-mtlp:         NOTRUN -> [SKIP][11] ([i915#8411])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-mtlp:         NOTRUN -> [SKIP][12] ([i915#7701])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@device_reset@cold-reset-bound.html

  * igt@drm_fdinfo@all-busy-check-all:
    - shard-mtlp:         NOTRUN -> [SKIP][13] ([i915#8414])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@drm_fdinfo@all-busy-check-all.html

  * igt@gem_busy@semaphore:
    - shard-dg2:          NOTRUN -> [SKIP][14] ([i915#3936])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_busy@semaphore.html

  * igt@gem_caching@read-writes:
    - shard-mtlp:         NOTRUN -> [SKIP][15] ([i915#4873])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_caching@read-writes.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-dg1:          NOTRUN -> [SKIP][16] ([i915#3555] / [i915#9323])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_compute@compute-square:
    - shard-mtlp:         NOTRUN -> [SKIP][17] ([i915#9310])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_compute@compute-square.html

  * igt@gem_ctx_isolation@preservation-s3@vecs1:
    - shard-dg2:          [PASS][18] -> [FAIL][19] ([i915#10086]) +2 other tests fail
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-11/igt@gem_ctx_isolation@preservation-s3@vecs1.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-5/igt@gem_ctx_isolation@preservation-s3@vecs1.html

  * igt@gem_ctx_persistence@heartbeat-hang:
    - shard-mtlp:         NOTRUN -> [SKIP][20] ([i915#8555])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_ctx_persistence@heartbeat-hang.html

  * igt@gem_ctx_sseu@engines:
    - shard-dg1:          NOTRUN -> [SKIP][21] ([i915#280])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_ctx_sseu@engines.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          NOTRUN -> [SKIP][22] ([i915#280])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_exec_balancer@bonded-semaphore:
    - shard-mtlp:         NOTRUN -> [SKIP][23] ([i915#4812])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_exec_balancer@bonded-semaphore.html

  * igt@gem_exec_balancer@bonded-sync:
    - shard-dg1:          NOTRUN -> [SKIP][24] ([i915#4771])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-16/igt@gem_exec_balancer@bonded-sync.html

  * igt@gem_exec_balancer@noheartbeat:
    - shard-dg2:          NOTRUN -> [SKIP][25] ([i915#8555])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_exec_balancer@noheartbeat.html

  * igt@gem_exec_capture@capture@vecs0-lmem0:
    - shard-dg1:          NOTRUN -> [FAIL][26] ([i915#10386]) +1 other test fail
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_exec_capture@capture@vecs0-lmem0.html

  * igt@gem_exec_capture@many-4k-incremental:
    - shard-rkl:          NOTRUN -> [FAIL][27] ([i915#9606])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gem_exec_capture@many-4k-incremental.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-rkl:          NOTRUN -> [FAIL][28] ([i915#2846])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share:
    - shard-mtlp:         NOTRUN -> [SKIP][29] ([i915#4473] / [i915#4771])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_exec_fair@basic-none-share.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-rkl:          [PASS][30] -> [FAIL][31] ([i915#2842]) +1 other test fail
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-rkl-2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share:
    - shard-dg2:          NOTRUN -> [SKIP][32] ([i915#3539] / [i915#4852]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_exec_fair@basic-pace-share.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglu:         [PASS][33] -> [FAIL][34] ([i915#2842])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-8/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-rkl:          [PASS][35] -> [FAIL][36] ([i915#2876])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-rkl-2/igt@gem_exec_fair@basic-pace@rcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-3/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fence@submit:
    - shard-dg1:          NOTRUN -> [SKIP][37] ([i915#4812])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_exec_fence@submit.html

  * igt@gem_exec_flush@basic-wb-rw-before-default:
    - shard-dg1:          NOTRUN -> [SKIP][38] ([i915#3539] / [i915#4852])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_exec_flush@basic-wb-rw-before-default.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-dg2:          NOTRUN -> [SKIP][39] ([i915#5107])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_exec_reloc@basic-concurrent0:
    - shard-dg1:          NOTRUN -> [SKIP][40] ([i915#3281]) +3 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_exec_reloc@basic-concurrent0.html

  * igt@gem_exec_reloc@basic-write-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][41] ([i915#3281]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_exec_reloc@basic-write-gtt.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-rkl:          NOTRUN -> [SKIP][42] ([i915#3281]) +3 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_exec_reloc@basic-write-wc-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][43] ([i915#3281]) +7 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_exec_reloc@basic-write-wc-noreloc.html

  * igt@gem_exec_schedule@deep@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#4537])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_exec_schedule@deep@rcs0.html

  * igt@gem_exec_schedule@preempt-queue-chain:
    - shard-dg2:          NOTRUN -> [SKIP][45] ([i915#4537] / [i915#4812])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_exec_schedule@preempt-queue-chain.html

  * igt@gem_fence_thrash@bo-write-verify-y:
    - shard-dg1:          NOTRUN -> [SKIP][46] ([i915#4860])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_fence_thrash@bo-write-verify-y.html

  * igt@gem_fenced_exec_thrash@too-many-fences:
    - shard-mtlp:         NOTRUN -> [SKIP][47] ([i915#4860])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_fenced_exec_thrash@too-many-fences.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][48] ([i915#4613]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@gem_lmem_swapping@massive:
    - shard-rkl:          NOTRUN -> [SKIP][49] ([i915#4613]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gem_lmem_swapping@massive.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-tglu:         NOTRUN -> [SKIP][50] ([i915#4613])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@gem_lmem_swapping@massive-random.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-glk:          NOTRUN -> [SKIP][51] ([i915#4613])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-glk3/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_madvise@dontneed-before-exec:
    - shard-mtlp:         NOTRUN -> [SKIP][52] ([i915#3282]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_madvise@dontneed-before-exec.html

  * igt@gem_media_vme:
    - shard-mtlp:         NOTRUN -> [SKIP][53] ([i915#284])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_media_vme.html

  * igt@gem_mmap_gtt@basic:
    - shard-dg2:          NOTRUN -> [SKIP][54] ([i915#4077]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_mmap_gtt@basic.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-mtlp:         NOTRUN -> [SKIP][55] ([i915#4077]) +3 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_mmap_wc@fault-concurrent:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#4083]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_mmap_wc@fault-concurrent.html

  * igt@gem_mmap_wc@write-cpu-read-wc-unflushed:
    - shard-mtlp:         NOTRUN -> [SKIP][57] ([i915#4083]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_mmap_wc@write-cpu-read-wc-unflushed.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-dg1:          NOTRUN -> [SKIP][58] ([i915#3282])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_partial_pwrite_pread@reads-display:
    - shard-dg2:          NOTRUN -> [SKIP][59] ([i915#3282]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_partial_pwrite_pread@reads-display.html

  * igt@gem_pwrite@basic-self:
    - shard-rkl:          NOTRUN -> [SKIP][60] ([i915#3282]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gem_pwrite@basic-self.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-tglu:         NOTRUN -> [SKIP][61] ([i915#4270]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-rkl:          NOTRUN -> [SKIP][62] ([i915#4270]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
    - shard-mtlp:         NOTRUN -> [SKIP][63] ([i915#4270]) +3 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][64] ([i915#8428]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html

  * igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][65] ([i915#5190] / [i915#8428]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_render_copy@yf-tiled-to-vebox-x-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-mtlp:         NOTRUN -> [SKIP][66] ([i915#4079])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@gem_render_tiled_blits@basic.html

  * igt@gem_softpin@evict-snoop:
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#4885])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_softpin@evict-snoop.html

  * igt@gem_spin_batch@spin-all-new:
    - shard-dg2:          NOTRUN -> [FAIL][68] ([i915#5889])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_spin_batch@spin-all-new.html

  * igt@gem_tiled_partial_pwrite_pread@writes:
    - shard-dg1:          NOTRUN -> [SKIP][69] ([i915#4077]) +4 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gem_tiled_partial_pwrite_pread@writes.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-dg2:          NOTRUN -> [SKIP][70] ([i915#3297] / [i915#4880]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#3297])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-mtlp:         NOTRUN -> [SKIP][72] ([i915#3297]) +2 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_userptr_blits@unsync-unmap-after-close:
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#3297]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@gem_userptr_blits@unsync-unmap-after-close.html

  * igt@gen3_render_linear_blits:
    - shard-mtlp:         NOTRUN -> [SKIP][74] +12 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gen3_render_linear_blits.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-tglu:         NOTRUN -> [SKIP][75] ([i915#2527] / [i915#2856])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gen9_exec_parse@batch-without-end:
    - shard-rkl:          NOTRUN -> [SKIP][76] ([i915#2527]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@gen9_exec_parse@batch-without-end.html

  * igt@gen9_exec_parse@bb-large:
    - shard-mtlp:         NOTRUN -> [SKIP][77] ([i915#2856]) +2 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-dg1:          NOTRUN -> [SKIP][78] ([i915#2527])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@gen9_exec_parse@bb-start-param.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-dg2:          NOTRUN -> [SKIP][79] ([i915#2856])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [PASS][80] -> [INCOMPLETE][81] ([i915#1982] / [i915#9820] / [i915#9849])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-8/igt@i915_module_load@reload-with-fault-injection.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pipe_stress@stress-xrgb8888-ytiled:
    - shard-dg2:          NOTRUN -> [SKIP][82] ([i915#7091])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-snb:          NOTRUN -> [SKIP][83] +69 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-snb2/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@i915_pm_rps@thresholds-park@gt0:
    - shard-dg2:          NOTRUN -> [SKIP][84] ([i915#8925])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@i915_pm_rps@thresholds-park@gt0.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-dg1:          NOTRUN -> [SKIP][85] ([i915#5723])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_selftest@mock@memory_region:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][86] ([i915#9311])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@i915_selftest@mock@memory_region.html
    - shard-snb:          NOTRUN -> [DMESG-WARN][87] ([i915#9311])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-snb2/igt@i915_selftest@mock@memory_region.html
    - shard-mtlp:         NOTRUN -> [DMESG-WARN][88] ([i915#9311])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@i915_selftest@mock@memory_region.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-rkl:          NOTRUN -> [FAIL][89] ([i915#10031])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@i915_suspend@basic-s3-without-i915.html

  * igt@intel_hwmon@hwmon-read:
    - shard-mtlp:         NOTRUN -> [SKIP][90] ([i915#7707])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@intel_hwmon@hwmon-read.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][91] ([i915#8709]) +3 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-3/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-glk:          NOTRUN -> [SKIP][92] ([i915#1769])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-glk4/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-tglu:         NOTRUN -> [SKIP][93] ([i915#5286])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-0:
    - shard-dg1:          NOTRUN -> [SKIP][94] ([i915#4538] / [i915#5286]) +1 other test skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-rkl:          NOTRUN -> [SKIP][95] ([i915#5286]) +1 other test skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#3638]) +2 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-180:
    - shard-dg2:          NOTRUN -> [SKIP][97] ([i915#4538] / [i915#5190]) +2 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-tglu:         [PASS][98] -> [FAIL][99] ([i915#3743])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-mtlp:         NOTRUN -> [SKIP][100] ([i915#6187])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][101] ([i915#4538]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][102] ([i915#6095]) +87 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-d-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][103] ([i915#10307] / [i915#6095]) +150 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-3/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-d-hdmi-a-2.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2:
    - shard-glk:          NOTRUN -> [SKIP][104] +132 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-glk4/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][105] ([i915#6095]) +11 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][106] ([i915#6095]) +39 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#6095]) +63 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][108] ([i915#10307] / [i915#10434] / [i915#6095])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][109] ([i915#3742])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][110] ([i915#7213]) +3 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-11/igt@kms_cdclk@mode-transition@pipe-a-dp-4.html

  * igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][111] ([i915#4087]) +3 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-2.html

  * igt@kms_chamelium_audio@dp-audio-edid:
    - shard-dg1:          NOTRUN -> [SKIP][112] ([i915#7828]) +2 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-18/igt@kms_chamelium_audio@dp-audio-edid.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-rkl:          NOTRUN -> [SKIP][113] ([i915#7828]) +2 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_chamelium_frames@dp-frame-dump:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#7828]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_chamelium_frames@dp-frame-dump.html

  * igt@kms_chamelium_hpd@hdmi-hpd-fast:
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#7828]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_chamelium_hpd@hdmi-hpd-fast.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][116] ([i915#7828]) +5 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_content_protection@lic-type-1:
    - shard-mtlp:         NOTRUN -> [SKIP][117] ([i915#6944] / [i915#9424])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_content_protection@lic-type-1.html
    - shard-rkl:          NOTRUN -> [SKIP][118] ([i915#9424]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@type1:
    - shard-rkl:          NOTRUN -> [SKIP][119] ([i915#7118] / [i915#9424])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_content_protection@type1.html
    - shard-mtlp:         NOTRUN -> [SKIP][120] ([i915#3555] / [i915#6944] / [i915#9424])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-mtlp:         NOTRUN -> [SKIP][121] ([i915#3555] / [i915#8814]) +1 other test skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-rkl:          NOTRUN -> [SKIP][122] ([i915#3555]) +5 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg1:          NOTRUN -> [SKIP][123] ([i915#3359])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-mtlp:         NOTRUN -> [SKIP][124] ([i915#3359]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_cursor_crc@cursor-onscreen-512x512.html
    - shard-rkl:          NOTRUN -> [SKIP][125] ([i915#3359]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][126] ([i915#9809]) +1 other test skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][127] ([i915#4103])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
    - shard-mtlp:         NOTRUN -> [SKIP][128] ([i915#4213])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          NOTRUN -> [FAIL][129] ([i915#2346])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-tglu:         NOTRUN -> [SKIP][130] ([i915#9067])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-dg2:          NOTRUN -> [SKIP][131] ([i915#4103] / [i915#4213])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg1:          NOTRUN -> [SKIP][132] ([i915#3555]) +3 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][133] ([i915#3804])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_aux_dev:
    - shard-rkl:          NOTRUN -> [SKIP][134] ([i915#1257])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-basic:
    - shard-dg1:          NOTRUN -> [SKIP][135] ([i915#3555] / [i915#3840])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_dsc@dsc-basic.html

  * igt@kms_feature_discovery@display-4x:
    - shard-rkl:          NOTRUN -> [SKIP][136] ([i915#1839])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-mtlp:         NOTRUN -> [SKIP][137] ([i915#9337])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-mtlp:         NOTRUN -> [SKIP][138] ([i915#3637]) +5 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-flip-vs-rmfb-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][139] +2 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][140] ([i915#9934]) +2 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][141] ([i915#3637]) +1 other test skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a4:
    - shard-dg1:          [PASS][142] -> [FAIL][143] ([i915#2122])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-17/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a4.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-18/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a4.html

  * igt@kms_flip@flip-vs-fences-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([i915#8381])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_flip@flip-vs-fences-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][145] ([i915#2672]) +3 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][146] ([i915#2672]) +1 other test skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-dg1:          NOTRUN -> [SKIP][147] ([i915#2587] / [i915#2672])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][148] ([i915#2587] / [i915#2672])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][149] ([i915#3555] / [i915#8810])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
    - shard-mtlp:         NOTRUN -> [SKIP][150] ([i915#1825]) +22 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][151] ([i915#8708]) +2 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][152] ([i915#3023]) +10 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-dg1:          NOTRUN -> [SKIP][153] ([i915#3458]) +3 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#5354]) +6 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][155] ([i915#8708]) +6 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-mtlp:         NOTRUN -> [SKIP][156] ([i915#10055])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#3458]) +3 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][158] ([i915#8708]) +8 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][159] ([i915#1825]) +20 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][160] +19 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html

  * igt@kms_hdr@bpc-switch:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#3555] / [i915#8228])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_hdr@bpc-switch.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2:          NOTRUN -> [SKIP][162] ([i915#3555] / [i915#8228])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_hdr@invalid-hdr.html

  * igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][163] ([i915#9457]) +3 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html

  * igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][164] ([i915#10647]) +1 other test fail
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-glk3/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#3555] / [i915#8821])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-mtlp:         NOTRUN -> [SKIP][166] ([i915#3555] / [i915#8806])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([i915#6953] / [i915#9423])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-5/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][168] ([i915#8292])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][169] ([i915#8292])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][170] ([i915#5176]) +3 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-edp-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][171] ([i915#9423]) +3 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-3.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][172] ([i915#9423]) +7 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#5176] / [i915#9423]) +1 other test skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#5235] / [i915#9423]) +11 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-7/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][175] ([i915#5235]) +7 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-13/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#5235]) +5 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][177] ([i915#5235]) +9 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][178] ([i915#3555] / [i915#5235]) +1 other test skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d-edp-1.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-dg1:          NOTRUN -> [SKIP][179] ([i915#5354])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][180] ([i915#5354])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-rkl:          NOTRUN -> [SKIP][181] ([i915#9685])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [PASS][182] -> [SKIP][183] ([i915#4281])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-2/igt@kms_pm_dc@dc9-dpms.html
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-7/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-mtlp:         NOTRUN -> [SKIP][184] ([i915#8430])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#9519])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          [PASS][186] -> [SKIP][187] ([i915#9519])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp.html
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-11/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [PASS][188] -> [SKIP][189] ([i915#9519])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_prime@basic-crc-vgem:
    - shard-dg2:          NOTRUN -> [SKIP][190] ([i915#6524] / [i915#6805])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_prime@basic-crc-vgem.html

  * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][191] ([i915#9808]) +1 other test skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
    - shard-dg1:          NOTRUN -> [SKIP][192] +10 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html

  * igt@kms_psr@fbc-psr-cursor-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][193] ([i915#9732]) +4 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_psr@fbc-psr-cursor-mmap-gtt.html

  * igt@kms_psr@fbc-psr2-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][194] ([i915#1072] / [i915#9732]) +8 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_psr@fbc-psr2-suspend.html

  * igt@kms_psr@pr-primary-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][195] ([i915#9688]) +9 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_psr@pr-primary-mmap-cpu.html

  * igt@kms_psr@pr-primary-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][196] ([i915#1072] / [i915#9732]) +5 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_psr@pr-primary-mmap-gtt.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][197] ([i915#1072] / [i915#9732]) +5 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#4235])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_scaling_modes@scaling-mode-full:
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#3555]) +2 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_scaling_modes@scaling-mode-full.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-mtlp:         NOTRUN -> [SKIP][200] ([i915#3555] / [i915#8809])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-mtlp:         NOTRUN -> [SKIP][201] ([i915#3555] / [i915#8823])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][202] -> [FAIL][203] ([i915#9196])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][204] ([i915#9196])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-3/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-2.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-edp-1:
    - shard-mtlp:         [PASS][205] -> [FAIL][206] ([i915#9196])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak@pipe-d-edp-1.html
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-d-edp-1.html

  * igt@kms_vrr@flip-basic:
    - shard-mtlp:         NOTRUN -> [SKIP][207] ([i915#3555] / [i915#8808])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-tglu:         NOTRUN -> [SKIP][208] ([i915#9906])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-rkl:          NOTRUN -> [SKIP][209] ([i915#9906])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-mtlp:         NOTRUN -> [SKIP][210] ([i915#2437] / [i915#9412])
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-tglu:         NOTRUN -> [SKIP][211] ([i915#2437])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          NOTRUN -> [FAIL][212] ([i915#9100])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@perf@non-zero-reason@0-rcs0.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-mtlp:         NOTRUN -> [SKIP][213] ([i915#8850])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@perf_pmu@cpu-hotplug.html
    - shard-rkl:          NOTRUN -> [SKIP][214] ([i915#8850])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@perf_pmu@cpu-hotplug.html

  * igt@runner@aborted:
    - shard-glk:          NOTRUN -> [FAIL][215] ([i915#10291])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-glk1/igt@runner@aborted.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-rkl:          NOTRUN -> [SKIP][216] +22 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@tools_test@sysfs_l3_parity.html
    - shard-mtlp:         NOTRUN -> [SKIP][217] ([i915#4818])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@tools_test@sysfs_l3_parity.html

  * igt@v3d/v3d_perfmon@create-perfmon-exceed:
    - shard-mtlp:         NOTRUN -> [SKIP][218] ([i915#2575]) +9 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@v3d/v3d_perfmon@create-perfmon-exceed.html

  * igt@v3d/v3d_submit_csd@single-in-sync:
    - shard-dg2:          NOTRUN -> [SKIP][219] ([i915#2575]) +2 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@v3d/v3d_submit_csd@single-in-sync.html

  * igt@v3d/v3d_submit_csd@valid-multisync-submission:
    - shard-dg1:          NOTRUN -> [SKIP][220] ([i915#2575]) +4 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-18/igt@v3d/v3d_submit_csd@valid-multisync-submission.html

  * igt@vc4/vc4_label_bo@set-kernel-name:
    - shard-dg2:          NOTRUN -> [SKIP][221] ([i915#7711]) +1 other test skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@vc4/vc4_label_bo@set-kernel-name.html

  * igt@vc4/vc4_label_bo@set-label:
    - shard-dg1:          NOTRUN -> [SKIP][222] ([i915#7711]) +1 other test skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-15/igt@vc4/vc4_label_bo@set-label.html

  * igt@vc4/vc4_purgeable_bo@mark-purgeable-twice:
    - shard-mtlp:         NOTRUN -> [SKIP][223] ([i915#7711]) +4 other tests skip
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@vc4/vc4_purgeable_bo@mark-purgeable-twice.html

  * igt@vc4/vc4_tiling@set-bad-flags:
    - shard-tglu:         NOTRUN -> [SKIP][224] ([i915#2575]) +4 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-2/igt@vc4/vc4_tiling@set-bad-flags.html

  * igt@vc4/vc4_tiling@set-get:
    - shard-rkl:          NOTRUN -> [SKIP][225] ([i915#7711]) +3 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-2/igt@vc4/vc4_tiling@set-get.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          [FAIL][226] ([i915#7742]) -> [PASS][227]
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-rkl-6/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-5/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@gem_eio@kms:
    - shard-dg2:          [INCOMPLETE][228] ([i915#10513] / [i915#1982]) -> [PASS][229]
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-7/igt@gem_eio@kms.html
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-6/igt@gem_eio@kms.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-rkl:          [FAIL][230] ([i915#2842]) -> [PASS][231]
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-rkl-5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_lmem_swapping@basic@lmem0:
    - shard-dg2:          [FAIL][232] ([i915#10378]) -> [PASS][233] +1 other test pass
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-5/igt@gem_lmem_swapping@basic@lmem0.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [TIMEOUT][234] ([i915#5493]) -> [PASS][235]
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-13/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-snb:          [INCOMPLETE][236] ([i915#9849]) -> [PASS][237]
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-snb2/igt@i915_module_load@reload-with-fault-injection.html
    - shard-mtlp:         [ABORT][238] ([i915#10131] / [i915#10887] / [i915#9820]) -> [PASS][239]
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-mtlp-7/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@live@guc_hang:
    - shard-dg1:          [INCOMPLETE][240] -> [PASS][241]
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-13/igt@i915_selftest@live@guc_hang.html
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-16/igt@i915_selftest@live@guc_hang.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-tglu:         [FAIL][242] ([i915#3743]) -> [PASS][243]
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          [SKIP][244] ([i915#1257]) -> [PASS][245]
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-8/igt@kms_dp_aux_dev.html
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-11/igt@kms_dp_aux_dev.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-snb:          [SKIP][246] -> [PASS][247]
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [SKIP][248] ([i915#9519]) -> [PASS][249] +2 other tests pass
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [SKIP][250] ([i915#9519]) -> [PASS][251]
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-snb:          [FAIL][252] ([i915#9196]) -> [PASS][253]
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-snb6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-snb6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
    - shard-tglu:         [FAIL][254] ([i915#9196]) -> [PASS][255]
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-8/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-4:
    - shard-dg1:          [FAIL][256] ([i915#9196]) -> [PASS][257]
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-18/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-4.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-17/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-4.html

  
#### Warnings ####

  * igt@device_reset@unbind-reset-rebind:
    - shard-dg1:          [INCOMPLETE][258] ([i915#9408] / [i915#9618]) -> [ABORT][259] ([i915#9618])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-15/igt@device_reset@unbind-reset-rebind.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-13/igt@device_reset@unbind-reset-rebind.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2:          [INCOMPLETE][260] ([i915#9364]) -> [ABORT][261] ([i915#9846])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-6/igt@gem_create@create-ext-cpu-access-big.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-3/igt@gem_create@create-ext-cpu-access-big.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-tglu:         [INCOMPLETE][262] ([i915#10047] / [i915#10887] / [i915#9820]) -> [INCOMPLETE][263] ([i915#10047])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_content_protection@atomic:
    - shard-dg1:          [INCOMPLETE][264] -> [SKIP][265] ([i915#7116] / [i915#9424])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-18/igt@kms_content_protection@atomic.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-17/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][266] ([i915#9424]) -> [SKIP][267] ([i915#9433])
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg1-15/igt@kms_content_protection@mei-interface.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg1-13/igt@kms_content_protection@mei-interface.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
    - shard-dg2:          [SKIP][268] ([i915#3458]) -> [SKIP][269] ([i915#10433] / [i915#3458]) +1 other test skip
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
    - shard-dg2:          [SKIP][270] ([i915#10433] / [i915#3458]) -> [SKIP][271] ([i915#3458]) +3 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - shard-dg2:          [SKIP][272] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][273] ([i915#1072] / [i915#9732]) +4 other tests skip
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-11/igt@kms_psr@psr-primary-mmap-gtt.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-5/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_psr@psr2-cursor-blt:
    - shard-dg2:          [SKIP][274] ([i915#1072] / [i915#9732]) -> [SKIP][275] ([i915#1072] / [i915#9673] / [i915#9732]) +7 other tests skip
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-8/igt@kms_psr@psr2-cursor-blt.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-11/igt@kms_psr@psr2-cursor-blt.html

  * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
    - shard-dg2:          [INCOMPLETE][276] ([i915#5493]) -> [CRASH][277] ([i915#9351])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14672/shard-dg2-2/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/shard-dg2-7/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html

  
  [i915#10031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10031
  [i915#10047]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10047
  [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
  [i915#10086]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10086
  [i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
  [i915#10291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10291
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
  [i915#10386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10386
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10513]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10513
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#2876]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2876
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3743]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3743
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3936]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3936
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4473]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4473
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4818
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4873]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4873
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#5107]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5107
  [i915#5176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5889]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5889
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7091]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7091
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
  [i915#7701]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7701
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
  [i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
  [i915#8823]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8823
  [i915#8850]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8850
  [i915#8925]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8925
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9100]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9100
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9310]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9310
  [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9351]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9351
  [i915#9364]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9364
  [i915#9408]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9408
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9457]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9457
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9606]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9606
  [i915#9618]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9618
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9846]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9846
  [i915#9849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9849
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_14672 -> Patchwork_128193v9

  CI-20190529: 20190529
  CI_DRM_14672: ea200da5ea9860ec9e7b772607760c19fdfdd2fc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7825: 28b2a1b0be86e33a2fc04a022e04f07bd25b66d9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128193v9: ea200da5ea9860ec9e7b772607760c19fdfdd2fc @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v9/index.html

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