From: Matthew Auld <matthew.auld@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Daniel Vetter" <daniel.vetter@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
"Christian König" <christian.koenig@amd.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: fix i915_gem_object_wait_moving_fence
Date: Fri, 8 Apr 2022 09:13:09 +0100 [thread overview]
Message-ID: <2d860759-81d2-df81-54c9-16fb89a96fe9@intel.com> (raw)
In-Reply-To: <20220408050044.7wd54sjbzzkzpqzr@ldmartin-desk2>
On 08/04/2022 06:00, Lucas De Marchi wrote:
> On Thu, Apr 07, 2022 at 05:45:32PM +0100, Matthew Auld wrote:
>> All of CI is just failing with the following, which prevents loading of
>> the module:
>>
>> i915 0000:03:00.0: [drm] *ERROR* Scratch setup failed
>>
>> Best guess is that this comes from the pin_map() for the scratch page,
>> which does an i915_gem_object_wait_moving_fence() somewhere. It looks
>> like this now calls into dma_resv_wait_timeout() which can return the
>> remaining timeout, leading to the caller thinking this is an error.
>>
>> Fixes: 1d7f5e6c5240 ("drm/i915: drop bo->moving dependency")
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Christian König <christian.koenig@amd.com>
>> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_object.c | 9 +++++++--
>> 1 file changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
>> b/drivers/gpu/drm/i915/gem/i915_gem_object.c
>> index 2998d895a6b3..1c88d4121658 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
>> @@ -772,9 +772,14 @@ int i915_gem_object_get_moving_fence(struct
>> drm_i915_gem_object *obj,
>> int i915_gem_object_wait_moving_fence(struct drm_i915_gem_object *obj,
>> bool intr)
>> {
>> + long ret;
>> +
>> assert_object_held(obj);
>> - return dma_resv_wait_timeout(obj->base. resv, DMA_RESV_USAGE_KERNEL,
>> - intr, MAX_SCHEDULE_TIMEOUT);
>> +
>> + ret = dma_resv_wait_timeout(obj->base. resv, DMA_RESV_USAGE_KERNEL,
>> + intr, MAX_SCHEDULE_TIMEOUT);
>> +
>> + return ret < 0 ? ret : 0;
>
> shouldn't == 0 also be an error since it would be a timeout?
Hmm, I guess so...
>
> Lucas De Marchi
next prev parent reply other threads:[~2022-04-08 8:13 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-07 16:45 [Intel-gfx] [PATCH 1/2] drm/i915: fix broken build Matthew Auld
2022-04-07 16:45 ` [Intel-gfx] [PATCH 2/2] drm/i915: fix i915_gem_object_wait_moving_fence Matthew Auld
2022-04-08 1:44 ` Lucas De Marchi
2022-04-08 5:00 ` Lucas De Marchi
2022-04-08 8:13 ` Matthew Auld [this message]
2022-04-08 9:08 ` Tvrtko Ursulin
2022-04-08 9:12 ` Christian König
2022-04-08 9:23 ` Tvrtko Ursulin
2022-04-08 9:29 ` Christian König
2022-04-07 16:49 ` [Intel-gfx] [PATCH 1/2] drm/i915: fix broken build Christian König
2022-04-07 17:07 ` Matthew Auld
2022-04-08 8:32 ` Matthew Auld
2022-04-08 8:45 ` Christian König
2022-04-07 22:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2022-04-08 0:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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