* [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Add GuC oriented print macros
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-28 1:27 ` John Harrison
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/guc: Update GuC messages in intel_guc.c Michal Wajdeczko
` (8 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
While we do have GT oriented print macros, add few more GuC
specific to have common look and feel across all messages
related to the GuC and to avoid chasing the gt pointer.
We will use these macros shortly in upcoming patches.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_print.h | 48 ++++++++++++++++++++
1 file changed, 48 insertions(+)
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_print.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
new file mode 100644
index 000000000000..e75989d4ba06
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __INTEL_GUC_PRINT__
+#define __INTEL_GUC_PRINT__
+
+#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
+
+#define guc_printk(_guc, _level, _fmt, ...) \
+ gt_##_level(guc_to_gt(_guc), "GUC: " _fmt, ##__VA_ARGS__)
+
+#define guc_err(_guc, _fmt, ...) \
+ guc_printk((_guc), err, _fmt, ##__VA_ARGS__)
+
+#define guc_warn(_guc, _fmt, ...) \
+ guc_printk((_guc), warn, _fmt, ##__VA_ARGS__)
+
+#define guc_notice(_guc, _fmt, ...) \
+ guc_printk((_guc), notice, _fmt, ##__VA_ARGS__)
+
+#define guc_info(_guc, _fmt, ...) \
+ guc_printk((_guc), info, _fmt, ##__VA_ARGS__)
+
+#define guc_dbg(_guc, _fmt, ...) \
+ guc_printk((_guc), dbg, _fmt, ##__VA_ARGS__)
+
+#define guc_err_ratelimited(_guc, _fmt, ...) \
+ guc_printk((_guc), err_ratelimited, _fmt, ##__VA_ARGS__)
+
+#define guc_probe_error(_guc, _fmt, ...) \
+ guc_printk((_guc), probe_error, _fmt, ##__VA_ARGS__)
+
+#define guc_WARN(_guc, _cond, _fmt, ...) \
+ gt_WARN(guc_to_gt(_guc), _cond, "GUC: " _fmt, ##__VA_ARGS__)
+
+#define guc_WARN_ONCE(_guc, _cond, _fmt, ...) \
+ gt_WARN_ONCE(guc_to_gt(_guc), _cond, "GUC: " _fmt, ##__VA_ARGS__)
+
+#define guc_WARN_ON(_guc, _cond) \
+ gt_WARN(guc_to_gt(_guc), _cond, "%s(%s)", "guc_WARN_ON", __stringify(_cond))
+
+#define guc_WARN_ON_ONCE(_guc, _cond) \
+ gt_WARN_ONCE(guc_to_gt(_guc), _cond, "%s(%s)", "guc_WARN_ON_ONCE", __stringify(_cond))
+
+#endif /* __INTEL_GUC_PRINT__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Add GuC oriented print macros
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Add " Michal Wajdeczko
@ 2023-01-28 1:27 ` John Harrison
0 siblings, 0 replies; 17+ messages in thread
From: John Harrison @ 2023-01-28 1:27 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: dri-devel
On 1/24/2023 09:05, Michal Wajdeczko wrote:
> While we do have GT oriented print macros, add few more GuC
> specific to have common look and feel across all messages
> related to the GuC and to avoid chasing the gt pointer.
>
> We will use these macros shortly in upcoming patches.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_print.h | 48 ++++++++++++++++++++
> 1 file changed, 48 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_print.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
> new file mode 100644
> index 000000000000..e75989d4ba06
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
> @@ -0,0 +1,48 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef __INTEL_GUC_PRINT__
> +#define __INTEL_GUC_PRINT__
> +
> +#include "gt/intel_gt.h"
> +#include "gt/intel_gt_print.h"
> +
> +#define guc_printk(_guc, _level, _fmt, ...) \
> + gt_##_level(guc_to_gt(_guc), "GUC: " _fmt, ##__VA_ARGS__)
> +
> +#define guc_err(_guc, _fmt, ...) \
> + guc_printk((_guc), err, _fmt, ##__VA_ARGS__)
> +
> +#define guc_warn(_guc, _fmt, ...) \
> + guc_printk((_guc), warn, _fmt, ##__VA_ARGS__)
> +
> +#define guc_notice(_guc, _fmt, ...) \
> + guc_printk((_guc), notice, _fmt, ##__VA_ARGS__)
> +
> +#define guc_info(_guc, _fmt, ...) \
> + guc_printk((_guc), info, _fmt, ##__VA_ARGS__)
> +
> +#define guc_dbg(_guc, _fmt, ...) \
> + guc_printk((_guc), dbg, _fmt, ##__VA_ARGS__)
> +
> +#define guc_err_ratelimited(_guc, _fmt, ...) \
> + guc_printk((_guc), err_ratelimited, _fmt, ##__VA_ARGS__)
> +
> +#define guc_probe_error(_guc, _fmt, ...) \
> + guc_printk((_guc), probe_error, _fmt, ##__VA_ARGS__)
> +
> +#define guc_WARN(_guc, _cond, _fmt, ...) \
> + gt_WARN(guc_to_gt(_guc), _cond, "GUC: " _fmt, ##__VA_ARGS__)
> +
> +#define guc_WARN_ONCE(_guc, _cond, _fmt, ...) \
> + gt_WARN_ONCE(guc_to_gt(_guc), _cond, "GUC: " _fmt, ##__VA_ARGS__)
> +
> +#define guc_WARN_ON(_guc, _cond) \
> + gt_WARN(guc_to_gt(_guc), _cond, "%s(%s)", "guc_WARN_ON", __stringify(_cond))
> +
> +#define guc_WARN_ON_ONCE(_guc, _cond) \
> + gt_WARN_ONCE(guc_to_gt(_guc), _cond, "%s(%s)", "guc_WARN_ON_ONCE", __stringify(_cond))
> +
> +#endif /* __INTEL_GUC_PRINT__ */
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Intel-gfx] [PATCH v2 2/8] drm/i915/guc: Update GuC messages in intel_guc.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Add " Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-28 1:11 ` John Harrison
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 3/8] drm/i915/guc: Update GuC messages in intel_guc_ads.c Michal Wajdeczko
` (7 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
v2: drop now redundant "GuC" word from the message
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 31 +++++++++++++-------------
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 1bccc175f9e6..d76508fa3af7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -11,6 +11,7 @@
#include "intel_guc.h"
#include "intel_guc_ads.h"
#include "intel_guc_capture.h"
+#include "intel_guc_print.h"
#include "intel_guc_slpc.h"
#include "intel_guc_submission.h"
#include "i915_drv.h"
@@ -94,8 +95,8 @@ static void gen9_enable_guc_interrupts(struct intel_guc *guc)
assert_rpm_wakelock_held(>->i915->runtime_pm);
spin_lock_irq(gt->irq_lock);
- WARN_ON_ONCE(intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
- gt->pm_guc_events);
+ guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
+ gt->pm_guc_events);
gen6_gt_pm_enable_irq(gt, gt->pm_guc_events);
spin_unlock_irq(gt->irq_lock);
@@ -342,7 +343,7 @@ static void guc_init_params(struct intel_guc *guc)
params[GUC_CTL_DEVID] = guc_ctl_devid(guc);
for (i = 0; i < GUC_CTL_MAX_DWORDS; i++)
- DRM_DEBUG_DRIVER("param[%2d] = %#x\n", i, params[i]);
+ guc_dbg(guc, "param[%2d] = %#x\n", i, params[i]);
}
/*
@@ -389,7 +390,6 @@ void intel_guc_dump_time_info(struct intel_guc *guc, struct drm_printer *p)
int intel_guc_init(struct intel_guc *guc)
{
- struct intel_gt *gt = guc_to_gt(guc);
int ret;
ret = intel_uc_fw_init(&guc->fw);
@@ -451,7 +451,7 @@ int intel_guc_init(struct intel_guc *guc)
intel_uc_fw_fini(&guc->fw);
out:
intel_uc_fw_change_status(&guc->fw, INTEL_UC_FIRMWARE_INIT_FAIL);
- i915_probe_error(gt->i915, "failed with %d\n", ret);
+ guc_probe_error(guc, "failed with %pe\n", ERR_PTR(ret));
return ret;
}
@@ -480,7 +480,6 @@ void intel_guc_fini(struct intel_guc *guc)
int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
u32 *response_buf, u32 response_buf_size)
{
- struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
u32 header;
int i;
@@ -515,7 +514,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
10, 10, &header);
if (unlikely(ret)) {
timeout:
- drm_err(&i915->drm, "mmio request %#x: no reply %x\n",
+ guc_err(guc, "mmio request %#x: no reply %x\n",
request[0], header);
goto out;
}
@@ -537,7 +536,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
if (FIELD_GET(GUC_HXG_MSG_0_TYPE, header) == GUC_HXG_TYPE_NO_RESPONSE_RETRY) {
u32 reason = FIELD_GET(GUC_HXG_RETRY_MSG_0_REASON, header);
- drm_dbg(&i915->drm, "mmio request %#x: retrying, reason %u\n",
+ guc_dbg(guc, "mmio request %#x: retrying, reason %u\n",
request[0], reason);
goto retry;
}
@@ -546,7 +545,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
u32 hint = FIELD_GET(GUC_HXG_FAILURE_MSG_0_HINT, header);
u32 error = FIELD_GET(GUC_HXG_FAILURE_MSG_0_ERROR, header);
- drm_err(&i915->drm, "mmio request %#x: failure %x/%u\n",
+ guc_err(guc, "mmio request %#x: failure %x/%u\n",
request[0], error, hint);
ret = -ENXIO;
goto out;
@@ -554,7 +553,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
if (FIELD_GET(GUC_HXG_MSG_0_TYPE, header) != GUC_HXG_TYPE_RESPONSE_SUCCESS) {
proto:
- drm_err(&i915->drm, "mmio request %#x: unexpected reply %#x\n",
+ guc_err(guc, "mmio request %#x: unexpected reply %#x\n",
request[0], header);
ret = -EPROTO;
goto out;
@@ -597,9 +596,9 @@ int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
msg = payload[0] & guc->msg_enabled_mask;
if (msg & INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED)
- drm_err(&guc_to_gt(guc)->i915->drm, "Received early GuC crash dump notification!\n");
+ guc_err(guc, "Received early crash dump notification!\n");
if (msg & INTEL_GUC_RECV_MSG_EXCEPTION)
- drm_err(&guc_to_gt(guc)->i915->drm, "Received early GuC exception notification!\n");
+ guc_err(guc, "Received early exception notification!\n");
return 0;
}
@@ -653,7 +652,8 @@ int intel_guc_suspend(struct intel_guc *guc)
*/
ret = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0);
if (ret)
- DRM_ERROR("GuC suspend: RESET_CLIENT action failed with error %d!\n", ret);
+ guc_err(guc, "suspend: RESET_CLIENT action failed with %pe\n",
+ ERR_PTR(ret));
}
/* Signal that the GuC isn't running. */
@@ -828,12 +828,11 @@ static int __guc_action_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 va
static int __guc_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 value)
{
- struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
int err = __guc_action_self_cfg(guc, key, len, value);
if (unlikely(err))
- i915_probe_error(i915, "Unsuccessful self-config (%pe) key %#hx value %#llx\n",
- ERR_PTR(err), key, value);
+ guc_probe_error(guc, "Unsuccessful self-config (%pe) key %#hx value %#llx\n",
+ ERR_PTR(err), key, value);
return err;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH v2 2/8] drm/i915/guc: Update GuC messages in intel_guc.c
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/guc: Update GuC messages in intel_guc.c Michal Wajdeczko
@ 2023-01-28 1:11 ` John Harrison
0 siblings, 0 replies; 17+ messages in thread
From: John Harrison @ 2023-01-28 1:11 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: dri-devel
On 1/24/2023 09:05, Michal Wajdeczko wrote:
> Use new macros to have common prefix that also include GT#.
>
> v2: drop now redundant "GuC" word from the message
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 31 +++++++++++++-------------
> 1 file changed, 15 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 1bccc175f9e6..d76508fa3af7 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -11,6 +11,7 @@
> #include "intel_guc.h"
> #include "intel_guc_ads.h"
> #include "intel_guc_capture.h"
> +#include "intel_guc_print.h"
> #include "intel_guc_slpc.h"
> #include "intel_guc_submission.h"
> #include "i915_drv.h"
> @@ -94,8 +95,8 @@ static void gen9_enable_guc_interrupts(struct intel_guc *guc)
> assert_rpm_wakelock_held(>->i915->runtime_pm);
>
> spin_lock_irq(gt->irq_lock);
> - WARN_ON_ONCE(intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
> - gt->pm_guc_events);
> + guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
> + gt->pm_guc_events);
> gen6_gt_pm_enable_irq(gt, gt->pm_guc_events);
> spin_unlock_irq(gt->irq_lock);
>
> @@ -342,7 +343,7 @@ static void guc_init_params(struct intel_guc *guc)
> params[GUC_CTL_DEVID] = guc_ctl_devid(guc);
>
> for (i = 0; i < GUC_CTL_MAX_DWORDS; i++)
> - DRM_DEBUG_DRIVER("param[%2d] = %#x\n", i, params[i]);
> + guc_dbg(guc, "param[%2d] = %#x\n", i, params[i]);
> }
>
> /*
> @@ -389,7 +390,6 @@ void intel_guc_dump_time_info(struct intel_guc *guc, struct drm_printer *p)
>
> int intel_guc_init(struct intel_guc *guc)
> {
> - struct intel_gt *gt = guc_to_gt(guc);
> int ret;
>
> ret = intel_uc_fw_init(&guc->fw);
> @@ -451,7 +451,7 @@ int intel_guc_init(struct intel_guc *guc)
> intel_uc_fw_fini(&guc->fw);
> out:
> intel_uc_fw_change_status(&guc->fw, INTEL_UC_FIRMWARE_INIT_FAIL);
> - i915_probe_error(gt->i915, "failed with %d\n", ret);
> + guc_probe_error(guc, "failed with %pe\n", ERR_PTR(ret));
> return ret;
> }
>
> @@ -480,7 +480,6 @@ void intel_guc_fini(struct intel_guc *guc)
> int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
> u32 *response_buf, u32 response_buf_size)
> {
> - struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> struct intel_uncore *uncore = guc_to_gt(guc)->uncore;
> u32 header;
> int i;
> @@ -515,7 +514,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
> 10, 10, &header);
> if (unlikely(ret)) {
> timeout:
> - drm_err(&i915->drm, "mmio request %#x: no reply %x\n",
> + guc_err(guc, "mmio request %#x: no reply %x\n",
> request[0], header);
> goto out;
> }
> @@ -537,7 +536,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
> if (FIELD_GET(GUC_HXG_MSG_0_TYPE, header) == GUC_HXG_TYPE_NO_RESPONSE_RETRY) {
> u32 reason = FIELD_GET(GUC_HXG_RETRY_MSG_0_REASON, header);
>
> - drm_dbg(&i915->drm, "mmio request %#x: retrying, reason %u\n",
> + guc_dbg(guc, "mmio request %#x: retrying, reason %u\n",
> request[0], reason);
> goto retry;
> }
> @@ -546,7 +545,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
> u32 hint = FIELD_GET(GUC_HXG_FAILURE_MSG_0_HINT, header);
> u32 error = FIELD_GET(GUC_HXG_FAILURE_MSG_0_ERROR, header);
>
> - drm_err(&i915->drm, "mmio request %#x: failure %x/%u\n",
> + guc_err(guc, "mmio request %#x: failure %x/%u\n",
> request[0], error, hint);
> ret = -ENXIO;
> goto out;
> @@ -554,7 +553,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len,
>
> if (FIELD_GET(GUC_HXG_MSG_0_TYPE, header) != GUC_HXG_TYPE_RESPONSE_SUCCESS) {
> proto:
> - drm_err(&i915->drm, "mmio request %#x: unexpected reply %#x\n",
> + guc_err(guc, "mmio request %#x: unexpected reply %#x\n",
> request[0], header);
> ret = -EPROTO;
> goto out;
> @@ -597,9 +596,9 @@ int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
> msg = payload[0] & guc->msg_enabled_mask;
>
> if (msg & INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED)
> - drm_err(&guc_to_gt(guc)->i915->drm, "Received early GuC crash dump notification!\n");
> + guc_err(guc, "Received early crash dump notification!\n");
> if (msg & INTEL_GUC_RECV_MSG_EXCEPTION)
> - drm_err(&guc_to_gt(guc)->i915->drm, "Received early GuC exception notification!\n");
> + guc_err(guc, "Received early exception notification!\n");
>
> return 0;
> }
> @@ -653,7 +652,8 @@ int intel_guc_suspend(struct intel_guc *guc)
> */
> ret = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0);
> if (ret)
> - DRM_ERROR("GuC suspend: RESET_CLIENT action failed with error %d!\n", ret);
> + guc_err(guc, "suspend: RESET_CLIENT action failed with %pe\n",
> + ERR_PTR(ret));
> }
>
> /* Signal that the GuC isn't running. */
> @@ -828,12 +828,11 @@ static int __guc_action_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 va
>
> static int __guc_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 value)
> {
> - struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> int err = __guc_action_self_cfg(guc, key, len, value);
>
> if (unlikely(err))
> - i915_probe_error(i915, "Unsuccessful self-config (%pe) key %#hx value %#llx\n",
> - ERR_PTR(err), key, value);
> + guc_probe_error(guc, "Unsuccessful self-config (%pe) key %#hx value %#llx\n",
> + ERR_PTR(err), key, value);
> return err;
> }
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Intel-gfx] [PATCH v2 3/8] drm/i915/guc: Update GuC messages in intel_guc_ads.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Add " Michal Wajdeczko
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/guc: Update GuC messages in intel_guc.c Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 4/8] drm/i915/guc: Update GuC messages in intel_guc_ct.c Michal Wajdeczko
` (6 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index a7f737c4792e..69ce06faf8cd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -15,6 +15,7 @@
#include "intel_guc_ads.h"
#include "intel_guc_capture.h"
#include "intel_guc_fwif.h"
+#include "intel_guc_print.h"
#include "intel_uc.h"
#include "i915_drv.h"
@@ -427,7 +428,7 @@ static long guc_mmio_reg_state_create(struct intel_guc *guc)
guc->ads_regset = temp_set.storage;
- drm_dbg(&guc_to_gt(guc)->i915->drm, "Used %zu KB for temporary ADS regset\n",
+ guc_dbg(guc, "Used %zu KB for temporary ADS regset\n",
(temp_set.storage_max * sizeof(struct guc_mmio_reg)) >> 10);
return total * sizeof(struct guc_mmio_reg);
@@ -621,7 +622,7 @@ static void guc_init_golden_context(struct intel_guc *guc)
engine = find_engine_state(gt, engine_class);
if (!engine) {
- drm_err(>->i915->drm, "No engine state recorded for class %d!\n",
+ guc_err(guc, "No engine state recorded for class %d!\n",
engine_class);
ads_blob_write(guc, ads.eng_state_size[guc_class], 0);
ads_blob_write(guc, ads.golden_context_lrca[guc_class], 0);
@@ -646,7 +647,6 @@ static int
guc_capture_prep_lists(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
u32 ads_ggtt, capture_offset, null_ggtt, total_size = 0;
struct guc_gt_system_info local_info;
struct iosys_map info_map;
@@ -751,7 +751,7 @@ guc_capture_prep_lists(struct intel_guc *guc)
}
if (guc->ads_capture_size && guc->ads_capture_size != PAGE_ALIGN(total_size))
- drm_warn(&i915->drm, "GuC->ADS->Capture alloc size changed from %d to %d\n",
+ guc_warn(guc, "ADS capture alloc size changed from %d to %d\n",
guc->ads_capture_size, PAGE_ALIGN(total_size));
return PAGE_ALIGN(total_size);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH v2 4/8] drm/i915/guc: Update GuC messages in intel_guc_ct.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (2 preceding siblings ...)
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 3/8] drm/i915/guc: Update GuC messages in intel_guc_ads.c Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-28 1:12 ` John Harrison
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 5/8] drm/i915/guc: Update GuC messages in intel_guc_fw.c Michal Wajdeczko
` (5 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
v2: drop unused helpers
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 23 ++++-------------------
1 file changed, 4 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 2b22065e87bf..1803a633ed64 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -11,38 +11,23 @@
#include "i915_drv.h"
#include "intel_guc_ct.h"
-#include "gt/intel_gt.h"
+#include "intel_guc_print.h"
static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
{
return container_of(ct, struct intel_guc, ct);
}
-static inline struct intel_gt *ct_to_gt(struct intel_guc_ct *ct)
-{
- return guc_to_gt(ct_to_guc(ct));
-}
-
-static inline struct drm_i915_private *ct_to_i915(struct intel_guc_ct *ct)
-{
- return ct_to_gt(ct)->i915;
-}
-
-static inline struct drm_device *ct_to_drm(struct intel_guc_ct *ct)
-{
- return &ct_to_i915(ct)->drm;
-}
-
#define CT_ERROR(_ct, _fmt, ...) \
- drm_err(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
+ guc_err(ct_to_guc(_ct), "CT: " _fmt, ##__VA_ARGS__)
#ifdef CONFIG_DRM_I915_DEBUG_GUC
#define CT_DEBUG(_ct, _fmt, ...) \
- drm_dbg(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
+ guc_dbg(ct_to_guc(_ct), "CT: " _fmt, ##__VA_ARGS__)
#else
#define CT_DEBUG(...) do { } while (0)
#endif
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
- i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+ guc_probe_error(ct_to_guc(ct), "CT: " _fmt, ##__VA_ARGS__)
/**
* DOC: CTB Blob
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH v2 4/8] drm/i915/guc: Update GuC messages in intel_guc_ct.c
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 4/8] drm/i915/guc: Update GuC messages in intel_guc_ct.c Michal Wajdeczko
@ 2023-01-28 1:12 ` John Harrison
0 siblings, 0 replies; 17+ messages in thread
From: John Harrison @ 2023-01-28 1:12 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: dri-devel
On 1/24/2023 09:05, Michal Wajdeczko wrote:
> Use new macros to have common prefix that also include GT#.
>
> v2: drop unused helpers
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 23 ++++-------------------
> 1 file changed, 4 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> index 2b22065e87bf..1803a633ed64 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> @@ -11,38 +11,23 @@
>
> #include "i915_drv.h"
> #include "intel_guc_ct.h"
> -#include "gt/intel_gt.h"
> +#include "intel_guc_print.h"
>
> static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
> {
> return container_of(ct, struct intel_guc, ct);
> }
>
> -static inline struct intel_gt *ct_to_gt(struct intel_guc_ct *ct)
> -{
> - return guc_to_gt(ct_to_guc(ct));
> -}
> -
> -static inline struct drm_i915_private *ct_to_i915(struct intel_guc_ct *ct)
> -{
> - return ct_to_gt(ct)->i915;
> -}
> -
> -static inline struct drm_device *ct_to_drm(struct intel_guc_ct *ct)
> -{
> - return &ct_to_i915(ct)->drm;
> -}
> -
> #define CT_ERROR(_ct, _fmt, ...) \
> - drm_err(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
> + guc_err(ct_to_guc(_ct), "CT: " _fmt, ##__VA_ARGS__)
> #ifdef CONFIG_DRM_I915_DEBUG_GUC
> #define CT_DEBUG(_ct, _fmt, ...) \
> - drm_dbg(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
> + guc_dbg(ct_to_guc(_ct), "CT: " _fmt, ##__VA_ARGS__)
> #else
> #define CT_DEBUG(...) do { } while (0)
> #endif
> #define CT_PROBE_ERROR(_ct, _fmt, ...) \
> - i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
> + guc_probe_error(ct_to_guc(ct), "CT: " _fmt, ##__VA_ARGS__)
>
> /**
> * DOC: CTB Blob
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Intel-gfx] [PATCH v2 5/8] drm/i915/guc: Update GuC messages in intel_guc_fw.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (3 preceding siblings ...)
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 4/8] drm/i915/guc: Update GuC messages in intel_guc_ct.c Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/guc: Update GuC messages in intel_guc_log.c Michal Wajdeczko
` (4 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 5b86b2e286e0..3d2249bda368 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -13,6 +13,7 @@
#include "gt/intel_gt_mcr.h"
#include "gt/intel_gt_regs.h"
#include "intel_guc_fw.h"
+#include "intel_guc_print.h"
#include "i915_drv.h"
static void guc_prepare_xfer(struct intel_gt *gt)
@@ -103,8 +104,10 @@ static inline bool guc_ready(struct intel_uncore *uncore, u32 *status)
return uk_val == INTEL_GUC_LOAD_STATUS_READY;
}
-static int guc_wait_ucode(struct intel_uncore *uncore)
+static int guc_wait_ucode(struct intel_guc *guc)
{
+ struct intel_gt *gt = guc_to_gt(guc);
+ struct intel_uncore *uncore = gt->uncore;
u32 status;
int ret;
@@ -127,10 +130,8 @@ static int guc_wait_ucode(struct intel_uncore *uncore)
*/
ret = wait_for(guc_ready(uncore, &status), 200);
if (ret) {
- struct drm_device *drm = &uncore->i915->drm;
-
- drm_info(drm, "GuC load failed: status = 0x%08X\n", status);
- drm_info(drm, "GuC load failed: status: Reset = %d, "
+ guc_info(guc, "load failed: status = 0x%08X\n", status);
+ guc_info(guc, "load failed: status: Reset = %d, "
"BootROM = 0x%02X, UKernel = 0x%02X, "
"MIA = 0x%02X, Auth = 0x%02X\n",
REG_FIELD_GET(GS_MIA_IN_RESET, status),
@@ -140,12 +141,12 @@ static int guc_wait_ucode(struct intel_uncore *uncore)
REG_FIELD_GET(GS_AUTH_STATUS_MASK, status));
if ((status & GS_BOOTROM_MASK) == GS_BOOTROM_RSA_FAILED) {
- drm_info(drm, "GuC firmware signature verification failed\n");
+ guc_info(guc, "firmware signature verification failed\n");
ret = -ENOEXEC;
}
if (REG_FIELD_GET(GS_UKERNEL_MASK, status) == INTEL_GUC_LOAD_STATUS_EXCEPTION) {
- drm_info(drm, "GuC firmware exception. EIP: %#x\n",
+ guc_info(guc, "firmware exception. EIP: %#x\n",
intel_uncore_read(uncore, SOFT_SCRATCH(13)));
ret = -ENXIO;
}
@@ -194,7 +195,7 @@ int intel_guc_fw_upload(struct intel_guc *guc)
if (ret)
goto out;
- ret = guc_wait_ucode(uncore);
+ ret = guc_wait_ucode(guc);
if (ret)
goto out;
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH v2 6/8] drm/i915/guc: Update GuC messages in intel_guc_log.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (4 preceding siblings ...)
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 5/8] drm/i915/guc: Update GuC messages in intel_guc_fw.c Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-28 1:20 ` John Harrison
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/guc: Update GuC messages in intel_guc_submission.c Michal Wajdeczko
` (3 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
v2: drop redundant GuC strings, minor improvements
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 37 ++++++++++++----------
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 68331c538b0a..290bb996b667 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -12,6 +12,7 @@
#include "i915_memcpy.h"
#include "intel_guc_capture.h"
#include "intel_guc_log.h"
+#include "intel_guc_print.h"
#if defined(CONFIG_DRM_I915_DEBUG_GUC)
#define GUC_LOG_DEFAULT_CRASH_BUFFER_SIZE SZ_2M
@@ -39,7 +40,6 @@ struct guc_log_section {
static void _guc_log_init_sizes(struct intel_guc_log *log)
{
struct intel_guc *guc = log_to_guc(log);
- struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
static const struct guc_log_section sections[GUC_LOG_SECTIONS_LIMIT] = {
{
GUC_LOG_CRASH_MASK >> GUC_LOG_CRASH_SHIFT,
@@ -82,12 +82,12 @@ static void _guc_log_init_sizes(struct intel_guc_log *log)
}
if (!IS_ALIGNED(log->sizes[i].bytes, log->sizes[i].units))
- drm_err(&i915->drm, "Mis-aligned GuC log %s size: 0x%X vs 0x%X!",
+ guc_err(guc, "Mis-aligned log %s size: 0x%X vs 0x%X!\n",
sections[i].name, log->sizes[i].bytes, log->sizes[i].units);
log->sizes[i].count = log->sizes[i].bytes / log->sizes[i].units;
if (!log->sizes[i].count) {
- drm_err(&i915->drm, "Zero GuC log %s size!", sections[i].name);
+ guc_err(guc, "Zero log %s size!\n", sections[i].name);
} else {
/* Size is +1 unit */
log->sizes[i].count--;
@@ -95,15 +95,17 @@ static void _guc_log_init_sizes(struct intel_guc_log *log)
/* Clip to field size */
if (log->sizes[i].count > sections[i].max) {
- drm_err(&i915->drm, "GuC log %s size too large: %d vs %d!",
+ guc_err(guc, "log %s size too large: %d vs %d!\n",
sections[i].name, log->sizes[i].count + 1, sections[i].max + 1);
log->sizes[i].count = sections[i].max;
}
}
if (log->sizes[GUC_LOG_SECTIONS_CRASH].units != log->sizes[GUC_LOG_SECTIONS_DEBUG].units) {
- drm_err(&i915->drm, "Unit mis-match for GuC log crash and debug sections: %d vs %d!",
+ guc_err(guc, "Unit mis-match between log sections: %s = %d vs %s = %d!\n",
+ sections[GUC_LOG_SECTIONS_CRASH].name,
log->sizes[GUC_LOG_SECTIONS_CRASH].units,
+ sections[GUC_LOG_SECTIONS_DEBUG].name,
log->sizes[GUC_LOG_SECTIONS_DEBUG].units);
log->sizes[GUC_LOG_SECTIONS_CRASH].units = log->sizes[GUC_LOG_SECTIONS_DEBUG].units;
log->sizes[GUC_LOG_SECTIONS_CRASH].count = 0;
@@ -374,6 +376,7 @@ size_t intel_guc_get_log_buffer_offset(struct intel_guc_log *log,
static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
{
+ struct intel_guc *guc = log_to_guc(log);
unsigned int buffer_size, read_offset, write_offset, bytes_to_copy, full_cnt;
struct guc_log_buffer_state *log_buf_state, *log_buf_snapshot_state;
struct guc_log_buffer_state log_buf_state_local;
@@ -383,7 +386,7 @@ static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
mutex_lock(&log->relay.lock);
- if (WARN_ON(!intel_guc_log_relay_created(log)))
+ if (guc_WARN_ON(guc, !intel_guc_log_relay_created(log)))
goto out_unlock;
/* Get the pointer to shared GuC log buffer */
@@ -398,7 +401,7 @@ static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
* Used rate limited to avoid deluge of messages, logs might be
* getting consumed by User at a slow rate.
*/
- DRM_ERROR_RATELIMITED("no sub-buffer to copy general logs\n");
+ guc_err_ratelimited(guc, "no sub-buffer to copy general logs\n");
log->relay.full_count++;
goto out_unlock;
@@ -451,7 +454,7 @@ static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
write_offset = buffer_size;
} else if (unlikely((read_offset > buffer_size) ||
(write_offset > buffer_size))) {
- DRM_ERROR("invalid log buffer state\n");
+ guc_err(guc, "invalid log buffer state\n");
/* copy whole buffer as offsets are unreliable */
read_offset = 0;
write_offset = buffer_size;
@@ -547,7 +550,7 @@ static int guc_log_relay_create(struct intel_guc_log *log)
subbuf_size, n_subbufs,
&relay_callbacks, dev_priv);
if (!guc_log_relay_chan) {
- DRM_ERROR("Couldn't create relay chan for GuC logging\n");
+ guc_err(guc, "Couldn't create relay channel for logging\n");
ret = -ENOMEM;
return ret;
@@ -596,7 +599,7 @@ static u32 __get_default_log_level(struct intel_guc_log *log)
}
if (i915->params.guc_log_level > GUC_LOG_LEVEL_MAX) {
- DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
+ guc_warn(guc, "Incompatible option detected: %s=%d, %s!\n",
"guc_log_level", i915->params.guc_log_level,
"verbosity too high");
return (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
@@ -641,15 +644,15 @@ int intel_guc_log_create(struct intel_guc_log *log)
log->buf_addr = vaddr;
log->level = __get_default_log_level(log);
- DRM_DEBUG_DRIVER("guc_log_level=%d (%s, verbose:%s, verbosity:%d)\n",
- log->level, str_enabled_disabled(log->level),
- str_yes_no(GUC_LOG_LEVEL_IS_VERBOSE(log->level)),
- GUC_LOG_LEVEL_TO_VERBOSITY(log->level));
+ guc_dbg(guc, "guc_log_level=%d (%s, verbose:%s, verbosity:%d)\n",
+ log->level, str_enabled_disabled(log->level),
+ str_yes_no(GUC_LOG_LEVEL_IS_VERBOSE(log->level)),
+ GUC_LOG_LEVEL_TO_VERBOSITY(log->level));
return 0;
err:
- DRM_ERROR("Failed to allocate or map GuC log buffer. %d\n", ret);
+ guc_err(guc, "Failed to allocate or map log buffer %pe\n", ERR_PTR(ret));
return ret;
}
@@ -687,7 +690,7 @@ int intel_guc_log_set_level(struct intel_guc_log *log, u32 level)
GUC_LOG_LEVEL_IS_ENABLED(level),
GUC_LOG_LEVEL_TO_VERBOSITY(level));
if (ret) {
- DRM_DEBUG_DRIVER("guc_log_control action failed %d\n", ret);
+ guc_dbg(guc, "guc_log_control action failed %pe\n", ERR_PTR(ret));
goto out_unlock;
}
@@ -905,7 +908,7 @@ int intel_guc_log_dump(struct intel_guc_log *log, struct drm_printer *p,
map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(map)) {
- DRM_DEBUG("Failed to pin object\n");
+ guc_dbg(guc, "Failed to pin log object: %pe\n", map);
drm_puts(p, "(log data unaccessible)\n");
free_page((unsigned long)page);
return PTR_ERR(map);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH v2 6/8] drm/i915/guc: Update GuC messages in intel_guc_log.c
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/guc: Update GuC messages in intel_guc_log.c Michal Wajdeczko
@ 2023-01-28 1:20 ` John Harrison
0 siblings, 0 replies; 17+ messages in thread
From: John Harrison @ 2023-01-28 1:20 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: dri-devel
On 1/24/2023 09:05, Michal Wajdeczko wrote:
> Use new macros to have common prefix that also include GT#.
>
> v2: drop redundant GuC strings, minor improvements
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 37 ++++++++++++----------
> 1 file changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> index 68331c538b0a..290bb996b667 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> @@ -12,6 +12,7 @@
> #include "i915_memcpy.h"
> #include "intel_guc_capture.h"
> #include "intel_guc_log.h"
> +#include "intel_guc_print.h"
>
> #if defined(CONFIG_DRM_I915_DEBUG_GUC)
> #define GUC_LOG_DEFAULT_CRASH_BUFFER_SIZE SZ_2M
> @@ -39,7 +40,6 @@ struct guc_log_section {
> static void _guc_log_init_sizes(struct intel_guc_log *log)
> {
> struct intel_guc *guc = log_to_guc(log);
> - struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> static const struct guc_log_section sections[GUC_LOG_SECTIONS_LIMIT] = {
> {
> GUC_LOG_CRASH_MASK >> GUC_LOG_CRASH_SHIFT,
> @@ -82,12 +82,12 @@ static void _guc_log_init_sizes(struct intel_guc_log *log)
> }
>
> if (!IS_ALIGNED(log->sizes[i].bytes, log->sizes[i].units))
> - drm_err(&i915->drm, "Mis-aligned GuC log %s size: 0x%X vs 0x%X!",
> + guc_err(guc, "Mis-aligned log %s size: 0x%X vs 0x%X!\n",
> sections[i].name, log->sizes[i].bytes, log->sizes[i].units);
> log->sizes[i].count = log->sizes[i].bytes / log->sizes[i].units;
>
> if (!log->sizes[i].count) {
> - drm_err(&i915->drm, "Zero GuC log %s size!", sections[i].name);
> + guc_err(guc, "Zero log %s size!\n", sections[i].name);
> } else {
> /* Size is +1 unit */
> log->sizes[i].count--;
> @@ -95,15 +95,17 @@ static void _guc_log_init_sizes(struct intel_guc_log *log)
>
> /* Clip to field size */
> if (log->sizes[i].count > sections[i].max) {
> - drm_err(&i915->drm, "GuC log %s size too large: %d vs %d!",
> + guc_err(guc, "log %s size too large: %d vs %d!\n",
> sections[i].name, log->sizes[i].count + 1, sections[i].max + 1);
> log->sizes[i].count = sections[i].max;
> }
> }
>
> if (log->sizes[GUC_LOG_SECTIONS_CRASH].units != log->sizes[GUC_LOG_SECTIONS_DEBUG].units) {
> - drm_err(&i915->drm, "Unit mis-match for GuC log crash and debug sections: %d vs %d!",
> + guc_err(guc, "Unit mis-match between log sections: %s = %d vs %s = %d!\n",
> + sections[GUC_LOG_SECTIONS_CRASH].name,
> log->sizes[GUC_LOG_SECTIONS_CRASH].units,
> + sections[GUC_LOG_SECTIONS_DEBUG].name,
Sorry, didn't get to reply to your comment in time. This can only be a
mis-match between crash and debug. And the 'name' field is just a string
version of the array index enum. So I would have just gone with "Unit
mismatch for crash and debug sections: %d vs %d".
> log->sizes[GUC_LOG_SECTIONS_DEBUG].units);
> log->sizes[GUC_LOG_SECTIONS_CRASH].units = log->sizes[GUC_LOG_SECTIONS_DEBUG].units;
> log->sizes[GUC_LOG_SECTIONS_CRASH].count = 0;
> @@ -374,6 +376,7 @@ size_t intel_guc_get_log_buffer_offset(struct intel_guc_log *log,
>
> static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
> {
> + struct intel_guc *guc = log_to_guc(log);
> unsigned int buffer_size, read_offset, write_offset, bytes_to_copy, full_cnt;
> struct guc_log_buffer_state *log_buf_state, *log_buf_snapshot_state;
> struct guc_log_buffer_state log_buf_state_local;
> @@ -383,7 +386,7 @@ static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
>
> mutex_lock(&log->relay.lock);
>
> - if (WARN_ON(!intel_guc_log_relay_created(log)))
> + if (guc_WARN_ON(guc, !intel_guc_log_relay_created(log)))
> goto out_unlock;
>
> /* Get the pointer to shared GuC log buffer */
> @@ -398,7 +401,7 @@ static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
> * Used rate limited to avoid deluge of messages, logs might be
> * getting consumed by User at a slow rate.
> */
> - DRM_ERROR_RATELIMITED("no sub-buffer to copy general logs\n");
> + guc_err_ratelimited(guc, "no sub-buffer to copy general logs\n");
> log->relay.full_count++;
>
> goto out_unlock;
> @@ -451,7 +454,7 @@ static void _guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log)
> write_offset = buffer_size;
> } else if (unlikely((read_offset > buffer_size) ||
> (write_offset > buffer_size))) {
> - DRM_ERROR("invalid log buffer state\n");
> + guc_err(guc, "invalid log buffer state\n");
> /* copy whole buffer as offsets are unreliable */
> read_offset = 0;
> write_offset = buffer_size;
> @@ -547,7 +550,7 @@ static int guc_log_relay_create(struct intel_guc_log *log)
> subbuf_size, n_subbufs,
> &relay_callbacks, dev_priv);
> if (!guc_log_relay_chan) {
> - DRM_ERROR("Couldn't create relay chan for GuC logging\n");
> + guc_err(guc, "Couldn't create relay channel for logging\n");
>
> ret = -ENOMEM;
> return ret;
> @@ -596,7 +599,7 @@ static u32 __get_default_log_level(struct intel_guc_log *log)
> }
>
> if (i915->params.guc_log_level > GUC_LOG_LEVEL_MAX) {
> - DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
> + guc_warn(guc, "Incompatible option detected: %s=%d, %s!\n",
> "guc_log_level", i915->params.guc_log_level,
> "verbosity too high");
Missed this in the previous patch set but this is a weird warning! Why
have fixed strings printed via %s?! Seems like it would be better to have:
guc_warn(guc, "Log verbosity param out of range: %d vs %d",
i915->params.guc_log_level, GUC_LOG_LEVEL_MAX);
John.
> return (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
> @@ -641,15 +644,15 @@ int intel_guc_log_create(struct intel_guc_log *log)
> log->buf_addr = vaddr;
>
> log->level = __get_default_log_level(log);
> - DRM_DEBUG_DRIVER("guc_log_level=%d (%s, verbose:%s, verbosity:%d)\n",
> - log->level, str_enabled_disabled(log->level),
> - str_yes_no(GUC_LOG_LEVEL_IS_VERBOSE(log->level)),
> - GUC_LOG_LEVEL_TO_VERBOSITY(log->level));
> + guc_dbg(guc, "guc_log_level=%d (%s, verbose:%s, verbosity:%d)\n",
> + log->level, str_enabled_disabled(log->level),
> + str_yes_no(GUC_LOG_LEVEL_IS_VERBOSE(log->level)),
> + GUC_LOG_LEVEL_TO_VERBOSITY(log->level));
>
> return 0;
>
> err:
> - DRM_ERROR("Failed to allocate or map GuC log buffer. %d\n", ret);
> + guc_err(guc, "Failed to allocate or map log buffer %pe\n", ERR_PTR(ret));
> return ret;
> }
>
> @@ -687,7 +690,7 @@ int intel_guc_log_set_level(struct intel_guc_log *log, u32 level)
> GUC_LOG_LEVEL_IS_ENABLED(level),
> GUC_LOG_LEVEL_TO_VERBOSITY(level));
> if (ret) {
> - DRM_DEBUG_DRIVER("guc_log_control action failed %d\n", ret);
> + guc_dbg(guc, "guc_log_control action failed %pe\n", ERR_PTR(ret));
> goto out_unlock;
> }
>
> @@ -905,7 +908,7 @@ int intel_guc_log_dump(struct intel_guc_log *log, struct drm_printer *p,
>
> map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
> if (IS_ERR(map)) {
> - DRM_DEBUG("Failed to pin object\n");
> + guc_dbg(guc, "Failed to pin log object: %pe\n", map);
> drm_puts(p, "(log data unaccessible)\n");
> free_page((unsigned long)page);
> return PTR_ERR(map);
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Intel-gfx] [PATCH v2 7/8] drm/i915/guc: Update GuC messages in intel_guc_submission.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (5 preceding siblings ...)
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/guc: Update GuC messages in intel_guc_log.c Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-28 1:22 ` John Harrison
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 8/8] drm/i915/guc: Update GT/GuC messages in intel_uc.c Michal Wajdeczko
` (2 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
v2: improve few existing messages
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 61 ++++++++-----------
1 file changed, 26 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index b436dd7f12e4..b2250181f31b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -27,6 +27,7 @@
#include "intel_guc_ads.h"
#include "intel_guc_capture.h"
+#include "intel_guc_print.h"
#include "intel_guc_submission.h"
#include "i915_drv.h"
@@ -1443,8 +1444,7 @@ static void guc_init_engine_stats(struct intel_guc *guc)
int ret = guc_action_enable_usage_stats(guc);
if (ret)
- drm_err(>->i915->drm,
- "Failed to enable usage stats: %d!\n", ret);
+ guc_err(guc, "Failed to enable usage stats: %pe\n", ERR_PTR(ret));
}
}
@@ -3585,8 +3585,7 @@ static int guc_request_alloc(struct i915_request *rq)
intel_context_sched_disable_unpin(ce);
else if (intel_context_is_closed(ce))
if (wait_for(context_close_done(ce), 1500))
- drm_warn(&guc_to_gt(guc)->i915->drm,
- "timed out waiting on context sched close before realloc\n");
+ guc_warn(guc, "timed out waiting on context sched close before realloc\n");
/*
* Call pin_guc_id here rather than in the pinning step as with
* dma_resv, contexts can be repeatedly pinned / unpinned trashing the
@@ -4349,11 +4348,14 @@ static int __guc_action_set_scheduling_policies(struct intel_guc *guc,
ret = intel_guc_send(guc, (u32 *)&policy->h2g,
__guc_scheduling_policy_action_size(policy));
- if (ret < 0)
+ if (ret < 0) {
+ guc_probe_error(guc, "Failed to configure global scheduling policies: %pe!\n",
+ ERR_PTR(ret));
return ret;
+ }
if (ret != policy->count) {
- drm_warn(&guc_to_gt(guc)->i915->drm, "GuC global scheduler policy processed %d of %d KLVs!",
+ guc_warn(guc, "global scheduler policy processed %d of %d KLVs!",
ret, policy->count);
if (ret > policy->count)
return -EPROTO;
@@ -4367,7 +4369,7 @@ static int guc_init_global_schedule_policy(struct intel_guc *guc)
struct scheduling_policy policy;
struct intel_gt *gt = guc_to_gt(guc);
intel_wakeref_t wakeref;
- int ret = 0;
+ int ret;
if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
return 0;
@@ -4385,10 +4387,6 @@ static int guc_init_global_schedule_policy(struct intel_guc *guc)
yield, ARRAY_SIZE(yield));
ret = __guc_action_set_scheduling_policies(guc, &policy);
- if (ret)
- i915_probe_error(gt->i915,
- "Failed to configure global scheduling policies: %pe!\n",
- ERR_PTR(ret));
}
return ret;
@@ -4487,21 +4485,18 @@ g2h_context_lookup(struct intel_guc *guc, u32 ctx_id)
struct intel_context *ce;
if (unlikely(ctx_id >= GUC_MAX_CONTEXT_ID)) {
- drm_err(&guc_to_gt(guc)->i915->drm,
- "Invalid ctx_id %u\n", ctx_id);
+ guc_err(guc, "Invalid ctx_id %u\n", ctx_id);
return NULL;
}
ce = __get_context(guc, ctx_id);
if (unlikely(!ce)) {
- drm_err(&guc_to_gt(guc)->i915->drm,
- "Context is NULL, ctx_id %u\n", ctx_id);
+ guc_err(guc, "Context is NULL, ctx_id %u\n", ctx_id);
return NULL;
}
if (unlikely(intel_context_is_child(ce))) {
- drm_err(&guc_to_gt(guc)->i915->drm,
- "Context is child, ctx_id %u\n", ctx_id);
+ guc_err(guc, "Context is child, ctx_id %u\n", ctx_id);
return NULL;
}
@@ -4516,7 +4511,7 @@ int intel_guc_deregister_done_process_msg(struct intel_guc *guc,
u32 ctx_id;
if (unlikely(len < 1)) {
- drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u\n", len);
+ guc_err(guc, "Invalid length %u\n", len);
return -EPROTO;
}
ctx_id = msg[0];
@@ -4568,7 +4563,7 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc,
u32 ctx_id;
if (unlikely(len < 2)) {
- drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u\n", len);
+ guc_err(guc, "Invalid length %u\n", len);
return -EPROTO;
}
ctx_id = msg[0];
@@ -4580,8 +4575,7 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc,
if (unlikely(context_destroyed(ce) ||
(!context_pending_enable(ce) &&
!context_pending_disable(ce)))) {
- drm_err(&guc_to_gt(guc)->i915->drm,
- "Bad context sched_state 0x%x, ctx_id %u\n",
+ guc_err(guc, "Bad context sched_state 0x%x, ctx_id %u\n",
ce->guc_state.sched_state, ctx_id);
return -EPROTO;
}
@@ -4669,8 +4663,7 @@ static void guc_handle_context_reset(struct intel_guc *guc,
capture_error_state(guc, ce);
guc_context_replay(ce);
} else {
- drm_info(&guc_to_gt(guc)->i915->drm,
- "Ignoring context reset notification of exiting context 0x%04X on %s",
+ guc_info(guc, "Ignoring context reset notification of exiting context 0x%04X on %s",
ce->guc_id.id, ce->engine->name);
}
}
@@ -4683,7 +4676,7 @@ int intel_guc_context_reset_process_msg(struct intel_guc *guc,
int ctx_id;
if (unlikely(len != 1)) {
- drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u", len);
+ guc_err(guc, "Invalid length %u", len);
return -EPROTO;
}
@@ -4716,13 +4709,13 @@ int intel_guc_error_capture_process_msg(struct intel_guc *guc,
u32 status;
if (unlikely(len != 1)) {
- drm_dbg(&guc_to_gt(guc)->i915->drm, "Invalid length %u", len);
+ guc_dbg(guc, "Invalid length %u", len);
return -EPROTO;
}
status = msg[0] & INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
if (status == INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
- drm_warn(&guc_to_gt(guc)->i915->drm, "G2H-Error capture no space");
+ guc_warn(guc, "No space for error capture");
intel_guc_capture_process(guc);
@@ -4765,13 +4758,12 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
const u32 *msg, u32 len)
{
struct intel_engine_cs *engine;
- struct intel_gt *gt = guc_to_gt(guc);
u8 guc_class, instance;
u32 reason;
unsigned long flags;
if (unlikely(len != 3)) {
- drm_err(>->i915->drm, "Invalid length %u", len);
+ guc_err(guc, "Invalid length %u", len);
return -EPROTO;
}
@@ -4781,8 +4773,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
engine = intel_guc_lookup_engine(guc, guc_class, instance);
if (unlikely(!engine)) {
- drm_err(>->i915->drm,
- "Invalid engine %d:%d", guc_class, instance);
+ guc_err(guc, "Invalid engine %d:%d", guc_class, instance);
return -EPROTO;
}
@@ -4790,7 +4781,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
* This is an unexpected failure of a hardware feature. So, log a real
* error message not just the informational that comes with the reset.
*/
- drm_err(>->i915->drm, "GuC engine reset request failed on %d:%d (%s) because 0x%08X",
+ guc_err(guc, "Engine reset failed on %d:%d (%s) because 0x%08X",
guc_class, instance, engine->name, reason);
spin_lock_irqsave(&guc->submission_state.lock, flags);
@@ -5342,8 +5333,8 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ guc_dbg(guc, "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -5352,8 +5343,8 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
ve->base.logical_mask |= sibling->logical_mask;
if (n != 0 && ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ guc_dbg(guc, "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
} else if (n == 0) {
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH v2 7/8] drm/i915/guc: Update GuC messages in intel_guc_submission.c
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/guc: Update GuC messages in intel_guc_submission.c Michal Wajdeczko
@ 2023-01-28 1:22 ` John Harrison
0 siblings, 0 replies; 17+ messages in thread
From: John Harrison @ 2023-01-28 1:22 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: dri-devel
On 1/24/2023 09:05, Michal Wajdeczko wrote:
> Use new macros to have common prefix that also include GT#.
>
> v2: improve few existing messages
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 61 ++++++++-----------
> 1 file changed, 26 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index b436dd7f12e4..b2250181f31b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -27,6 +27,7 @@
>
> #include "intel_guc_ads.h"
> #include "intel_guc_capture.h"
> +#include "intel_guc_print.h"
> #include "intel_guc_submission.h"
>
> #include "i915_drv.h"
> @@ -1443,8 +1444,7 @@ static void guc_init_engine_stats(struct intel_guc *guc)
> int ret = guc_action_enable_usage_stats(guc);
>
> if (ret)
> - drm_err(>->i915->drm,
> - "Failed to enable usage stats: %d!\n", ret);
> + guc_err(guc, "Failed to enable usage stats: %pe\n", ERR_PTR(ret));
> }
> }
>
> @@ -3585,8 +3585,7 @@ static int guc_request_alloc(struct i915_request *rq)
> intel_context_sched_disable_unpin(ce);
> else if (intel_context_is_closed(ce))
> if (wait_for(context_close_done(ce), 1500))
> - drm_warn(&guc_to_gt(guc)->i915->drm,
> - "timed out waiting on context sched close before realloc\n");
> + guc_warn(guc, "timed out waiting on context sched close before realloc\n");
> /*
> * Call pin_guc_id here rather than in the pinning step as with
> * dma_resv, contexts can be repeatedly pinned / unpinned trashing the
> @@ -4349,11 +4348,14 @@ static int __guc_action_set_scheduling_policies(struct intel_guc *guc,
>
> ret = intel_guc_send(guc, (u32 *)&policy->h2g,
> __guc_scheduling_policy_action_size(policy));
> - if (ret < 0)
> + if (ret < 0) {
> + guc_probe_error(guc, "Failed to configure global scheduling policies: %pe!\n",
> + ERR_PTR(ret));
> return ret;
> + }
>
> if (ret != policy->count) {
> - drm_warn(&guc_to_gt(guc)->i915->drm, "GuC global scheduler policy processed %d of %d KLVs!",
> + guc_warn(guc, "global scheduler policy processed %d of %d KLVs!",
> ret, policy->count);
> if (ret > policy->count)
> return -EPROTO;
> @@ -4367,7 +4369,7 @@ static int guc_init_global_schedule_policy(struct intel_guc *guc)
> struct scheduling_policy policy;
> struct intel_gt *gt = guc_to_gt(guc);
> intel_wakeref_t wakeref;
> - int ret = 0;
> + int ret;
>
> if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
> return 0;
> @@ -4385,10 +4387,6 @@ static int guc_init_global_schedule_policy(struct intel_guc *guc)
> yield, ARRAY_SIZE(yield));
>
> ret = __guc_action_set_scheduling_policies(guc, &policy);
> - if (ret)
> - i915_probe_error(gt->i915,
> - "Failed to configure global scheduling policies: %pe!\n",
> - ERR_PTR(ret));
> }
>
> return ret;
> @@ -4487,21 +4485,18 @@ g2h_context_lookup(struct intel_guc *guc, u32 ctx_id)
> struct intel_context *ce;
>
> if (unlikely(ctx_id >= GUC_MAX_CONTEXT_ID)) {
> - drm_err(&guc_to_gt(guc)->i915->drm,
> - "Invalid ctx_id %u\n", ctx_id);
> + guc_err(guc, "Invalid ctx_id %u\n", ctx_id);
> return NULL;
> }
>
> ce = __get_context(guc, ctx_id);
> if (unlikely(!ce)) {
> - drm_err(&guc_to_gt(guc)->i915->drm,
> - "Context is NULL, ctx_id %u\n", ctx_id);
> + guc_err(guc, "Context is NULL, ctx_id %u\n", ctx_id);
> return NULL;
> }
>
> if (unlikely(intel_context_is_child(ce))) {
> - drm_err(&guc_to_gt(guc)->i915->drm,
> - "Context is child, ctx_id %u\n", ctx_id);
> + guc_err(guc, "Context is child, ctx_id %u\n", ctx_id);
> return NULL;
> }
>
> @@ -4516,7 +4511,7 @@ int intel_guc_deregister_done_process_msg(struct intel_guc *guc,
> u32 ctx_id;
>
> if (unlikely(len < 1)) {
> - drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u\n", len);
> + guc_err(guc, "Invalid length %u\n", len);
> return -EPROTO;
> }
> ctx_id = msg[0];
> @@ -4568,7 +4563,7 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc,
> u32 ctx_id;
>
> if (unlikely(len < 2)) {
> - drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u\n", len);
> + guc_err(guc, "Invalid length %u\n", len);
> return -EPROTO;
> }
> ctx_id = msg[0];
> @@ -4580,8 +4575,7 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc,
> if (unlikely(context_destroyed(ce) ||
> (!context_pending_enable(ce) &&
> !context_pending_disable(ce)))) {
> - drm_err(&guc_to_gt(guc)->i915->drm,
> - "Bad context sched_state 0x%x, ctx_id %u\n",
> + guc_err(guc, "Bad context sched_state 0x%x, ctx_id %u\n",
> ce->guc_state.sched_state, ctx_id);
> return -EPROTO;
> }
> @@ -4669,8 +4663,7 @@ static void guc_handle_context_reset(struct intel_guc *guc,
> capture_error_state(guc, ce);
> guc_context_replay(ce);
> } else {
> - drm_info(&guc_to_gt(guc)->i915->drm,
> - "Ignoring context reset notification of exiting context 0x%04X on %s",
> + guc_info(guc, "Ignoring context reset notification of exiting context 0x%04X on %s",
> ce->guc_id.id, ce->engine->name);
> }
> }
> @@ -4683,7 +4676,7 @@ int intel_guc_context_reset_process_msg(struct intel_guc *guc,
> int ctx_id;
>
> if (unlikely(len != 1)) {
> - drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u", len);
> + guc_err(guc, "Invalid length %u", len);
> return -EPROTO;
> }
>
> @@ -4716,13 +4709,13 @@ int intel_guc_error_capture_process_msg(struct intel_guc *guc,
> u32 status;
>
> if (unlikely(len != 1)) {
> - drm_dbg(&guc_to_gt(guc)->i915->drm, "Invalid length %u", len);
> + guc_dbg(guc, "Invalid length %u", len);
> return -EPROTO;
> }
>
> status = msg[0] & INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
> if (status == INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
> - drm_warn(&guc_to_gt(guc)->i915->drm, "G2H-Error capture no space");
> + guc_warn(guc, "No space for error capture");
>
> intel_guc_capture_process(guc);
>
> @@ -4765,13 +4758,12 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
> const u32 *msg, u32 len)
> {
> struct intel_engine_cs *engine;
> - struct intel_gt *gt = guc_to_gt(guc);
> u8 guc_class, instance;
> u32 reason;
> unsigned long flags;
>
> if (unlikely(len != 3)) {
> - drm_err(>->i915->drm, "Invalid length %u", len);
> + guc_err(guc, "Invalid length %u", len);
> return -EPROTO;
> }
>
> @@ -4781,8 +4773,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
>
> engine = intel_guc_lookup_engine(guc, guc_class, instance);
> if (unlikely(!engine)) {
> - drm_err(>->i915->drm,
> - "Invalid engine %d:%d", guc_class, instance);
> + guc_err(guc, "Invalid engine %d:%d", guc_class, instance);
> return -EPROTO;
> }
>
> @@ -4790,7 +4781,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
> * This is an unexpected failure of a hardware feature. So, log a real
> * error message not just the informational that comes with the reset.
> */
> - drm_err(>->i915->drm, "GuC engine reset request failed on %d:%d (%s) because 0x%08X",
> + guc_err(guc, "Engine reset failed on %d:%d (%s) because 0x%08X",
> guc_class, instance, engine->name, reason);
>
> spin_lock_irqsave(&guc->submission_state.lock, flags);
> @@ -5342,8 +5333,8 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + guc_dbg(guc, "duplicate %s entry in load balancer\n",
> + sibling->name);
> err = -EINVAL;
> goto err_put;
> }
> @@ -5352,8 +5343,8 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> ve->base.logical_mask |= sibling->logical_mask;
>
> if (n != 0 && ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + guc_dbg(guc, "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> } else if (n == 0) {
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Intel-gfx] [PATCH v2 8/8] drm/i915/guc: Update GT/GuC messages in intel_uc.c
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (6 preceding siblings ...)
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/guc: Update GuC messages in intel_guc_submission.c Michal Wajdeczko
@ 2023-01-24 17:05 ` Michal Wajdeczko
2023-01-28 1:26 ` John Harrison
2023-01-24 23:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success for GuC oriented print macros (rev2) Patchwork
2023-01-25 4:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
9 siblings, 1 reply; 17+ messages in thread
From: Michal Wajdeczko @ 2023-01-24 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Use new macros to have common prefix that also include GT#.
v2: pass gt to print_fw_ver
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 80 +++++++++++++--------------
1 file changed, 39 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 9a8a1abf71d7..a750966ddcab 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -6,11 +6,13 @@
#include <linux/string_helpers.h>
#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
#include "gt/intel_reset.h"
#include "intel_gsc_fw.h"
#include "intel_gsc_uc.h"
#include "intel_guc.h"
#include "intel_guc_ads.h"
+#include "intel_guc_print.h"
#include "intel_guc_submission.h"
#include "gt/intel_rps.h"
#include "intel_uc.h"
@@ -67,14 +69,14 @@ static int __intel_uc_reset_hw(struct intel_uc *uc)
ret = intel_reset_guc(gt);
if (ret) {
- DRM_ERROR("Failed to reset GuC, ret = %d\n", ret);
+ gt_err(gt, "Failed to reset GuC, ret = %d\n", ret);
return ret;
}
guc_status = intel_uncore_read(gt->uncore, GUC_STATUS);
- WARN(!(guc_status & GS_MIA_IN_RESET),
- "GuC status: 0x%x, MIA core expected to be in reset\n",
- guc_status);
+ gt_WARN(gt, !(guc_status & GS_MIA_IN_RESET),
+ "GuC status: 0x%x, MIA core expected to be in reset\n",
+ guc_status);
return ret;
}
@@ -252,15 +254,13 @@ static int guc_enable_communication(struct intel_guc *guc)
intel_guc_ct_event_handler(&guc->ct);
spin_unlock_irq(gt->irq_lock);
- drm_dbg(&i915->drm, "GuC communication enabled\n");
+ guc_dbg(guc, "communication enabled\n");
return 0;
}
static void guc_disable_communication(struct intel_guc *guc)
{
- struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
-
/*
* Events generated during or after CT disable are logged by guc in
* via mmio. Make sure the register is clear before disabling CT since
@@ -280,11 +280,12 @@ static void guc_disable_communication(struct intel_guc *guc)
*/
guc_get_mmio_msg(guc);
- drm_dbg(&i915->drm, "GuC communication disabled\n");
+ guc_dbg(guc, "communication disabled\n");
}
static void __uc_fetch_firmwares(struct intel_uc *uc)
{
+ struct intel_gt *gt = uc_to_gt(uc);
int err;
GEM_BUG_ON(!intel_uc_wants_guc(uc));
@@ -293,15 +294,13 @@ static void __uc_fetch_firmwares(struct intel_uc *uc)
if (err) {
/* Make sure we transition out of transient "SELECTED" state */
if (intel_uc_wants_huc(uc)) {
- drm_dbg(&uc_to_gt(uc)->i915->drm,
- "Failed to fetch GuC: %d disabling HuC\n", err);
+ gt_dbg(gt, "Failed to fetch GuC fw (%pe) disabling HuC\n", ERR_PTR(err));
intel_uc_fw_change_status(&uc->huc.fw,
INTEL_UC_FIRMWARE_ERROR);
}
if (intel_uc_wants_gsc_uc(uc)) {
- drm_dbg(&uc_to_gt(uc)->i915->drm,
- "Failed to fetch GuC: %d disabling GSC\n", err);
+ gt_dbg(gt, "Failed to fetch GuC fw (%pe) disabling GSC\n", ERR_PTR(err));
intel_uc_fw_change_status(&uc->gsc.fw,
INTEL_UC_FIRMWARE_ERROR);
}
@@ -382,7 +381,7 @@ static int uc_init_wopcm(struct intel_uc *uc)
int err;
if (unlikely(!base || !size)) {
- i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n");
+ gt_probe_error(gt, "Unsuccessful WOPCM partitioning\n");
return -E2BIG;
}
@@ -413,13 +412,13 @@ static int uc_init_wopcm(struct intel_uc *uc)
return 0;
err_out:
- i915_probe_error(gt->i915, "Failed to init uC WOPCM registers!\n");
- i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
- i915_mmio_reg_offset(DMA_GUC_WOPCM_OFFSET),
- intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
- i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
- i915_mmio_reg_offset(GUC_WOPCM_SIZE),
- intel_uncore_read(uncore, GUC_WOPCM_SIZE));
+ gt_probe_error(gt, "Failed to init uC WOPCM registers!\n");
+ gt_probe_error(gt, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
+ i915_mmio_reg_offset(DMA_GUC_WOPCM_OFFSET),
+ intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
+ gt_probe_error(gt, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
+ i915_mmio_reg_offset(GUC_WOPCM_SIZE),
+ intel_uncore_read(uncore, GUC_WOPCM_SIZE));
return err;
}
@@ -449,20 +448,19 @@ static int __uc_check_hw(struct intel_uc *uc)
return 0;
}
-static void print_fw_ver(struct intel_uc *uc, struct intel_uc_fw *fw)
+static void print_fw_ver(struct intel_gt *gt, struct intel_uc_fw *fw)
{
- struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
-
- drm_info(&i915->drm, "%s firmware %s version %u.%u.%u\n",
- intel_uc_fw_type_repr(fw->type), fw->file_selected.path,
- fw->file_selected.ver.major,
- fw->file_selected.ver.minor,
- fw->file_selected.ver.patch);
+ gt_info(gt, "%s firmware %s version %u.%u.%u\n",
+ intel_uc_fw_type_repr(fw->type), fw->file_selected.path,
+ fw->file_selected.ver.major,
+ fw->file_selected.ver.minor,
+ fw->file_selected.ver.patch);
}
static int __uc_init_hw(struct intel_uc *uc)
{
- struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
+ struct intel_gt *gt = uc_to_gt(uc);
+ struct drm_i915_private *i915 = gt->i915;
struct intel_guc *guc = &uc->guc;
struct intel_huc *huc = &uc->huc;
int ret, attempts;
@@ -470,10 +468,10 @@ static int __uc_init_hw(struct intel_uc *uc)
GEM_BUG_ON(!intel_uc_supports_guc(uc));
GEM_BUG_ON(!intel_uc_wants_guc(uc));
- print_fw_ver(uc, &guc->fw);
+ print_fw_ver(gt, &guc->fw);
if (intel_uc_uses_huc(uc))
- print_fw_ver(uc, &huc->fw);
+ print_fw_ver(gt, &huc->fw);
if (!intel_uc_fw_is_loadable(&guc->fw)) {
ret = __uc_check_hw(uc) ||
@@ -514,8 +512,8 @@ static int __uc_init_hw(struct intel_uc *uc)
if (ret == 0)
break;
- DRM_DEBUG_DRIVER("GuC fw load failed: %d; will reset and "
- "retry %d more time(s)\n", ret, attempts);
+ gt_dbg(gt, "GuC fw load failed (%pe) will reset and retry %d more time(s)\n",
+ ERR_PTR(ret), attempts);
}
/* Did we succeded or run out of retries? */
@@ -551,10 +549,10 @@ static int __uc_init_hw(struct intel_uc *uc)
intel_gsc_uc_load_start(&uc->gsc);
- drm_info(&i915->drm, "GuC submission %s\n",
- str_enabled_disabled(intel_uc_uses_guc_submission(uc)));
- drm_info(&i915->drm, "GuC SLPC %s\n",
- str_enabled_disabled(intel_uc_uses_guc_slpc(uc)));
+ gt_info(gt, "GuC submission %s\n",
+ str_enabled_disabled(intel_uc_uses_guc_submission(uc)));
+ gt_info(gt, "GuC SLPC %s\n",
+ str_enabled_disabled(intel_uc_uses_guc_slpc(uc)));
return 0;
@@ -572,12 +570,12 @@ static int __uc_init_hw(struct intel_uc *uc)
__uc_sanitize(uc);
if (!ret) {
- drm_notice(&i915->drm, "GuC is uninitialized\n");
+ gt_notice(gt, "GuC is uninitialized\n");
/* We want to run without GuC submission */
return 0;
}
- i915_probe_error(i915, "GuC initialization failed %d\n", ret);
+ gt_probe_error(gt, "GuC initialization failed %pe\n", ERR_PTR(ret));
/* We want to keep KMS alive */
return -EIO;
@@ -690,7 +688,7 @@ void intel_uc_suspend(struct intel_uc *uc)
with_intel_runtime_pm(&uc_to_gt(uc)->i915->runtime_pm, wakeref) {
err = intel_guc_suspend(guc);
if (err)
- DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
+ gt_dbg(uc_to_gt(uc), "Failed to suspend GuC, %pe", ERR_PTR(err));
}
}
@@ -718,7 +716,7 @@ static int __uc_resume(struct intel_uc *uc, bool enable_communication)
err = intel_guc_resume(guc);
if (err) {
- DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
+ gt_dbg(gt, "Failed to resume GuC, %pe", ERR_PTR(err));
return err;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH v2 8/8] drm/i915/guc: Update GT/GuC messages in intel_uc.c
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 8/8] drm/i915/guc: Update GT/GuC messages in intel_uc.c Michal Wajdeczko
@ 2023-01-28 1:26 ` John Harrison
0 siblings, 0 replies; 17+ messages in thread
From: John Harrison @ 2023-01-28 1:26 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx; +Cc: dri-devel
On 1/24/2023 09:05, Michal Wajdeczko wrote:
> Use new macros to have common prefix that also include GT#.
>
> v2: pass gt to print_fw_ver
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 80 +++++++++++++--------------
> 1 file changed, 39 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 9a8a1abf71d7..a750966ddcab 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -6,11 +6,13 @@
> #include <linux/string_helpers.h>
>
> #include "gt/intel_gt.h"
> +#include "gt/intel_gt_print.h"
> #include "gt/intel_reset.h"
> #include "intel_gsc_fw.h"
> #include "intel_gsc_uc.h"
> #include "intel_guc.h"
> #include "intel_guc_ads.h"
> +#include "intel_guc_print.h"
> #include "intel_guc_submission.h"
> #include "gt/intel_rps.h"
> #include "intel_uc.h"
> @@ -67,14 +69,14 @@ static int __intel_uc_reset_hw(struct intel_uc *uc)
>
> ret = intel_reset_guc(gt);
> if (ret) {
> - DRM_ERROR("Failed to reset GuC, ret = %d\n", ret);
> + gt_err(gt, "Failed to reset GuC, ret = %d\n", ret);
> return ret;
> }
>
> guc_status = intel_uncore_read(gt->uncore, GUC_STATUS);
> - WARN(!(guc_status & GS_MIA_IN_RESET),
> - "GuC status: 0x%x, MIA core expected to be in reset\n",
> - guc_status);
> + gt_WARN(gt, !(guc_status & GS_MIA_IN_RESET),
> + "GuC status: 0x%x, MIA core expected to be in reset\n",
> + guc_status);
>
> return ret;
> }
> @@ -252,15 +254,13 @@ static int guc_enable_communication(struct intel_guc *guc)
> intel_guc_ct_event_handler(&guc->ct);
> spin_unlock_irq(gt->irq_lock);
>
> - drm_dbg(&i915->drm, "GuC communication enabled\n");
> + guc_dbg(guc, "communication enabled\n");
>
> return 0;
> }
>
> static void guc_disable_communication(struct intel_guc *guc)
> {
> - struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> -
> /*
> * Events generated during or after CT disable are logged by guc in
> * via mmio. Make sure the register is clear before disabling CT since
> @@ -280,11 +280,12 @@ static void guc_disable_communication(struct intel_guc *guc)
> */
> guc_get_mmio_msg(guc);
>
> - drm_dbg(&i915->drm, "GuC communication disabled\n");
> + guc_dbg(guc, "communication disabled\n");
> }
>
> static void __uc_fetch_firmwares(struct intel_uc *uc)
> {
> + struct intel_gt *gt = uc_to_gt(uc);
> int err;
>
> GEM_BUG_ON(!intel_uc_wants_guc(uc));
> @@ -293,15 +294,13 @@ static void __uc_fetch_firmwares(struct intel_uc *uc)
> if (err) {
> /* Make sure we transition out of transient "SELECTED" state */
> if (intel_uc_wants_huc(uc)) {
> - drm_dbg(&uc_to_gt(uc)->i915->drm,
> - "Failed to fetch GuC: %d disabling HuC\n", err);
> + gt_dbg(gt, "Failed to fetch GuC fw (%pe) disabling HuC\n", ERR_PTR(err));
> intel_uc_fw_change_status(&uc->huc.fw,
> INTEL_UC_FIRMWARE_ERROR);
> }
>
> if (intel_uc_wants_gsc_uc(uc)) {
> - drm_dbg(&uc_to_gt(uc)->i915->drm,
> - "Failed to fetch GuC: %d disabling GSC\n", err);
> + gt_dbg(gt, "Failed to fetch GuC fw (%pe) disabling GSC\n", ERR_PTR(err));
> intel_uc_fw_change_status(&uc->gsc.fw,
> INTEL_UC_FIRMWARE_ERROR);
> }
> @@ -382,7 +381,7 @@ static int uc_init_wopcm(struct intel_uc *uc)
> int err;
>
> if (unlikely(!base || !size)) {
> - i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n");
> + gt_probe_error(gt, "Unsuccessful WOPCM partitioning\n");
> return -E2BIG;
> }
>
> @@ -413,13 +412,13 @@ static int uc_init_wopcm(struct intel_uc *uc)
> return 0;
>
> err_out:
> - i915_probe_error(gt->i915, "Failed to init uC WOPCM registers!\n");
> - i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
> - i915_mmio_reg_offset(DMA_GUC_WOPCM_OFFSET),
> - intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
> - i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
> - i915_mmio_reg_offset(GUC_WOPCM_SIZE),
> - intel_uncore_read(uncore, GUC_WOPCM_SIZE));
> + gt_probe_error(gt, "Failed to init uC WOPCM registers!\n");
> + gt_probe_error(gt, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
> + i915_mmio_reg_offset(DMA_GUC_WOPCM_OFFSET),
> + intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
> + gt_probe_error(gt, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
> + i915_mmio_reg_offset(GUC_WOPCM_SIZE),
> + intel_uncore_read(uncore, GUC_WOPCM_SIZE));
>
> return err;
> }
> @@ -449,20 +448,19 @@ static int __uc_check_hw(struct intel_uc *uc)
> return 0;
> }
>
> -static void print_fw_ver(struct intel_uc *uc, struct intel_uc_fw *fw)
> +static void print_fw_ver(struct intel_gt *gt, struct intel_uc_fw *fw)
> {
> - struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
> -
> - drm_info(&i915->drm, "%s firmware %s version %u.%u.%u\n",
> - intel_uc_fw_type_repr(fw->type), fw->file_selected.path,
> - fw->file_selected.ver.major,
> - fw->file_selected.ver.minor,
> - fw->file_selected.ver.patch);
> + gt_info(gt, "%s firmware %s version %u.%u.%u\n",
> + intel_uc_fw_type_repr(fw->type), fw->file_selected.path,
> + fw->file_selected.ver.major,
> + fw->file_selected.ver.minor,
> + fw->file_selected.ver.patch);
> }
>
> static int __uc_init_hw(struct intel_uc *uc)
> {
> - struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
> + struct intel_gt *gt = uc_to_gt(uc);
> + struct drm_i915_private *i915 = gt->i915;
> struct intel_guc *guc = &uc->guc;
> struct intel_huc *huc = &uc->huc;
> int ret, attempts;
> @@ -470,10 +468,10 @@ static int __uc_init_hw(struct intel_uc *uc)
> GEM_BUG_ON(!intel_uc_supports_guc(uc));
> GEM_BUG_ON(!intel_uc_wants_guc(uc));
>
> - print_fw_ver(uc, &guc->fw);
> + print_fw_ver(gt, &guc->fw);
>
> if (intel_uc_uses_huc(uc))
> - print_fw_ver(uc, &huc->fw);
> + print_fw_ver(gt, &huc->fw);
>
> if (!intel_uc_fw_is_loadable(&guc->fw)) {
> ret = __uc_check_hw(uc) ||
> @@ -514,8 +512,8 @@ static int __uc_init_hw(struct intel_uc *uc)
> if (ret == 0)
> break;
>
> - DRM_DEBUG_DRIVER("GuC fw load failed: %d; will reset and "
> - "retry %d more time(s)\n", ret, attempts);
> + gt_dbg(gt, "GuC fw load failed (%pe) will reset and retry %d more time(s)\n",
> + ERR_PTR(ret), attempts);
> }
>
> /* Did we succeded or run out of retries? */
> @@ -551,10 +549,10 @@ static int __uc_init_hw(struct intel_uc *uc)
>
> intel_gsc_uc_load_start(&uc->gsc);
>
> - drm_info(&i915->drm, "GuC submission %s\n",
> - str_enabled_disabled(intel_uc_uses_guc_submission(uc)));
> - drm_info(&i915->drm, "GuC SLPC %s\n",
> - str_enabled_disabled(intel_uc_uses_guc_slpc(uc)));
> + gt_info(gt, "GuC submission %s\n",
> + str_enabled_disabled(intel_uc_uses_guc_submission(uc)));
> + gt_info(gt, "GuC SLPC %s\n",
> + str_enabled_disabled(intel_uc_uses_guc_slpc(uc)));
>
> return 0;
>
> @@ -572,12 +570,12 @@ static int __uc_init_hw(struct intel_uc *uc)
> __uc_sanitize(uc);
>
> if (!ret) {
> - drm_notice(&i915->drm, "GuC is uninitialized\n");
> + gt_notice(gt, "GuC is uninitialized\n");
> /* We want to run without GuC submission */
> return 0;
> }
>
> - i915_probe_error(i915, "GuC initialization failed %d\n", ret);
> + gt_probe_error(gt, "GuC initialization failed %pe\n", ERR_PTR(ret));
>
> /* We want to keep KMS alive */
> return -EIO;
> @@ -690,7 +688,7 @@ void intel_uc_suspend(struct intel_uc *uc)
> with_intel_runtime_pm(&uc_to_gt(uc)->i915->runtime_pm, wakeref) {
> err = intel_guc_suspend(guc);
> if (err)
> - DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
> + gt_dbg(uc_to_gt(uc), "Failed to suspend GuC, %pe", ERR_PTR(err));
> }
> }
>
> @@ -718,7 +716,7 @@ static int __uc_resume(struct intel_uc *uc, bool enable_communication)
>
> err = intel_guc_resume(guc);
> if (err) {
> - DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
> + gt_dbg(gt, "Failed to resume GuC, %pe", ERR_PTR(err));
Why not change this to guc_dbg?
John.
> return err;
> }
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for GuC oriented print macros (rev2)
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (7 preceding siblings ...)
2023-01-24 17:05 ` [Intel-gfx] [PATCH v2 8/8] drm/i915/guc: Update GT/GuC messages in intel_uc.c Michal Wajdeczko
@ 2023-01-24 23:53 ` Patchwork
2023-01-25 4:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2023-01-24 23:53 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5176 bytes --]
== Series Details ==
Series: GuC oriented print macros (rev2)
URL : https://patchwork.freedesktop.org/series/113162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12630 -> Patchwork_113162v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/index.html
Participating hosts (36 -> 38)
------------------------------
Additional (3): fi-bsw-kefka fi-hsw-4770 bat-atsm-1
Missing (1): fi-rkl-11600
Known issues
------------
Here are the changes found in Patchwork_113162v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_gttfill@basic:
- fi-pnv-d510: [PASS][1] -> [FAIL][2] ([i915#7229])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
* igt@i915_selftest@live@gt_lrc:
- fi-rkl-guc: [PASS][3] -> [INCOMPLETE][4] ([i915#4983])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-hsw-4770: NOTRUN -> [SKIP][5] ([fdo#109271]) +20 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/fi-hsw-4770/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1072]) +3 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
* igt@prime_vgem@basic-fence-flip:
- fi-bsw-kefka: NOTRUN -> [SKIP][7] ([fdo#109271]) +26 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/fi-bsw-kefka/igt@prime_vgem@basic-fence-flip.html
#### Possible fixes ####
* igt@i915_selftest@live@requests:
- {bat-rpls-1}: [INCOMPLETE][8] ([i915#4983] / [i915#6257]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/bat-rpls-1/igt@i915_selftest@live@requests.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/bat-rpls-1/igt@i915_selftest@live@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
[i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
[i915#6093]: https://gitlab.freedesktop.org/drm/intel/issues/6093
[i915#6094]: https://gitlab.freedesktop.org/drm/intel/issues/6094
[i915#6166]: https://gitlab.freedesktop.org/drm/intel/issues/6166
[i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
[i915#6311]: https://gitlab.freedesktop.org/drm/intel/issues/6311
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
[i915#7357]: https://gitlab.freedesktop.org/drm/intel/issues/7357
Build changes
-------------
* Linux: CI_DRM_12630 -> Patchwork_113162v2
CI-20190529: 20190529
CI_DRM_12630: 49bd4c650125827fdfc0bc1d319d10da87aedf95 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7136: 31b6af91747ad8c705399c9006cdb81cb1864146 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_113162v2: 49bd4c650125827fdfc0bc1d319d10da87aedf95 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
729b4905cc3b drm/i915/guc: Update GT/GuC messages in intel_uc.c
e2968e938888 drm/i915/guc: Update GuC messages in intel_guc_submission.c
258fc852203b drm/i915/guc: Update GuC messages in intel_guc_log.c
8430202ffb56 drm/i915/guc: Update GuC messages in intel_guc_fw.c
975bad08f081 drm/i915/guc: Update GuC messages in intel_guc_ct.c
cfc143027306 drm/i915/guc: Update GuC messages in intel_guc_ads.c
3a072e1d3e34 drm/i915/guc: Update GuC messages in intel_guc.c
a9d0f8f96154 drm/i915/guc: Add GuC oriented print macros
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/index.html
[-- Attachment #2: Type: text/html, Size: 5016 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread* [Intel-gfx] ✓ Fi.CI.IGT: success for GuC oriented print macros (rev2)
2023-01-24 17:05 [Intel-gfx] [PATCH v2 0/8] GuC oriented print macros Michal Wajdeczko
` (8 preceding siblings ...)
2023-01-24 23:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success for GuC oriented print macros (rev2) Patchwork
@ 2023-01-25 4:16 ` Patchwork
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2023-01-25 4:16 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 19198 bytes --]
== Series Details ==
Series: GuC oriented print macros (rev2)
URL : https://patchwork.freedesktop.org/series/113162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12630_full -> Patchwork_113162v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/index.html
Participating hosts (13 -> 10)
------------------------------
Missing (3): shard-rkl0 pig-kbl-iris pig-skl-6260u
Known issues
------------
Here are the changes found in Patchwork_113162v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][1] -> [FAIL][2] ([i915#2846])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-glk3/igt@gem_exec_fair@basic-deadline.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-glk3/igt@gem_exec_fair@basic-deadline.html
* igt@kms_cursor_legacy@flip-vs-cursor@toggle:
- shard-glk: [PASS][3] -> [FAIL][4] ([i915#2346])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@toggle.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@toggle.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#79])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html
* igt@kms_plane@pixel-format@pipe-a-planes:
- shard-glk: [PASS][7] -> [DMESG-FAIL][8] ([i915#118])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-glk1/igt@kms_plane@pixel-format@pipe-a-planes.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-glk2/igt@kms_plane@pixel-format@pipe-a-planes.html
#### Possible fixes ####
* igt@fbdev@unaligned-read:
- {shard-rkl}: [SKIP][9] ([i915#2582]) -> [PASS][10] +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@fbdev@unaligned-read.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@fbdev@unaligned-read.html
* igt@feature_discovery@psr1:
- {shard-rkl}: [SKIP][11] ([i915#658]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@feature_discovery@psr1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@feature_discovery@psr1.html
* igt@gem_bad_reloc@negative-reloc-lut:
- {shard-rkl}: [SKIP][13] ([i915#3281]) -> [PASS][14] +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-2/igt@gem_bad_reloc@negative-reloc-lut.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-5/igt@gem_bad_reloc@negative-reloc-lut.html
* igt@gem_eio@suspend:
- {shard-rkl}: [FAIL][15] ([i915#7052]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@gem_eio@suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-1/igt@gem_eio@suspend.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- {shard-rkl}: [FAIL][17] ([i915#2842]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-5/igt@gem_exec_fair@basic-none-vip@rcs0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-5/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][19] ([i915#2842]) -> [PASS][20] +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_set_tiling_vs_pwrite:
- {shard-rkl}: [SKIP][21] ([i915#3282]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-2/igt@gem_set_tiling_vs_pwrite.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-5/igt@gem_set_tiling_vs_pwrite.html
* igt@gen9_exec_parse@bb-chained:
- {shard-rkl}: [SKIP][23] ([i915#2527]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-2/igt@gen9_exec_parse@bb-chained.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-5/igt@gen9_exec_parse@bb-chained.html
* igt@i915_pipe_stress@stress-xrgb8888-untiled:
- {shard-rkl}: [SKIP][25] ([i915#4098]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
* igt@i915_pm_dc@dc6-dpms:
- {shard-rkl}: [SKIP][27] ([i915#3361]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-5/igt@i915_pm_dc@dc6-dpms.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-1/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-rkl}: [SKIP][29] ([i915#1397]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-4/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
- {shard-dg1}: [SKIP][31] ([i915#1397]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-dg1-17/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-dg1-14/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-0:
- {shard-rkl}: [SKIP][33] ([i915#1845] / [i915#4098]) -> [PASS][34] +30 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt:
- {shard-rkl}: [SKIP][35] ([i915#1849] / [i915#4098]) -> [PASS][36] +16 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_plane@plane-position-hole@pipe-b-planes:
- {shard-rkl}: [SKIP][37] ([i915#1849]) -> [PASS][38] +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-4/igt@kms_plane@plane-position-hole@pipe-b-planes.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@kms_plane@plane-position-hole@pipe-b-planes.html
* igt@kms_psr@cursor_mmap_gtt:
- {shard-rkl}: [SKIP][39] ([i915#1072]) -> [PASS][40] +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@kms_psr@cursor_mmap_gtt.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@kms_psr@cursor_mmap_gtt.html
* igt@perf@gen12-mi-rpc:
- {shard-rkl}: [SKIP][41] ([fdo#109289]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-5/igt@perf@gen12-mi-rpc.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-1/igt@perf@gen12-mi-rpc.html
* igt@prime_vgem@basic-fence-flip:
- {shard-rkl}: [SKIP][43] ([fdo#109295] / [i915#3708] / [i915#4098]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-3/igt@prime_vgem@basic-fence-flip.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-6/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-write:
- {shard-rkl}: [SKIP][45] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12630/shard-rkl-2/igt@prime_vgem@basic-write.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/shard-rkl-5/igt@prime_vgem@basic-write.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#2232]: https://gitlab.freedesktop.org/drm/intel/issues/2232
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6403]: https://gitlab.freedesktop.org/drm/intel/issues/6403
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7178]: https://gitlab.freedesktop.org/drm/intel/issues/7178
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
Build changes
-------------
* Linux: CI_DRM_12630 -> Patchwork_113162v2
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_12630: 49bd4c650125827fdfc0bc1d319d10da87aedf95 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7136: 31b6af91747ad8c705399c9006cdb81cb1864146 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_113162v2: 49bd4c650125827fdfc0bc1d319d10da87aedf95 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113162v2/index.html
[-- Attachment #2: Type: text/html, Size: 12758 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread