From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
John Harrison <John.C.Harrison@Intel.com>
Subject: Re: [Intel-gfx] [PATCH 8/8] drm/i915/xehp: Extend uninterruptible OpenCL workloads to CCS
Date: Wed, 8 Sep 2021 15:15:06 +0100 [thread overview]
Message-ID: <404363a8-cb5f-6066-c6e8-c19d28fb43f7@linux.intel.com> (raw)
In-Reply-To: <20210907171916.2548047-9-matthew.d.roper@intel.com>
On 07/09/2021 18:19, Matt Roper wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that OpenCL workloads can run on the compute engine, we need to set
> preempt_timeout_ms = 0 on the CCS engines too.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 2f719f0ecac3..7e6ac0ae1f07 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -377,16 +377,17 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
> engine->props.timeslice_duration_ms =
> CONFIG_DRM_I915_TIMESLICE_DURATION;
>
> - /* Override to uninterruptible for OpenCL workloads. */
> - if (GRAPHICS_VER(i915) == 12 && engine->class == RENDER_CLASS)
> - engine->props.preempt_timeout_ms = 0;
> -
> /* features common between engines sharing EUs */
> if (engine->class == RENDER_CLASS || engine->class == COMPUTE_CLASS) {
> engine->flags |= I915_ENGINE_HAS_RCS_REG_STATE;
> engine->flags |= I915_ENGINE_HAS_EU_PRIORITY;
> }
>
> + /* Override to uninterruptible for OpenCL workloads. */
> + if (GRAPHICS_VER(i915) == 12 &&
> + engine->flags & I915_ENGINE_HAS_RCS_REG_STATE)
> + engine->props.preempt_timeout_ms = 0;
> +
> engine->defaults = engine->props; /* never to change again */
>
> engine->context_size = intel_engine_context_size(gt, engine->class);
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
next prev parent reply other threads:[~2021-09-08 14:15 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-07 17:19 [Intel-gfx] [PATCH 0/8] i915: Introduce Xe_HP compute engines Matt Roper
2021-09-07 17:19 ` [Intel-gfx] [PATCH 1/8] drm/i915/xehp: Define compute class and engine Matt Roper
2021-09-08 9:46 ` Tvrtko Ursulin
2021-09-08 16:42 ` Daniel Vetter
2021-09-07 17:19 ` [Intel-gfx] [PATCH 2/8] drm/i915/xehp: CCS shares the render reset domain Matt Roper
2021-09-08 10:07 ` Tvrtko Ursulin
2021-09-08 20:23 ` Matt Roper
2021-09-09 8:11 ` Tvrtko Ursulin
2021-09-08 16:46 ` Daniel Vetter
2021-09-07 17:19 ` [Intel-gfx] [PATCH 3/8] drm/i915/xehp: Add Compute CS IRQ handlers Matt Roper
2021-09-08 10:09 ` Tvrtko Ursulin
2021-09-07 17:19 ` [Intel-gfx] [PATCH 4/8] drm/i915/xehp: CCS should use RCS setup functions Matt Roper
2021-09-08 10:13 ` Tvrtko Ursulin
2021-09-08 13:57 ` Tvrtko Ursulin
2021-09-07 17:19 ` [Intel-gfx] [PATCH 5/8] drm/i915/xehp: compute engine pipe_control Matt Roper
2021-09-07 17:19 ` [Intel-gfx] [PATCH 6/8] drm/i915/xehp: Define context scheduling attributes in lrc descriptor Matt Roper
2021-09-08 14:01 ` Tvrtko Ursulin
2021-09-07 17:19 ` [Intel-gfx] [PATCH 7/8] drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE Matt Roper
2021-09-08 14:10 ` Tvrtko Ursulin
2021-09-07 17:19 ` [Intel-gfx] [PATCH 8/8] drm/i915/xehp: Extend uninterruptible OpenCL workloads to CCS Matt Roper
2021-09-08 14:15 ` Tvrtko Ursulin [this message]
2021-09-07 20:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Introduce Xe_HP compute engines Patchwork
2021-09-07 20:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-07 20:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-08 0:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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