From: Ben Widawsky <ben@bwidawsk.net>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/3] drm/i915: consolidate swizzling control bit frobbing
Date: Wed, 08 Feb 2012 23:17:08 +0100 [thread overview]
Message-ID: <4F32F464.1060806@bwidawsk.net> (raw)
In-Reply-To: <1328024876-5240-2-git-send-email-daniel.vetter@ffwll.ch>
On 01/31/2012 04:47 PM, Daniel Vetter wrote:
> On gen5 we also need to correctly set up swizzling in the display
> scanout engine, but only there. Consolidate this into the same
> function.
>
> This has a small effect on ums setups - the kernel now also sets this
> bit in addition to userspace setting it. Given that this code only
> runs when userspace either can't (resume, gpu reset) or explicitly
> won't(gem_init) touch the hw this shouldn't have an adverse effect.
>
> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 5 ++++-
> drivers/gpu/drm/i915/intel_display.c | 6 ------
> 2 files changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 86fffd2..27fe07a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3685,13 +3685,16 @@ void i915_gem_init_swizzling(struct drm_device *dev)
> {
> drm_i915_private_t *dev_priv = dev->dev_private;
>
> - if (INTEL_INFO(dev)->gen < 6 ||
> + if (INTEL_INFO(dev)->gen < 5 ||
> dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
> return;
>
> I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> DISP_TILE_SURFACE_SWIZZLING);
>
> + if (IS_GEN5(dev))
> + return;
> +
> I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_SWZCTL);
> if (IS_GEN6(dev))
> I915_WRITE(ARB_MODE, ARB_MODE_ENABLE(ARB_MODE_SWIZZLE_SNB));
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index fc9bc19..5ab967c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6029,12 +6029,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>
> intel_wait_for_vblank(dev, pipe);
>
> - if (IS_GEN5(dev)) {
> - /* enable address swizzle for tiling buffer */
> - temp = I915_READ(DISP_ARB_CTL);
> - I915_WRITE(DISP_ARB_CTL, temp | DISP_TILE_SURFACE_SWIZZLING);
> - }
> -
> I915_WRITE(DSPCNTR(plane), dspcntr);
> POSTING_READ(DSPCNTR(plane));
>
next prev parent reply other threads:[~2012-02-08 22:17 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-31 15:47 [PATCH 1/3] drm/i915: swizzling support for snb/ivb Daniel Vetter
2012-01-31 15:47 ` [PATCH 2/3] drm/i915: consolidate swizzling control bit frobbing Daniel Vetter
2012-02-01 21:37 ` Ben Widawsky
2012-02-01 22:23 ` Daniel Vetter
2012-02-08 22:17 ` Ben Widawsky [this message]
2012-02-08 22:19 ` Daniel Vetter
2012-01-31 15:47 ` [PATCH 3/3] drm/i915: add gen6+ registers to i915_swizzle_info Daniel Vetter
2012-02-01 21:39 ` Ben Widawsky
2012-02-08 22:20 ` Daniel Vetter
2012-02-01 21:35 ` [PATCH 1/3] drm/i915: swizzling support for snb/ivb Ben Widawsky
2012-02-01 22:16 ` Daniel Vetter
2012-02-01 22:26 ` Chris Wilson
2012-02-01 23:15 ` [PATCH] " Daniel Vetter
2012-02-02 5:30 ` Ben Widawsky
2012-02-02 8:40 ` Daniel Vetter
2012-02-05 3:13 ` Ben Widawsky
2012-02-06 16:06 ` Daniel Vetter
2012-02-02 8:58 ` Daniel Vetter
2012-02-04 20:59 ` Eric Anholt
2012-02-06 15:45 ` Daniel Vetter
2012-02-07 19:56 ` Eric Anholt
2012-02-08 22:17 ` Daniel Vetter
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