* [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout
@ 2019-11-24 11:27 Chris Wilson
2019-11-24 11:27 ` [Intel-gfx] " Chris Wilson
2019-11-25 18:45 ` Summers, Stuart
0 siblings, 2 replies; 4+ messages in thread
From: Chris Wilson @ 2019-11-24 11:27 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
The implicit soft-pinning we use to probe the vm layout using execbuf,
depends on the batch remaining active (not retired) between execbufs.
Naturally, if the background retire worker runs the batch is retired and
the implicit soft-pinning is free to use a fresh address.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_ctx_param.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index bd1ee3996..63e0db38d 100644
--- a/tests/i915/gem_ctx_param.c
+++ b/tests/i915/gem_ctx_param.c
@@ -161,6 +161,7 @@ static void test_vm(int i915)
.param = I915_CONTEXT_PARAM_VM,
};
uint32_t parent, child;
+ igt_spin_t *spin;
/*
* Proving 2 contexts share the same GTT is quite tricky as we have no
@@ -177,6 +178,15 @@ static void test_vm(int i915)
parent = gem_context_create(i915);
child = gem_context_create(i915);
+ /* Create a background spinner to keep the engines busy */
+ spin = igt_spin_new(i915);
+ for (int i = 0; i < 16; i++) {
+ spin->execbuf.rsvd1 = gem_context_create(i915);
+ gem_context_set_priority(i915, spin->execbuf.rsvd1, 1023);
+ gem_execbuf(i915, &spin->execbuf);
+ gem_context_destroy(i915, spin->execbuf.rsvd1);
+ }
+
/* Using implicit soft-pinning */
eb.rsvd1 = parent;
batch.offset = nonzero_offset;
@@ -226,6 +236,7 @@ static void test_vm(int i915)
gem_context_destroy(i915, child);
gem_vm_destroy(i915, arg.value);
+ igt_spin_free(i915, spin);
gem_sync(i915, batch.handle);
gem_close(i915, batch.handle);
}
--
2.24.0
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout
2019-11-24 11:27 [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout Chris Wilson
@ 2019-11-24 11:27 ` Chris Wilson
2019-11-25 18:45 ` Summers, Stuart
1 sibling, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2019-11-24 11:27 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
The implicit soft-pinning we use to probe the vm layout using execbuf,
depends on the batch remaining active (not retired) between execbufs.
Naturally, if the background retire worker runs the batch is retired and
the implicit soft-pinning is free to use a fresh address.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_ctx_param.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index bd1ee3996..63e0db38d 100644
--- a/tests/i915/gem_ctx_param.c
+++ b/tests/i915/gem_ctx_param.c
@@ -161,6 +161,7 @@ static void test_vm(int i915)
.param = I915_CONTEXT_PARAM_VM,
};
uint32_t parent, child;
+ igt_spin_t *spin;
/*
* Proving 2 contexts share the same GTT is quite tricky as we have no
@@ -177,6 +178,15 @@ static void test_vm(int i915)
parent = gem_context_create(i915);
child = gem_context_create(i915);
+ /* Create a background spinner to keep the engines busy */
+ spin = igt_spin_new(i915);
+ for (int i = 0; i < 16; i++) {
+ spin->execbuf.rsvd1 = gem_context_create(i915);
+ gem_context_set_priority(i915, spin->execbuf.rsvd1, 1023);
+ gem_execbuf(i915, &spin->execbuf);
+ gem_context_destroy(i915, spin->execbuf.rsvd1);
+ }
+
/* Using implicit soft-pinning */
eb.rsvd1 = parent;
batch.offset = nonzero_offset;
@@ -226,6 +236,7 @@ static void test_vm(int i915)
gem_context_destroy(i915, child);
gem_vm_destroy(i915, arg.value);
+ igt_spin_free(i915, spin);
gem_sync(i915, batch.handle);
gem_close(i915, batch.handle);
}
--
2.24.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout
2019-11-24 11:27 [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout Chris Wilson
2019-11-24 11:27 ` [Intel-gfx] " Chris Wilson
@ 2019-11-25 18:45 ` Summers, Stuart
2019-11-25 18:45 ` [Intel-gfx] " Summers, Stuart
1 sibling, 1 reply; 4+ messages in thread
From: Summers, Stuart @ 2019-11-25 18:45 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, chris@chris-wilson.co.uk
Cc: igt-dev@lists.freedesktop.org
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On Sun, 2019-11-24 at 11:27 +0000, Chris Wilson wrote:
> The implicit soft-pinning we use to probe the vm layout using
> execbuf,
> depends on the batch remaining active (not retired) between execbufs.
> Naturally, if the background retire worker runs the batch is retired
> and
> the implicit soft-pinning is free to use a fresh address.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> tests/i915/gem_ctx_param.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
> index bd1ee3996..63e0db38d 100644
> --- a/tests/i915/gem_ctx_param.c
> +++ b/tests/i915/gem_ctx_param.c
> @@ -161,6 +161,7 @@ static void test_vm(int i915)
> .param = I915_CONTEXT_PARAM_VM,
> };
> uint32_t parent, child;
> + igt_spin_t *spin;
>
> /*
> * Proving 2 contexts share the same GTT is quite tricky as we
> have no
> @@ -177,6 +178,15 @@ static void test_vm(int i915)
> parent = gem_context_create(i915);
> child = gem_context_create(i915);
>
> + /* Create a background spinner to keep the engines busy */
> + spin = igt_spin_new(i915);
> + for (int i = 0; i < 16; i++) {
Why 16 here?
> + spin->execbuf.rsvd1 = gem_context_create(i915);
> + gem_context_set_priority(i915, spin->execbuf.rsvd1,
> 1023);
Can you make this 1023 a macro?
Thanks,
Stuart
> + gem_execbuf(i915, &spin->execbuf);
> + gem_context_destroy(i915, spin->execbuf.rsvd1);
> + }
> +
> /* Using implicit soft-pinning */
> eb.rsvd1 = parent;
> batch.offset = nonzero_offset;
> @@ -226,6 +236,7 @@ static void test_vm(int i915)
> gem_context_destroy(i915, child);
> gem_vm_destroy(i915, arg.value);
>
> + igt_spin_free(i915, spin);
> gem_sync(i915, batch.handle);
> gem_close(i915, batch.handle);
> }
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_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout
2019-11-25 18:45 ` Summers, Stuart
@ 2019-11-25 18:45 ` Summers, Stuart
0 siblings, 0 replies; 4+ messages in thread
From: Summers, Stuart @ 2019-11-25 18:45 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, chris@chris-wilson.co.uk
Cc: igt-dev@lists.freedesktop.org
[-- Attachment #1.1: Type: text/plain, Size: 1844 bytes --]
On Sun, 2019-11-24 at 11:27 +0000, Chris Wilson wrote:
> The implicit soft-pinning we use to probe the vm layout using
> execbuf,
> depends on the batch remaining active (not retired) between execbufs.
> Naturally, if the background retire worker runs the batch is retired
> and
> the implicit soft-pinning is free to use a fresh address.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> tests/i915/gem_ctx_param.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
> index bd1ee3996..63e0db38d 100644
> --- a/tests/i915/gem_ctx_param.c
> +++ b/tests/i915/gem_ctx_param.c
> @@ -161,6 +161,7 @@ static void test_vm(int i915)
> .param = I915_CONTEXT_PARAM_VM,
> };
> uint32_t parent, child;
> + igt_spin_t *spin;
>
> /*
> * Proving 2 contexts share the same GTT is quite tricky as we
> have no
> @@ -177,6 +178,15 @@ static void test_vm(int i915)
> parent = gem_context_create(i915);
> child = gem_context_create(i915);
>
> + /* Create a background spinner to keep the engines busy */
> + spin = igt_spin_new(i915);
> + for (int i = 0; i < 16; i++) {
Why 16 here?
> + spin->execbuf.rsvd1 = gem_context_create(i915);
> + gem_context_set_priority(i915, spin->execbuf.rsvd1,
> 1023);
Can you make this 1023 a macro?
Thanks,
Stuart
> + gem_execbuf(i915, &spin->execbuf);
> + gem_context_destroy(i915, spin->execbuf.rsvd1);
> + }
> +
> /* Using implicit soft-pinning */
> eb.rsvd1 = parent;
> batch.offset = nonzero_offset;
> @@ -226,6 +236,7 @@ static void test_vm(int i915)
> gem_context_destroy(i915, child);
> gem_vm_destroy(i915, arg.value);
>
> + igt_spin_free(i915, spin);
> gem_sync(i915, batch.handle);
> gem_close(i915, batch.handle);
> }
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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2019-11-24 11:27 [PATCH i-g-t] i915/gem_ctx_param: Keep the engine active while peeking at vm layout Chris Wilson
2019-11-24 11:27 ` [Intel-gfx] " Chris Wilson
2019-11-25 18:45 ` Summers, Stuart
2019-11-25 18:45 ` [Intel-gfx] " Summers, Stuart
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