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* [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams
@ 2018-03-14 18:44 Jackie Li
  2018-03-14 19:26 ` Michal Wajdeczko
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Jackie Li @ 2018-03-14 18:44 UTC (permalink / raw)
  To: intel-gfx

GuC Address Space and WOPCM Layout diagrams won't be generated correctly by
sphinx build if not using proper reST syntax.

This patch uses reST literal blocks to make sure GuC Address Space and
WOPCM Layout diagrams to be generated correctly, and it also corrects some
errors in the diagram description.

v2:
 - Fixed errors in diagram description

Signed-off-by: Jackie Li <yaodong.li@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_guc.c   | 52 ++++++++++++++++++++------------------
 drivers/gpu/drm/i915/intel_wopcm.c | 44 +++++++++++++++++---------------
 2 files changed, 50 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 3eb516e..6a4f36e 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -495,35 +495,37 @@ int intel_guc_resume(struct intel_guc *guc)
 /**
  * DOC: GuC Address Space
  *
- * The layout of GuC address space is shown as below:
+ * The layout of GuC address space is shown below:
  *
- *    +==============> +====================+ <== GUC_GGTT_TOP
- *    ^                |                    |
- *    |                |                    |
- *    |                |        DRAM        |
- *    |                |       Memory       |
- *    |                |                    |
- *   GuC               |                    |
- * Address  +========> +====================+ <== WOPCM Top
- *  Space   ^          |   HW contexts RSVD |
- *    |     |          |        WOPCM       |
- *    |     |     +==> +--------------------+ <== GuC WOPCM Top
- *    |    GuC    ^    |                    |
- *    |    GGTT   |    |                    |
- *    |    Pin   GuC   |        GuC         |
- *    |    Bias WOPCM  |       WOPCM        |
- *    |     |    Size  |                    |
- *    |     |     |    |                    |
- *    v     v     v    |                    |
- *    +=====+=====+==> +====================+ <== GuC WOPCM Base
- *                     |   Non-GuC WOPCM    |
- *                     |   (HuC/Reserved)   |
- *                     +====================+ <== WOPCM Base
+ * ::
+ *
+ *     +==============> +====================+ <== GUC_GGTT_TOP
+ *     ^                |                    |
+ *     |                |                    |
+ *     |                |        DRAM        |
+ *     |                |       Memory       |
+ *     |                |                    |
+ *    GuC               |                    |
+ *  Address  +========> +====================+ <== WOPCM Top
+ *   Space   ^          |   HW contexts RSVD |
+ *     |     |          |        WOPCM       |
+ *     |     |     +==> +--------------------+ <== GuC WOPCM Top
+ *     |    GuC    ^    |                    |
+ *     |    GGTT   |    |                    |
+ *     |    Pin   GuC   |        GuC         |
+ *     |    Bias WOPCM  |       WOPCM        |
+ *     |     |    Size  |                    |
+ *     |     |     |    |                    |
+ *     v     v     v    |                    |
+ *     +=====+=====+==> +====================+ <== GuC WOPCM Base
+ *                      |   Non-GuC WOPCM    |
+ *                      |   (HuC/Reserved)   |
+ *                      +====================+ <== WOPCM Base
  *
  * The lower part [0, GuC ggtt_pin_bias) is mapped to WOPCM which consists of
  * GuC WOPCM and WOPCM reserved for other usage (e.g.RC6 context). The value of
- * the GuC ggtt_pin_bias is determined by the actually GuC WOPCM size which is
- * set in GUC_WOPCM_SIZE register.
+ * the GuC ggtt_pin_bias is determined by the GuC WOPCM size which is set in
+ * GUC_WOPCM_SIZE register.
  */
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
index 4117886..74bf76f 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_wopcm.c
@@ -11,28 +11,30 @@
  * DOC: WOPCM Layout
  *
  * The layout of the WOPCM will be fixed after writing to GuC WOPCM size and
- * offset registers whose are calculated are determined by size of HuC/GuC
- * firmware size and set of hw requirements/restrictions as shown below:
+ * offset registers whose values are calculated and determined by HuC/GuC
+ * firmware size and set of hardware requirements/restrictions as shown below:
  *
- *   +=========> +====================+ <== WOPCM Top
- *   ^           |  HW contexts RSVD  |
- *   |     +===> +====================+ <== GuC WOPCM Top
- *   |     ^     |                    |
- *   |     |     |                    |
- *   |     |     |                    |
- *   |    GuC    |                    |
- *   |   WOPCM   |                    |
- *   |    Size   +--------------------+
- * WOPCM   |     |    GuC FW RSVD     |
- *   |     |     +--------------------+
- *   |     |     |   GuC Stack RSVD   |
- *   |     |     +------------------- +
- *   |     v     |   GuC WOPCM RSVD   |
- *   |     +===> +====================+ <== GuC WOPCM base
- *   |           |     WOPCM RSVD     |
- *   |           +------------------- + <== HuC Firmware Top
- *   v           |      HuC FW        |
- *   +=========> +====================+ <== WOPCM Base
+ * ::
+ *
+ *    +=========> +====================+ <== WOPCM Top
+ *    ^           |  HW contexts RSVD  |
+ *    |     +===> +====================+ <== GuC WOPCM Top
+ *    |     ^     |                    |
+ *    |     |     |                    |
+ *    |     |     |                    |
+ *    |    GuC    |                    |
+ *    |   WOPCM   |                    |
+ *    |    Size   +--------------------+
+ *  WOPCM   |     |    GuC FW RSVD     |
+ *    |     |     +--------------------+
+ *    |     |     |   GuC Stack RSVD   |
+ *    |     |     +------------------- +
+ *    |     v     |   GuC WOPCM RSVD   |
+ *    |     +===> +====================+ <== GuC WOPCM base
+ *    |           |     WOPCM RSVD     |
+ *    |           +------------------- + <== HuC Firmware Top
+ *    v           |      HuC FW        |
+ *    +=========> +====================+ <== WOPCM Base
  *
  * GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC WOPCM top.
  * The top part of the WOPCM is reserved for hardware contexts (e.g. RC6
-- 
2.7.4

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end of thread, other threads:[~2018-03-15 16:45 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-03-14 18:44 [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams Jackie Li
2018-03-14 19:26 ` Michal Wajdeczko
2018-03-14 20:09   ` Yaodong Li
2018-03-14 19:30 ` ✓ Fi.CI.BAT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev2) Patchwork
2018-03-15  1:27 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-03-15  6:54 ` [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams Sagar Arun Kamble
2018-03-15 16:43   ` Yaodong Li

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