Re: [Intel-gfx] [PATCH v6 8/8] drm/i915/pxp: Enable PXP with MTL-GSC-CS

["Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>]

On 2/27/2023 6:21 PM, Alan Previn wrote:
> Enable PXP with MTL-GSC-CS: add the has_pxp into device info
> and increase the debugfs teardown timeouts to align with
> new GSC-CS + firmware specs.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/i915_pci.c              | 1 +
>   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 9 ++++++++-
>   drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 2 +-
>   3 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index a8d942b16223..4ecf0f2ab6ec 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1150,6 +1150,7 @@ static const struct intel_device_info mtl_info = {
>   	.has_guc_deprivilege = 1,
>   	.has_mslice_steering = 0,
>   	.has_snoop = 1,
> +	.has_pxp = 1,
>   	.__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
>   	.__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
>   	.require_force_probe = 1,
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> index 9f6e300486b4..ddf9f8bb7791 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> @@ -14,6 +14,7 @@
>   
>   #include "intel_pxp.h"
>   #include "intel_pxp_debugfs.h"
> +#include "intel_pxp_gsccs.h"
>   #include "intel_pxp_irq.h"
>   #include "intel_pxp_types.h"
>   
> @@ -45,6 +46,7 @@ static int pxp_terminate_set(void *data, u64 val)
>   {
>   	struct intel_pxp *pxp = data;
>   	struct intel_gt *gt = intel_pxp_get_irq_gt(pxp);
> +	int timeout_ms;
>   
>   	if (!intel_pxp_is_active(pxp))
>   		return -ENODEV;
> @@ -54,8 +56,13 @@ static int pxp_terminate_set(void *data, u64 val)
>   	intel_pxp_irq_handler(pxp, GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT);
>   	spin_unlock_irq(gt->irq_lock);
>   
> +	if (HAS_ENGINE(pxp->ctrl_gt, GSC0))
> +		timeout_ms = GSC_PENDING_RETRY_LATENCY_MS;
> +	else
> +		timeout_ms = 250;
> +
>   	if (!wait_for_completion_timeout(&pxp->termination,
> -					 msecs_to_jiffies(100)))
> +					 msecs_to_jiffies(timeout_ms)))
>   		return -ETIMEDOUT;
>   
>   	return 0;
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
> index 4ddf2ee60222..03f006f9dc2e 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
> @@ -44,7 +44,7 @@ static int pxp_wait_for_session_state(struct intel_pxp *pxp, u32 id, bool in_pla
>   				      KCR_SIP(pxp->kcr_base),
>   				      mask,
>   				      in_play ? mask : 0,
> -				      100);
> +				      250);
>   
>   	intel_runtime_pm_put(uncore->rpm, wakeref);
>