From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: Alan Previn <alan.previn.teres.alexis@intel.com>,
<intel-gfx@lists.freedesktop.org>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v6 7/8] drm/i915/pxp: On MTL, KCR enabling doesn't wait on tee component
Date: Fri, 3 Mar 2023 17:58:48 -0800 [thread overview]
Message-ID: <b923b230-603e-312d-8d4f-160486095152@intel.com> (raw)
In-Reply-To: <20230228022150.1657843-8-alan.previn.teres.alexis@intel.com>
On 2/27/2023 6:21 PM, Alan Previn wrote:
> On legacy platforms, KCR HW enabling is done at the time the mei
> component interface is bound. It's also disabled during unbind.
> However, for MTL onwards, we don't depend on a tee component
> to start sending GSC-CS firmware messages.
>
> Thus, immediately enable (or disable) KCR HW on PXP's init,
> fini and resume.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
> drivers/gpu/drm/i915/pxp/intel_pxp.c | 19 +++++++++++++++----
> drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 3 ++-
> 2 files changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 61041277be24..e2f2cc5f6a6e 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -119,6 +119,7 @@ static void destroy_vcs_context(struct intel_pxp *pxp)
> static void pxp_init_full(struct intel_pxp *pxp)
> {
> struct intel_gt *gt = pxp->ctrl_gt;
> + intel_wakeref_t wakeref;
> int ret;
>
> /*
> @@ -140,10 +141,15 @@ static void pxp_init_full(struct intel_pxp *pxp)
> if (ret)
> return;
>
> - if (HAS_ENGINE(pxp->ctrl_gt, GSC0))
> + if (HAS_ENGINE(pxp->ctrl_gt, GSC0)) {
> ret = intel_pxp_gsccs_init(pxp);
> - else
> + if (!ret) {
> + with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref)
> + intel_pxp_init_hw(pxp);
personal preference: I'd move this (and the matching call in fini)
inside intel_pxp_gsccs_init/fini. That way we can see this as more
back-end specific: the gsccs initialize everything immediately, while
the tee back-end follows a 2-step approach with the component.
Not a blocker since it is a personal preference, so with or without the
change:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
> + }
> + } else {
> ret = intel_pxp_tee_component_init(pxp);
> + }
> if (ret)
> goto out_context;
>
> @@ -239,15 +245,20 @@ int intel_pxp_init(struct drm_i915_private *i915)
>
> void intel_pxp_fini(struct drm_i915_private *i915)
> {
> + intel_wakeref_t wakeref;
> +
> if (!i915->pxp)
> return;
>
> i915->pxp->arb_is_valid = false;
>
> - if (HAS_ENGINE(i915->pxp->ctrl_gt, GSC0))
> + if (HAS_ENGINE(i915->pxp->ctrl_gt, GSC0)) {
> + with_intel_runtime_pm(&i915->pxp->ctrl_gt->i915->runtime_pm, wakeref)
> + intel_pxp_fini_hw(i915->pxp);
> intel_pxp_gsccs_fini(i915->pxp);
> - else
> + } else {
> intel_pxp_tee_component_fini(i915->pxp);
> + }
>
> destroy_vcs_context(i915->pxp);
>
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
> index 4f836b317424..1a04067f61fc 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
> @@ -43,8 +43,9 @@ void intel_pxp_resume_complete(struct intel_pxp *pxp)
> * The PXP component gets automatically unbound when we go into S3 and
> * re-bound after we come out, so in that scenario we can defer the
> * hw init to the bind call.
> + * NOTE: GSC-CS backend doesn't rely on components.
> */
> - if (!pxp->pxp_component)
> + if (!HAS_ENGINE(pxp->ctrl_gt, GSC0) && !pxp->pxp_component)
> return;
>
> intel_pxp_init_hw(pxp);
next prev parent reply other threads:[~2023-03-04 1:59 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-28 2:21 [Intel-gfx] [PATCH v6 0/8] drm/i915/pxp: Add MTL PXP Support Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 1/8] drm/i915/pxp: Add GSC-CS back-end resource init and cleanup Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 2/8] drm/i915/pxp: Add MTL hw-plumbing enabling for KCR operation Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 3/8] drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC Alan Previn
2023-03-03 1:14 ` Teres Alexis, Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 4/8] drm/i915/pxp: Add GSC-CS backend to send GSC fw messages Alan Previn
2023-03-04 1:07 ` Ceraolo Spurio, Daniele
2023-03-24 2:22 ` Teres Alexis, Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 5/8] drm/i915/pxp: Add ARB session creation and cleanup Alan Previn
2023-03-04 1:34 ` Ceraolo Spurio, Daniele
2023-03-25 6:11 ` Teres Alexis, Alan Previn
2023-03-25 6:19 ` Teres Alexis, Alan Previn
2023-03-26 11:18 ` Rodrigo Vivi
2023-03-27 7:07 ` Lionel Landwerlin
2023-03-27 16:15 ` Tvrtko Ursulin
2023-03-28 17:01 ` Teres Alexis, Alan Previn
2023-03-28 17:52 ` Rodrigo Vivi
2023-03-29 7:43 ` Tvrtko Ursulin
2023-03-30 0:10 ` Teres Alexis, Alan Previn
2023-03-30 12:25 ` Tvrtko Ursulin
2023-03-30 19:44 ` Teres Alexis, Alan Previn
2023-03-31 12:46 ` Tvrtko Ursulin
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 6/8] drm/i915/pxp: MTL-KCR interrupt ctrl's are in GT-0 Alan Previn
2023-03-04 1:53 ` Ceraolo Spurio, Daniele
2023-04-06 5:51 ` Teres Alexis, Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 7/8] drm/i915/pxp: On MTL, KCR enabling doesn't wait on tee component Alan Previn
2023-03-04 1:58 ` Ceraolo Spurio, Daniele [this message]
2023-04-06 5:44 ` Teres Alexis, Alan Previn
2023-02-28 2:21 ` [Intel-gfx] [PATCH v6 8/8] drm/i915/pxp: Enable PXP with MTL-GSC-CS Alan Previn
2023-03-04 2:00 ` Ceraolo Spurio, Daniele
2023-02-28 2:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pxp: Add MTL PXP Support (rev6) Patchwork
2023-02-28 3:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-02-28 6:21 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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