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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>,
	<intel-gfx@lists.freedesktop.org>,
	<v5-000intel-xe@lists.freedesktop.org>
Cc: <jani.nikula@intel.com>, <ville.syrjala@intel.com>
Subject: Re: [PATCH v5 4/7] drm/i915/scaler: Compute scaling factors for pipe scaler
Date: Thu, 16 Jan 2025 17:21:14 +0530	[thread overview]
Message-ID: <6d812066-b2fe-4e8e-a455-bfbafa556210@intel.com> (raw)
In-Reply-To: <20250115151714.3665211-5-mitulkumar.ajitkumar.golani@intel.com>


On 1/15/2025 8:47 PM, Mitul Golani wrote:
> Compute scaling factors and scaler user for pipe scaler if
> particular scaler user is pipe scaler.
>
> --v2:
> - Update typo 'plane scaling' to 'pipe scaling'. [Ankit]
> - Remove FIXME tag which was added to check for pipe scaling
> factors as well. [Ankit]
> - Should be common hscale, vscale instead of local one to
> avoid garbage overwritten.
> - Typo in commit message 'perticular' to 'particular'.

Just "Fix the typos" should be sufficient.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

>
> --v3:
> - Separate out max_scaling information. [Ankit]
> - Use max_hscale and max_vscale info instead of INT_MAX. [Ankit]
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
>   drivers/gpu/drm/i915/display/skl_scaler.c | 36 ++++++++++++++++++-----
>   1 file changed, 29 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index a832cdccd9fa..72344044d9d3 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -368,6 +368,7 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
>   					&crtc_state->scaler_state;
>   	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>   	u32 mode;
> +	int hscale, vscale, max_vscale, max_hscale;
>   
>   	if (*scaler_id < 0)
>   		*scaler_id = intel_allocate_scaler(scaler_state, crtc);
> @@ -416,15 +417,10 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
>   		mode = SKL_PS_SCALER_MODE_DYN;
>   	}
>   
> -	/*
> -	 * FIXME: we should also check the scaler factors for pfit, so
> -	 * this shouldn't be tied directly to planes.
> -	 */
>   	if (plane_state && plane_state->hw.fb) {
>   		const struct drm_framebuffer *fb = plane_state->hw.fb;
>   		const struct drm_rect *src = &plane_state->uapi.src;
>   		const struct drm_rect *dst = &plane_state->uapi.dst;
> -		int hscale, vscale, max_vscale, max_hscale;
>   
>   		calculate_max_scale(crtc,
>   				    intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier),
> @@ -448,11 +444,37 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
>   
>   			return -EINVAL;
>   		}
> +	}
> +
> +	if (crtc_state->pch_pfit.enabled) {
> +		struct drm_rect src;
> +
> +		drm_rect_init(&src, 0, 0,
> +			      drm_rect_width(&crtc_state->pipe_src) << 16,
> +			      drm_rect_height(&crtc_state->pipe_src) << 16);
> +
> +		calculate_max_scale(crtc, 0, *scaler_id,
> +				    &max_hscale, &max_vscale);
>   
> -		scaler_state->scalers[*scaler_id].hscale = hscale;
> -		scaler_state->scalers[*scaler_id].vscale = vscale;
> +		hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst,
> +					      0, max_hscale);
> +		vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst,
> +					      0, max_vscale);
> +
> +		if (hscale < 0 || vscale < 0) {
> +			drm_dbg_kms(display->drm,
> +				    "Scaler %d doesn't support required pipe scaling\n",
> +				    *scaler_id);
> +			drm_rect_debug_print("src: ", &src, true);
> +			drm_rect_debug_print("dst: ", &crtc_state->pch_pfit.dst, false);
> +
> +			return -EINVAL;
> +		}
>   	}
>   
> +	scaler_state->scalers[*scaler_id].hscale = hscale;
> +	scaler_state->scalers[*scaler_id].vscale = vscale;
> +
>   	drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n",
>   		    crtc->base.base.id, crtc->base.name,
>   		    crtc->pipe, *scaler_id, name, idx);

  reply	other threads:[~2025-01-16 11:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-15 15:17 [PATCH v5 0/7] Check Scaler and DSC Prefill Latency Against Vblank Mitul Golani
2025-01-15 15:17 ` [PATCH v5 1/7] drm/i915/scaler: Add and compute scaling factors Mitul Golani
2025-01-15 15:17 ` [PATCH v5 2/7] drm/i915/scaler: Use crtc_state to setup plane or pipe scaler Mitul Golani
2025-01-15 15:17 ` [PATCH v5 3/7] drm/i915/scaler: Refactor max_scale computation Mitul Golani
2025-01-16 11:47   ` Nautiyal, Ankit K
2025-01-15 15:17 ` [PATCH v5 4/7] drm/i915/scaler: Compute scaling factors for pipe scaler Mitul Golani
2025-01-16 11:51   ` Nautiyal, Ankit K [this message]
2025-01-15 15:17 ` [PATCH v5 5/7] drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420 Mitul Golani
2025-01-16 12:02   ` Nautiyal, Ankit K
2025-01-15 15:17 ` [PATCH v5 6/7] drm/i915/scaler: Check if vblank is sufficient for scaler Mitul Golani
2025-01-16 13:01   ` Nautiyal, Ankit K
2025-01-15 15:17 ` [PATCH v5 7/7] drm/i915/dsc: Check if vblank is sufficient for dsc prefill Mitul Golani
2025-01-16 13:04   ` Nautiyal, Ankit K
2025-01-15 15:59 ` [PATCH v5 0/7] Check Scaler and DSC Prefill Latency Against Vblank Golani, Mitulkumar Ajitkumar
2025-01-15 22:07 ` ✗ Fi.CI.SPARSE: warning for Check Scaler and DSC Prefill Latency Against Vblank (rev3) Patchwork
2025-01-15 22:25 ` ✓ i915.CI.BAT: success " Patchwork
2025-01-16  4:03 ` ✗ i915.CI.Full: failure " Patchwork
2025-01-16  7:02 ` ✓ i915.CI.Full: success " Patchwork

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