* [Intel-gfx] [PATCH v2 1/9] drm/i915/psr: Disable PSR before modesets turn off all planes
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
@ 2021-10-22 10:32 ` Ville Syrjala
2021-10-22 14:29 ` Hogander, Jouni
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 2/9] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes" Ville Syrjala
` (10 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:32 UTC (permalink / raw)
To: intel-gfx; +Cc: José Roberto de Souza
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
PSR2 apparently requires some planes to be enabled for some
silly reason, and so we are now trying to turn PSR off before
planes go off. Except during a full modeset that is handled
less clearly through reorganization of the modeset sequence.
That is not great as it makes the code mode complex, and
prevents us from doing nice things such as just turning off
all the planes at the very start of the modeset. So let's
move the PSR pre_plane_update() thing to a spot where it
will handle both full modesets and everything else.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
drivers/gpu/drm/i915/display/intel_psr.c | 25 +++++++-------------
drivers/gpu/drm/i915/display/intel_psr.h | 3 ++-
3 files changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2b97c8797177..5201d6cdd5db 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1429,6 +1429,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
+ intel_psr_pre_plane_update(state, crtc);
+
if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
hsw_disable_ips(old_crtc_state);
@@ -8668,7 +8670,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_encoders_update_prepare(state);
intel_dbuf_pre_plane_update(state);
- intel_psr_pre_plane_update(state);
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
if (new_crtc_state->uapi.async_flip)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ccffe05784d3..b1e48c6be8d1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1725,11 +1725,17 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
return 0;
}
-static void _intel_psr_pre_plane_update(const struct intel_atomic_state *state,
- const struct intel_crtc_state *crtc_state)
+void intel_psr_pre_plane_update(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
+ struct drm_i915_private *i915 = to_i915(state->base.dev);
+ const struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
struct intel_encoder *encoder;
+ if (!HAS_PSR(i915))
+ return;
+
for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
crtc_state->uapi.encoder_mask) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1744,6 +1750,7 @@ static void _intel_psr_pre_plane_update(const struct intel_atomic_state *state,
* - All planes will go inactive
* - Changing between PSR versions
*/
+ needs_to_disable |= intel_crtc_needs_modeset(crtc_state);
needs_to_disable |= !crtc_state->has_psr;
needs_to_disable |= !crtc_state->active_planes;
needs_to_disable |= crtc_state->has_psr2 != psr->psr2_enabled;
@@ -1755,20 +1762,6 @@ static void _intel_psr_pre_plane_update(const struct intel_atomic_state *state,
}
}
-void intel_psr_pre_plane_update(const struct intel_atomic_state *state)
-{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
- struct intel_crtc_state *crtc_state;
- struct intel_crtc *crtc;
- int i;
-
- if (!HAS_PSR(dev_priv))
- return;
-
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
- _intel_psr_pre_plane_update(state, crtc_state);
-}
-
static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index facffbacd357..3d9c0e13c329 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -20,7 +20,8 @@ struct intel_plane;
struct intel_encoder;
void intel_psr_init_dpcd(struct intel_dp *intel_dp);
-void intel_psr_pre_plane_update(const struct intel_atomic_state *state);
+void intel_psr_pre_plane_update(struct intel_atomic_state *state,
+ struct intel_crtc *crtc);
void intel_psr_post_plane_update(const struct intel_atomic_state *state);
void intel_psr_disable(struct intel_dp *intel_dp,
const struct intel_crtc_state *old_crtc_state);
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [Intel-gfx] [PATCH v2 1/9] drm/i915/psr: Disable PSR before modesets turn off all planes
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 1/9] drm/i915/psr: Disable PSR before modesets turn off all planes Ville Syrjala
@ 2021-10-22 14:29 ` Hogander, Jouni
2021-10-22 15:26 ` Ville Syrjälä
0 siblings, 1 reply; 18+ messages in thread
From: Hogander, Jouni @ 2021-10-22 14:29 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Cc: Souza, Jose
On Fri, 2021-10-22 at 13:32 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> PSR2 apparently requires some planes to be enabled for some
> silly reason, and so we are now trying to turn PSR off before
> planes go off. Except during a full modeset that is handled
> less clearly through reorganization of the modeset sequence.
> That is not great as it makes the code mode complex, and
> prevents us from doing nice things such as just turning off
> all the planes at the very start of the modeset. So let's
> move the PSR pre_plane_update() thing to a spot where it
> will handle both full modesets and everything else.
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
One minor comment below in case you send a new version for some reason.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_psr.c | 25 +++++++-----------
> --
> drivers/gpu/drm/i915/display/intel_psr.h | 3 ++-
> 3 files changed, 13 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 2b97c8797177..5201d6cdd5db 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1429,6 +1429,8 @@ static void intel_pre_plane_update(struct
> intel_atomic_state *state,
> intel_atomic_get_new_crtc_state(state, crtc);
> enum pipe pipe = crtc->pipe;
>
> + intel_psr_pre_plane_update(state, crtc);
> +
> if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
> hsw_disable_ips(old_crtc_state);
>
> @@ -8668,7 +8670,6 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> intel_encoders_update_prepare(state);
>
> intel_dbuf_pre_plane_update(state);
> - intel_psr_pre_plane_update(state);
>
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i) {
> if (new_crtc_state->uapi.async_flip)
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index ccffe05784d3..b1e48c6be8d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1725,11 +1725,17 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> return 0;
> }
>
> -static void _intel_psr_pre_plane_update(const struct
> intel_atomic_state *state,
> - const struct intel_crtc_state
> *crtc_state)
> +void intel_psr_pre_plane_update(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> + const struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct intel_encoder *encoder;
>
> + if (!HAS_PSR(i915))
> + return;
> +
> for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> crtc_state-
> >uapi.encoder_mask) {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> @@ -1744,6 +1750,7 @@ static void _intel_psr_pre_plane_update(const
> struct intel_atomic_state *state,
> * - All planes will go inactive
> * - Changing between PSR versions
> */
This comment is not reflecting the code anymore.
> + needs_to_disable |=
> intel_crtc_needs_modeset(crtc_state);
> needs_to_disable |= !crtc_state->has_psr;
> needs_to_disable |= !crtc_state->active_planes;
> needs_to_disable |= crtc_state->has_psr2 != psr-
> >psr2_enabled;
> @@ -1755,20 +1762,6 @@ static void _intel_psr_pre_plane_update(const
> struct intel_atomic_state *state,
> }
> }
>
> -void intel_psr_pre_plane_update(const struct intel_atomic_state
> *state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - struct intel_crtc_state *crtc_state;
> - struct intel_crtc *crtc;
> - int i;
> -
> - if (!HAS_PSR(dev_priv))
> - return;
> -
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
> - _intel_psr_pre_plane_update(state, crtc_state);
> -}
> -
> static void _intel_psr_post_plane_update(const struct
> intel_atomic_state *state,
> const struct intel_crtc_state
> *crtc_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> b/drivers/gpu/drm/i915/display/intel_psr.h
> index facffbacd357..3d9c0e13c329 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> @@ -20,7 +20,8 @@ struct intel_plane;
> struct intel_encoder;
>
> void intel_psr_init_dpcd(struct intel_dp *intel_dp);
> -void intel_psr_pre_plane_update(const struct intel_atomic_state
> *state);
> +void intel_psr_pre_plane_update(struct intel_atomic_state *state,
> + struct intel_crtc *crtc);
> void intel_psr_post_plane_update(const struct intel_atomic_state
> *state);
> void intel_psr_disable(struct intel_dp *intel_dp,
> const struct intel_crtc_state *old_crtc_state);
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [Intel-gfx] [PATCH v2 1/9] drm/i915/psr: Disable PSR before modesets turn off all planes
2021-10-22 14:29 ` Hogander, Jouni
@ 2021-10-22 15:26 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2021-10-22 15:26 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx@lists.freedesktop.org, Souza, Jose
On Fri, Oct 22, 2021 at 02:29:01PM +0000, Hogander, Jouni wrote:
> On Fri, 2021-10-22 at 13:32 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > PSR2 apparently requires some planes to be enabled for some
> > silly reason, and so we are now trying to turn PSR off before
> > planes go off. Except during a full modeset that is handled
> > less clearly through reorganization of the modeset sequence.
> > That is not great as it makes the code mode complex, and
> > prevents us from doing nice things such as just turning off
> > all the planes at the very start of the modeset. So let's
> > move the PSR pre_plane_update() thing to a spot where it
> > will handle both full modesets and everything else.
>
> Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Thanks.
> One minor comment below in case you send a new version for some reason.
>
> >
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
> > drivers/gpu/drm/i915/display/intel_psr.c | 25 +++++++-----------
> > --
> > drivers/gpu/drm/i915/display/intel_psr.h | 3 ++-
> > 3 files changed, 13 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 2b97c8797177..5201d6cdd5db 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1429,6 +1429,8 @@ static void intel_pre_plane_update(struct
> > intel_atomic_state *state,
> > intel_atomic_get_new_crtc_state(state, crtc);
> > enum pipe pipe = crtc->pipe;
> >
> > + intel_psr_pre_plane_update(state, crtc);
> > +
> > if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
> > hsw_disable_ips(old_crtc_state);
> >
> > @@ -8668,7 +8670,6 @@ static void intel_atomic_commit_tail(struct
> > intel_atomic_state *state)
> > intel_encoders_update_prepare(state);
> >
> > intel_dbuf_pre_plane_update(state);
> > - intel_psr_pre_plane_update(state);
> >
> > for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> > i) {
> > if (new_crtc_state->uapi.async_flip)
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index ccffe05784d3..b1e48c6be8d1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1725,11 +1725,17 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > return 0;
> > }
> >
> > -static void _intel_psr_pre_plane_update(const struct
> > intel_atomic_state *state,
> > - const struct intel_crtc_state
> > *crtc_state)
> > +void intel_psr_pre_plane_update(struct intel_atomic_state *state,
> > + struct intel_crtc *crtc)
> > {
> > + struct drm_i915_private *i915 = to_i915(state->base.dev);
> > + const struct intel_crtc_state *crtc_state =
> > + intel_atomic_get_new_crtc_state(state, crtc);
> > struct intel_encoder *encoder;
> >
> > + if (!HAS_PSR(i915))
> > + return;
> > +
> > for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> > crtc_state-
> > >uapi.encoder_mask) {
> > struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > @@ -1744,6 +1750,7 @@ static void _intel_psr_pre_plane_update(const
> > struct intel_atomic_state *state,
> > * - All planes will go inactive
> > * - Changing between PSR versions
> > */
>
> This comment is not reflecting the code anymore.
Well, we are going to turn off all the planes for a full modeset.
So not really untrue either. But not sure the comment has any real
value anyway if it just parrots what the code says anyway.
>
> > + needs_to_disable |=
> > intel_crtc_needs_modeset(crtc_state);
> > needs_to_disable |= !crtc_state->has_psr;
> > needs_to_disable |= !crtc_state->active_planes;
> > needs_to_disable |= crtc_state->has_psr2 != psr-
> > >psr2_enabled;
> > @@ -1755,20 +1762,6 @@ static void _intel_psr_pre_plane_update(const
> > struct intel_atomic_state *state,
> > }
> > }
> >
> > -void intel_psr_pre_plane_update(const struct intel_atomic_state
> > *state)
> > -{
> > - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > - struct intel_crtc_state *crtc_state;
> > - struct intel_crtc *crtc;
> > - int i;
> > -
> > - if (!HAS_PSR(dev_priv))
> > - return;
> > -
> > - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
> > - _intel_psr_pre_plane_update(state, crtc_state);
> > -}
> > -
> > static void _intel_psr_post_plane_update(const struct
> > intel_atomic_state *state,
> > const struct intel_crtc_state
> > *crtc_state)
> > {
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> > b/drivers/gpu/drm/i915/display/intel_psr.h
> > index facffbacd357..3d9c0e13c329 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> > @@ -20,7 +20,8 @@ struct intel_plane;
> > struct intel_encoder;
> >
> > void intel_psr_init_dpcd(struct intel_dp *intel_dp);
> > -void intel_psr_pre_plane_update(const struct intel_atomic_state
> > *state);
> > +void intel_psr_pre_plane_update(struct intel_atomic_state *state,
> > + struct intel_crtc *crtc);
> > void intel_psr_post_plane_update(const struct intel_atomic_state
> > *state);
> > void intel_psr_disable(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *old_crtc_state);
>
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v2 2/9] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 1/9] drm/i915/psr: Disable PSR before modesets turn off all planes Ville Syrjala
@ 2021-10-22 10:32 ` Ville Syrjala
2021-10-26 19:39 ` Souza, Jose
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Disable all planes before modesetting any pipes Ville Syrjala
` (9 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:32 UTC (permalink / raw)
To: intel-gfx; +Cc: José Roberto de Souza
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Disabling planes in the middle of the modeset seuqnece does not make
sense since userspace can anyway disable planes before the modeset
even starts. So when the modeset seuqence starts the set of enabled
planes is entirely arbitrary. Trying to sprinkle the plane disabling
into the modeset sequence just means more randomness and potential
for hard to reproduce bugs.
So it makes most sense to just disable all planes first so that the
rest of the modeset sequence remains identical regardless of which
planes happen to be enabled by userspace at the time.
This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 30 +++++++------------
drivers/gpu/drm/i915/display/intel_display.c | 24 ---------------
.../drm/i915/display/intel_display_types.h | 4 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 ++-------
4 files changed, 13 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index ab52eab346fe..6c11992496f2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3061,6 +3061,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
intel_dp->link_trained = false;
+ if (old_crtc_state->has_audio)
+ intel_audio_codec_disable(encoder,
+ old_crtc_state, old_conn_state);
+
+ intel_drrs_disable(intel_dp, old_crtc_state);
+ intel_psr_disable(intel_dp, old_crtc_state);
intel_edp_backlight_off(old_conn_state);
/* Disable the decompression in DP Sink */
intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
@@ -3078,6 +3084,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct drm_connector *connector = old_conn_state->connector;
+ if (old_crtc_state->has_audio)
+ intel_audio_codec_disable(encoder,
+ old_crtc_state, old_conn_state);
+
if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
false, false))
drm_dbg_kms(&i915->drm,
@@ -3085,25 +3095,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
connector->base.id, connector->name);
}
-static void intel_pre_disable_ddi(struct intel_atomic_state *state,
- struct intel_encoder *encoder,
- const struct intel_crtc_state *old_crtc_state,
- const struct drm_connector_state *old_conn_state)
-{
- struct intel_dp *intel_dp;
-
- if (old_crtc_state->has_audio)
- intel_audio_codec_disable(encoder, old_crtc_state,
- old_conn_state);
-
- if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
- return;
-
- intel_dp = enc_to_intel_dp(encoder);
- intel_drrs_disable(intel_dp, old_crtc_state);
- intel_psr_disable(intel_dp, old_crtc_state);
-}
-
static void intel_disable_ddi(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
@@ -4437,7 +4428,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
encoder->enable = intel_enable_ddi;
encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
encoder->pre_enable = intel_ddi_pre_enable;
- encoder->pre_disable = intel_pre_disable_ddi;
encoder->disable = intel_disable_ddi;
encoder->post_disable = intel_ddi_post_disable;
encoder->update_pipe = intel_ddi_update_pipe;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5201d6cdd5db..3d2a1cba78c1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1693,28 +1693,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
}
}
-static void intel_encoders_pre_disable(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
-{
- const struct intel_crtc_state *old_crtc_state =
- intel_atomic_get_old_crtc_state(state, crtc);
- const struct drm_connector_state *old_conn_state;
- struct drm_connector *conn;
- int i;
-
- for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
- struct intel_encoder *encoder =
- to_intel_encoder(old_conn_state->best_encoder);
-
- if (old_conn_state->crtc != &crtc->base)
- continue;
-
- if (encoder->pre_disable)
- encoder->pre_disable(state, encoder, old_crtc_state,
- old_conn_state);
- }
-}
-
static void intel_encoders_disable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
@@ -8273,8 +8251,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
- intel_encoders_pre_disable(state, crtc);
-
intel_crtc_disable_planes(state, crtc);
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 85cb55034bb0..3568d33be096 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -194,10 +194,6 @@ struct intel_encoder {
void (*update_complete)(struct intel_atomic_state *,
struct intel_encoder *,
struct intel_crtc *);
- void (*pre_disable)(struct intel_atomic_state *,
- struct intel_encoder *,
- const struct intel_crtc_state *,
- const struct drm_connector_state *);
void (*disable)(struct intel_atomic_state *,
struct intel_encoder *,
const struct intel_crtc_state *,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0de0b4ff4d73..289a8a0a3a01 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
drm_dp_check_act_status(&intel_dp->mst_mgr);
}
-static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
- struct intel_encoder *encoder,
- const struct intel_crtc_state *old_crtc_state,
- const struct drm_connector_state *old_conn_state)
-{
- if (old_crtc_state->has_audio)
- intel_audio_codec_disable(encoder, old_crtc_state,
- old_conn_state);
-}
-
static void intel_mst_disable_dp(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
@@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
if (ret) {
drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
}
+ if (old_crtc_state->has_audio)
+ intel_audio_codec_disable(encoder,
+ old_crtc_state, old_conn_state);
}
static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
@@ -916,7 +909,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
intel_encoder->compute_config = intel_dp_mst_compute_config;
intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
- intel_encoder->pre_disable = intel_mst_pre_disable_dp;
intel_encoder->disable = intel_mst_disable_dp;
intel_encoder->post_disable = intel_mst_post_disable_dp;
intel_encoder->update_pipe = intel_ddi_update_pipe;
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [Intel-gfx] [PATCH v2 2/9] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 2/9] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes" Ville Syrjala
@ 2021-10-26 19:39 ` Souza, Jose
2021-10-27 11:31 ` Ville Syrjälä
0 siblings, 1 reply; 18+ messages in thread
From: Souza, Jose @ 2021-10-26 19:39 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
On Fri, 2021-10-22 at 13:32 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Disabling planes in the middle of the modeset seuqnece does not make
> sense since userspace can anyway disable planes before the modeset
> even starts. So when the modeset seuqence starts the set of enabled
> planes is entirely arbitrary. Trying to sprinkle the plane disabling
> into the modeset sequence just means more randomness and potential
> for hard to reproduce bugs.
>
> So it makes most sense to just disable all planes first so that the
> rest of the modeset sequence remains identical regardless of which
> planes happen to be enabled by userspace at the time.
>
> This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
With the 'drm/i915/psr: Disable PSR before modesets turn off all planes' it is now okay to revert this.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 30 +++++++------------
> drivers/gpu/drm/i915/display/intel_display.c | 24 ---------------
> .../drm/i915/display/intel_display_types.h | 4 ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 ++-------
> 4 files changed, 13 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index ab52eab346fe..6c11992496f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3061,6 +3061,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
>
> intel_dp->link_trained = false;
>
> + if (old_crtc_state->has_audio)
> + intel_audio_codec_disable(encoder,
> + old_crtc_state, old_conn_state);
> +
> + intel_drrs_disable(intel_dp, old_crtc_state);
> + intel_psr_disable(intel_dp, old_crtc_state);
> intel_edp_backlight_off(old_conn_state);
> /* Disable the decompression in DP Sink */
> intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
> @@ -3078,6 +3084,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> struct drm_connector *connector = old_conn_state->connector;
>
> + if (old_crtc_state->has_audio)
> + intel_audio_codec_disable(encoder,
> + old_crtc_state, old_conn_state);
> +
> if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
> false, false))
> drm_dbg_kms(&i915->drm,
> @@ -3085,25 +3095,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> connector->base.id, connector->name);
> }
>
> -static void intel_pre_disable_ddi(struct intel_atomic_state *state,
> - struct intel_encoder *encoder,
> - const struct intel_crtc_state *old_crtc_state,
> - const struct drm_connector_state *old_conn_state)
> -{
> - struct intel_dp *intel_dp;
> -
> - if (old_crtc_state->has_audio)
> - intel_audio_codec_disable(encoder, old_crtc_state,
> - old_conn_state);
> -
> - if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> - return;
> -
> - intel_dp = enc_to_intel_dp(encoder);
> - intel_drrs_disable(intel_dp, old_crtc_state);
> - intel_psr_disable(intel_dp, old_crtc_state);
> -}
> -
> static void intel_disable_ddi(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *old_crtc_state,
> @@ -4437,7 +4428,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> encoder->enable = intel_enable_ddi;
> encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> encoder->pre_enable = intel_ddi_pre_enable;
> - encoder->pre_disable = intel_pre_disable_ddi;
> encoder->disable = intel_disable_ddi;
> encoder->post_disable = intel_ddi_post_disable;
> encoder->update_pipe = intel_ddi_update_pipe;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 5201d6cdd5db..3d2a1cba78c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1693,28 +1693,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
> }
> }
>
> -static void intel_encoders_pre_disable(struct intel_atomic_state *state,
> - struct intel_crtc *crtc)
> -{
> - const struct intel_crtc_state *old_crtc_state =
> - intel_atomic_get_old_crtc_state(state, crtc);
> - const struct drm_connector_state *old_conn_state;
> - struct drm_connector *conn;
> - int i;
> -
> - for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
> - struct intel_encoder *encoder =
> - to_intel_encoder(old_conn_state->best_encoder);
> -
> - if (old_conn_state->crtc != &crtc->base)
> - continue;
> -
> - if (encoder->pre_disable)
> - encoder->pre_disable(state, encoder, old_crtc_state,
> - old_conn_state);
> - }
> -}
> -
> static void intel_encoders_disable(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> @@ -8273,8 +8251,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>
> drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
>
> - intel_encoders_pre_disable(state, crtc);
> -
> intel_crtc_disable_planes(state, crtc);
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 85cb55034bb0..3568d33be096 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -194,10 +194,6 @@ struct intel_encoder {
> void (*update_complete)(struct intel_atomic_state *,
> struct intel_encoder *,
> struct intel_crtc *);
> - void (*pre_disable)(struct intel_atomic_state *,
> - struct intel_encoder *,
> - const struct intel_crtc_state *,
> - const struct drm_connector_state *);
> void (*disable)(struct intel_atomic_state *,
> struct intel_encoder *,
> const struct intel_crtc_state *,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 0de0b4ff4d73..289a8a0a3a01 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
> drm_dp_check_act_status(&intel_dp->mst_mgr);
> }
>
> -static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
> - struct intel_encoder *encoder,
> - const struct intel_crtc_state *old_crtc_state,
> - const struct drm_connector_state *old_conn_state)
> -{
> - if (old_crtc_state->has_audio)
> - intel_audio_codec_disable(encoder, old_crtc_state,
> - old_conn_state);
> -}
> -
> static void intel_mst_disable_dp(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *old_crtc_state,
> @@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
> if (ret) {
> drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
> }
> + if (old_crtc_state->has_audio)
> + intel_audio_codec_disable(encoder,
> + old_crtc_state, old_conn_state);
> }
>
> static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> @@ -916,7 +909,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
>
> intel_encoder->compute_config = intel_dp_mst_compute_config;
> intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
> - intel_encoder->pre_disable = intel_mst_pre_disable_dp;
> intel_encoder->disable = intel_mst_disable_dp;
> intel_encoder->post_disable = intel_mst_post_disable_dp;
> intel_encoder->update_pipe = intel_ddi_update_pipe;
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [Intel-gfx] [PATCH v2 2/9] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
2021-10-26 19:39 ` Souza, Jose
@ 2021-10-27 11:31 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2021-10-27 11:31 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx@lists.freedesktop.org
On Tue, Oct 26, 2021 at 07:39:27PM +0000, Souza, Jose wrote:
> On Fri, 2021-10-22 at 13:32 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Disabling planes in the middle of the modeset seuqnece does not make
> > sense since userspace can anyway disable planes before the modeset
> > even starts. So when the modeset seuqence starts the set of enabled
> > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > into the modeset sequence just means more randomness and potential
> > for hard to reproduce bugs.
> >
> > So it makes most sense to just disable all planes first so that the
> > rest of the modeset sequence remains identical regardless of which
> > planes happen to be enabled by userspace at the time.
> >
> > This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
>
> With the 'drm/i915/psr: Disable PSR before modesets turn off all planes' it is now okay to revert this.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Thanks for the reviews everyone. Series pushed to drm-intel-next.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v2 3/9] drm/i915: Disable all planes before modesetting any pipes
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 1/9] drm/i915/psr: Disable PSR before modesets turn off all planes Ville Syrjala
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 2/9] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes" Ville Syrjala
@ 2021-10-22 10:32 ` Ville Syrjala
2021-10-26 19:39 ` Souza, Jose
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Introduce intel_master_crtc() Ville Syrjala
` (8 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:32 UTC (permalink / raw)
To: intel-gfx; +Cc: José Roberto de Souza, Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's disable planes on all pipes affected by the modeset before
we start doing the actual modeset. This means we have less
random planes enabled during the modeset, and it also mirrors
what we already do when enabling pipes on skl+ since we enable
planes on all pipes as the very last step. As a bonus we also
nuke a bunch og bigjoiner special casing.
I've occasionally pondered about going even furher here and
doing the pre_plane_update() stuff for all pipes first, then
actually disabling the planes, and finally running the rest
of the modeset sequence. This would potentially allow
parallelizing all the extra vblank waits across multiple pipes,
and would make the plane disable even more atomic. But let's
go one step a time here.
Cc: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3d2a1cba78c1..1d920ba83521 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8251,18 +8251,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
- intel_crtc_disable_planes(state, crtc);
-
/*
* We still need special handling for disabling bigjoiner master
* and slaves since for slave we do not have encoder or plls
* so we dont need to disable those.
*/
- if (old_crtc_state->bigjoiner) {
- intel_crtc_disable_planes(state,
- old_crtc_state->bigjoiner_linked_crtc);
+ if (old_crtc_state->bigjoiner)
old_crtc_state->bigjoiner_linked_crtc->active = false;
- }
/*
* We need to disable pipe CRC before disabling the pipe,
@@ -8288,6 +8283,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
u32 handled = 0;
int i;
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
+ new_crtc_state, i) {
+ if (!intel_crtc_needs_modeset(new_crtc_state))
+ continue;
+
+ if (!old_crtc_state->hw.active)
+ continue;
+
+ intel_pre_plane_update(state, crtc);
+ intel_crtc_disable_planes(state, crtc);
+ }
+
/* Only disable port sync and MST slaves */
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
@@ -8306,7 +8313,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
!intel_dp_mst_is_slave_trans(old_crtc_state))
continue;
- intel_pre_plane_update(state, crtc);
intel_old_crtc_state_disables(state, old_crtc_state,
new_crtc_state, crtc);
handled |= BIT(crtc->pipe);
@@ -8320,14 +8326,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
old_crtc_state->bigjoiner_slave)
continue;
- intel_pre_plane_update(state, crtc);
- if (old_crtc_state->bigjoiner) {
- struct intel_crtc *slave =
- old_crtc_state->bigjoiner_linked_crtc;
-
- intel_pre_plane_update(state, slave);
- }
-
if (old_crtc_state->hw.active)
intel_old_crtc_state_disables(state, old_crtc_state,
new_crtc_state, crtc);
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [Intel-gfx] [PATCH v2 3/9] drm/i915: Disable all planes before modesetting any pipes
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Disable all planes before modesetting any pipes Ville Syrjala
@ 2021-10-26 19:39 ` Souza, Jose
0 siblings, 0 replies; 18+ messages in thread
From: Souza, Jose @ 2021-10-26 19:39 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Cc: Navare, Manasi D
On Fri, 2021-10-22 at 13:32 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Let's disable planes on all pipes affected by the modeset before
> we start doing the actual modeset. This means we have less
> random planes enabled during the modeset, and it also mirrors
> what we already do when enabling pipes on skl+ since we enable
> planes on all pipes as the very last step. As a bonus we also
> nuke a bunch og bigjoiner special casing.
>
> I've occasionally pondered about going even furher here and
> doing the pre_plane_update() stuff for all pipes first, then
> actually disabling the planes, and finally running the rest
> of the modeset sequence. This would potentially allow
> parallelizing all the extra vblank waits across multiple pipes,
> and would make the plane disable even more atomic. But let's
> go one step a time here.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
> 1 file changed, 13 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 3d2a1cba78c1..1d920ba83521 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8251,18 +8251,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>
> drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
>
> - intel_crtc_disable_planes(state, crtc);
> -
> /*
> * We still need special handling for disabling bigjoiner master
> * and slaves since for slave we do not have encoder or plls
> * so we dont need to disable those.
> */
> - if (old_crtc_state->bigjoiner) {
> - intel_crtc_disable_planes(state,
> - old_crtc_state->bigjoiner_linked_crtc);
> + if (old_crtc_state->bigjoiner)
> old_crtc_state->bigjoiner_linked_crtc->active = false;
> - }
>
> /*
> * We need to disable pipe CRC before disabling the pipe,
> @@ -8288,6 +8283,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> u32 handled = 0;
> int i;
>
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> + new_crtc_state, i) {
> + if (!intel_crtc_needs_modeset(new_crtc_state))
> + continue;
> +
> + if (!old_crtc_state->hw.active)
> + continue;
> +
> + intel_pre_plane_update(state, crtc);
> + intel_crtc_disable_planes(state, crtc);
> + }
> +
> /* Only disable port sync and MST slaves */
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> @@ -8306,7 +8313,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> !intel_dp_mst_is_slave_trans(old_crtc_state))
> continue;
>
> - intel_pre_plane_update(state, crtc);
> intel_old_crtc_state_disables(state, old_crtc_state,
> new_crtc_state, crtc);
> handled |= BIT(crtc->pipe);
> @@ -8320,14 +8326,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> old_crtc_state->bigjoiner_slave)
> continue;
>
> - intel_pre_plane_update(state, crtc);
> - if (old_crtc_state->bigjoiner) {
> - struct intel_crtc *slave =
> - old_crtc_state->bigjoiner_linked_crtc;
> -
> - intel_pre_plane_update(state, slave);
> - }
> -
> if (old_crtc_state->hw.active)
> intel_old_crtc_state_disables(state, old_crtc_state,
> new_crtc_state, crtc);
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v2 4/9] drm/i915: Introduce intel_master_crtc()
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (2 preceding siblings ...)
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Disable all planes before modesetting any pipes Ville Syrjala
@ 2021-10-22 10:32 ` Ville Syrjala
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset() Ville Syrjala
` (7 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:32 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a helper to determine the master crtc for bigjoiner usage.
Also name the variables consistently.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +--
drivers/gpu/drm/i915/display/intel_display.c | 57 +++++++++++---------
2 files changed, 33 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6c11992496f2..f8d07689d20c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2825,12 +2825,10 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
}
if (old_crtc_state->bigjoiner_linked_crtc) {
- struct intel_atomic_state *state =
- to_intel_atomic_state(old_crtc_state->uapi.state);
- struct intel_crtc *slave =
+ struct intel_crtc *slave_crtc =
old_crtc_state->bigjoiner_linked_crtc;
const struct intel_crtc_state *old_slave_crtc_state =
- intel_atomic_get_old_crtc_state(state, slave);
+ intel_atomic_get_old_crtc_state(state, slave_crtc);
intel_crtc_vblank_off(old_slave_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1d920ba83521..640d87a00e15 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -335,6 +335,14 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
is_trans_port_sync_slave(crtc_state);
}
+static struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)
+{
+ if (crtc_state->bigjoiner_slave)
+ return crtc_state->bigjoiner_linked_crtc;
+ else
+ return to_intel_crtc(crtc_state->uapi.crtc);
+}
+
static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
@@ -1947,21 +1955,19 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(master->base.dev);
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *master_crtc_state;
+ struct intel_crtc *master_crtc;
struct drm_connector_state *conn_state;
struct drm_connector *conn;
struct intel_encoder *encoder = NULL;
int i;
- if (crtc_state->bigjoiner_slave)
- master = crtc_state->bigjoiner_linked_crtc;
-
- master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
+ master_crtc = intel_master_crtc(crtc_state);
+ master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
- if (conn_state->crtc != &master->base)
+ if (conn_state->crtc != &master_crtc->base)
continue;
encoder = to_intel_encoder(conn_state->best_encoder);
@@ -1975,10 +1981,10 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
/*
* Enable sequence steps 1-7 on bigjoiner master
*/
- intel_encoders_pre_pll_enable(state, master);
+ intel_encoders_pre_pll_enable(state, master_crtc);
if (master_crtc_state->shared_dpll)
intel_enable_shared_dpll(master_crtc_state);
- intel_encoders_pre_enable(state, master);
+ intel_encoders_pre_enable(state, master_crtc);
/* and DSC on slave */
intel_dsc_enable(NULL, crtc_state);
@@ -6877,7 +6883,7 @@ verify_crtc_state(struct intel_crtc *crtc,
struct intel_encoder *encoder;
struct intel_crtc_state *pipe_config = old_crtc_state;
struct drm_atomic_state *state = old_crtc_state->uapi.state;
- struct intel_crtc *master = crtc;
+ struct intel_crtc *master_crtc;
__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
intel_crtc_free_hw_state(old_crtc_state);
@@ -6905,10 +6911,9 @@ verify_crtc_state(struct intel_crtc *crtc,
"(expected %i, found %i)\n",
new_crtc_state->hw.active, crtc->active);
- if (new_crtc_state->bigjoiner_slave)
- master = new_crtc_state->bigjoiner_linked_crtc;
+ master_crtc = intel_master_crtc(new_crtc_state);
- for_each_encoder_on_crtc(dev, &master->base, encoder) {
+ for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
enum pipe pipe;
bool active;
@@ -6918,7 +6923,7 @@ verify_crtc_state(struct intel_crtc *crtc,
encoder->base.base.id, active,
new_crtc_state->hw.active);
- I915_STATE_WARN(active && master->pipe != pipe,
+ I915_STATE_WARN(active && master_crtc->pipe != pipe,
"Encoder connected to wrong pipe %c\n",
pipe_name(pipe));
@@ -7590,13 +7595,13 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
struct intel_crtc_state *new_crtc_state)
{
struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
- struct intel_crtc *slave, *master;
+ struct intel_crtc *slave_crtc, *master_crtc;
/* slave being enabled, is master is still claiming this crtc? */
if (old_crtc_state->bigjoiner_slave) {
- slave = crtc;
- master = old_crtc_state->bigjoiner_linked_crtc;
- master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
+ slave_crtc = crtc;
+ master_crtc = old_crtc_state->bigjoiner_linked_crtc;
+ master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
if (!master_crtc_state || !intel_crtc_needs_modeset(master_crtc_state))
goto claimed;
}
@@ -7604,17 +7609,17 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
if (!new_crtc_state->bigjoiner)
return 0;
- slave = intel_dsc_get_bigjoiner_secondary(crtc);
- if (!slave) {
+ slave_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
+ if (!slave_crtc) {
DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration requires "
"CRTC + 1 to be used, doesn't exist\n",
crtc->base.base.id, crtc->base.name);
return -EINVAL;
}
- new_crtc_state->bigjoiner_linked_crtc = slave;
- slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
- master = crtc;
+ new_crtc_state->bigjoiner_linked_crtc = slave_crtc;
+ slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave_crtc);
+ master_crtc = crtc;
if (IS_ERR(slave_crtc_state))
return PTR_ERR(slave_crtc_state);
@@ -7623,15 +7628,15 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
goto claimed;
DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
- slave->base.base.id, slave->base.name);
+ slave_crtc->base.base.id, slave_crtc->base.name);
return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
claimed:
DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but "
"[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
- slave->base.base.id, slave->base.name,
- master->base.base.id, master->base.name);
+ slave_crtc->base.base.id, slave_crtc->base.name,
+ master_crtc->base.base.id, master_crtc->base.name);
return -EINVAL;
}
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [Intel-gfx] [PATCH v2 5/9] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (3 preceding siblings ...)
2021-10-22 10:32 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Introduce intel_master_crtc() Ville Syrjala
@ 2021-10-22 10:33 ` Ville Syrjala
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Split PPS write from DSC enable Ville Syrjala
` (6 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:33 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Rewrite intel_crtc_copy_uapi_to_hw_state_nomodeset() in a
slightly more straightforward manner.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++----------
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 640d87a00e15..e745eb4650e4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5762,18 +5762,15 @@ static void
intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state,
struct intel_crtc_state *crtc_state)
{
- const struct intel_crtc_state *from_crtc_state = crtc_state;
+ const struct intel_crtc_state *master_crtc_state;
+ struct intel_crtc *master_crtc;
- if (crtc_state->bigjoiner_slave) {
- from_crtc_state = intel_atomic_get_new_crtc_state(state,
- crtc_state->bigjoiner_linked_crtc);
+ master_crtc = intel_master_crtc(crtc_state);
+ master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
- /* No need to copy state if the master state is unchanged */
- if (!from_crtc_state)
- return;
- }
-
- intel_crtc_copy_color_blobs(crtc_state, from_crtc_state);
+ /* No need to copy state if the master state is unchanged */
+ if (master_crtc_state)
+ intel_crtc_copy_color_blobs(crtc_state, master_crtc_state);
}
static void
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [Intel-gfx] [PATCH v2 6/9] drm/i915: Split PPS write from DSC enable
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (4 preceding siblings ...)
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset() Ville Syrjala
@ 2021-10-22 10:33 ` Ville Syrjala
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Perform correct cpu_transcoder readout for bigjoiner Ville Syrjala
` (5 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:33 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The PPS SDP is fed into the transcoder whereas the DSC
block is (or at least can be) per pipe. Let's split these
into two distinct operations in an effort to untagle the
bigjoiner mess where we have two pipes feeding a single
transcoder.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 6 ++--
drivers/gpu/drm/i915/display/intel_ddi.c | 14 +++++++--
drivers/gpu/drm/i915/display/intel_display.c | 5 ++-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 33 +++++++++-----------
drivers/gpu/drm/i915/display/intel_vdsc.h | 10 +++---
6 files changed, 39 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 168c84a74d30..19167efae07a 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1232,7 +1232,9 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
/* step5: program and powerup panel */
gen11_dsi_powerup_panel(encoder);
- intel_dsc_enable(encoder, pipe_config);
+ intel_dsc_dsi_pps_write(encoder, pipe_config);
+
+ intel_dsc_enable(pipe_config);
/* step6c: configure transcoder timings */
gen11_dsi_set_transcoder_timings(encoder, pipe_config);
@@ -1628,7 +1630,7 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
/* FIXME: initialize from VBT */
vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
- ret = intel_dsc_compute_params(encoder, crtc_state);
+ ret = intel_dsc_compute_params(crtc_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index f8d07689d20c..8b4ef9ef77fb 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2386,7 +2386,10 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
/* 5.k Configure and enable FEC if needed */
intel_ddi_enable_fec(encoder, crtc_state);
- intel_dsc_enable(encoder, crtc_state);
+
+ intel_dsc_dp_pps_write(encoder, crtc_state);
+
+ intel_dsc_enable(crtc_state);
}
static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2520,8 +2523,11 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
/* 7.l Configure and enable FEC if needed */
intel_ddi_enable_fec(encoder, crtc_state);
+
+ intel_dsc_dp_pps_write(encoder, crtc_state);
+
if (!crtc_state->bigjoiner)
- intel_dsc_enable(encoder, crtc_state);
+ intel_dsc_enable(crtc_state);
}
static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2586,8 +2592,10 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
if (!is_mst)
intel_ddi_enable_pipe_clock(encoder, crtc_state);
+ intel_dsc_dp_pps_write(encoder, crtc_state);
+
if (!crtc_state->bigjoiner)
- intel_dsc_enable(encoder, crtc_state);
+ intel_dsc_enable(crtc_state);
}
static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e745eb4650e4..6a8da98ad60a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1976,7 +1976,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
if (!crtc_state->bigjoiner_slave) {
/* need to enable VDSC, which we skipped in pre-enable */
- intel_dsc_enable(encoder, crtc_state);
+ intel_dsc_enable(crtc_state);
} else {
/*
* Enable sequence steps 1-7 on bigjoiner master
@@ -1986,8 +1986,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
intel_enable_shared_dpll(master_crtc_state);
intel_encoders_pre_enable(state, master_crtc);
- /* and DSC on slave */
- intel_dsc_enable(NULL, crtc_state);
+ intel_dsc_enable(crtc_state);
}
if (DISPLAY_VER(dev_priv) >= 13)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f5dc2126d140..e71f20d4de00 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1345,7 +1345,7 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
else
vdsc_cfg->slice_height = 2;
- ret = intel_dsc_compute_params(encoder, crtc_state);
+ ret = intel_dsc_compute_params(crtc_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 2275f99ce9d7..fa84be609d5d 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -442,10 +442,10 @@ calculate_rc_params(struct rc_parameters *rc,
}
}
-int intel_dsc_compute_params(struct intel_encoder *encoder,
- struct intel_crtc_state *pipe_config)
+int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
const struct rc_parameters *rc_params;
@@ -1055,8 +1055,8 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
}
}
-static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
{
const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
@@ -1064,6 +1064,9 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
struct drm_dsc_picture_parameter_set pps;
enum port port;
+ if (!crtc_state->dsc.compression_enable)
+ return;
+
drm_dsc_pps_payload_pack(&pps, vdsc_cfg);
for_each_dsi_port(port, intel_dsi->ports) {
@@ -1074,14 +1077,16 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
}
}
-static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
{
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
+ if (!crtc_state->dsc.compression_enable)
+ return;
+
/* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp.pps_header);
@@ -1142,8 +1147,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
}
}
-void intel_dsc_enable(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+void intel_dsc_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1155,13 +1159,6 @@ void intel_dsc_enable(struct intel_encoder *encoder,
intel_dsc_pps_configure(crtc_state);
- if (!crtc_state->bigjoiner_slave) {
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
- intel_dsc_dsi_pps_write(encoder, crtc_state);
- else
- intel_dsc_dp_pps_write(encoder, crtc_state);
- }
-
dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;
if (crtc_state->dsc.dsc_split) {
dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 0c5d80a572da..4ec75f715986 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -15,15 +15,17 @@ struct intel_encoder;
bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
-void intel_dsc_enable(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state);
+void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-int intel_dsc_compute_params(struct intel_encoder *encoder,
- struct intel_crtc_state *pipe_config);
+int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state);
void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
enum intel_display_power_domain
intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc);
+void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state);
+void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_VDSC_H__ */
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [Intel-gfx] [PATCH v2 7/9] drm/i915: Perform correct cpu_transcoder readout for bigjoiner
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (5 preceding siblings ...)
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Split PPS write from DSC enable Ville Syrjala
@ 2021-10-22 10:33 ` Ville Syrjala
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Reduce bigjoiner special casing Ville Syrjala
` (4 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:33 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Read out cpu_transcoder correctly for the bigjoiner slave pipes.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 66 ++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6a8da98ad60a..753f443e74bd 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4064,6 +4064,16 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
return ret;
}
+static u8 bigjoiner_pipes(struct drm_i915_private *i915)
+{
+ if (DISPLAY_VER(i915) >= 12)
+ return BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
+ else if (DISPLAY_VER(i915) >= 11)
+ return BIT(PIPE_B) | BIT(PIPE_C);
+ else
+ return 0;
+}
+
static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
@@ -4079,6 +4089,54 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
return tmp & TRANS_DDI_FUNC_ENABLE;
}
+static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
+{
+ u8 master_pipes = 0, slave_pipes = 0;
+ struct intel_crtc *crtc;
+
+ for_each_intel_crtc(&dev_priv->drm, crtc) {
+ enum intel_display_power_domain power_domain;
+ enum pipe pipe = crtc->pipe;
+ intel_wakeref_t wakeref;
+
+ if ((bigjoiner_pipes(dev_priv) & BIT(pipe)) == 0)
+ continue;
+
+ power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);
+ with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
+ u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
+
+ if (!(tmp & BIG_JOINER_ENABLE))
+ continue;
+
+ if (tmp & MASTER_BIG_JOINER_ENABLE)
+ master_pipes |= BIT(pipe);
+ else
+ slave_pipes |= BIT(pipe);
+ }
+
+ if (DISPLAY_VER(dev_priv) < 13)
+ continue;
+
+ power_domain = POWER_DOMAIN_PIPE(pipe);
+ with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
+ u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
+
+ if (tmp & UNCOMPRESSED_JOINER_MASTER)
+ master_pipes |= BIT(pipe);
+ if (tmp & UNCOMPRESSED_JOINER_SLAVE)
+ slave_pipes |= BIT(pipe);
+ }
+ }
+
+ /* Bigjoiner pipes should always be consecutive master and slave */
+ drm_WARN(&dev_priv->drm, slave_pipes != master_pipes << 1,
+ "Bigjoiner misconfigured (master pipes 0x%x, slave pipes 0x%x)\n",
+ master_pipes, slave_pipes);
+
+ return slave_pipes;
+}
+
static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
{
u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
@@ -4140,10 +4198,18 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
enabled_transcoders |= BIT(cpu_transcoder);
}
+ /* single pipe or bigjoiner master */
cpu_transcoder = (enum transcoder) crtc->pipe;
if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
enabled_transcoders |= BIT(cpu_transcoder);
+ /* bigjoiner slave -> consider the master pipe's transcoder as well */
+ if (enabled_bigjoiner_pipes(dev_priv) & BIT(crtc->pipe)) {
+ cpu_transcoder = (enum transcoder) crtc->pipe - 1;
+ if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
+ enabled_transcoders |= BIT(cpu_transcoder);
+ }
+
return enabled_transcoders;
}
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [Intel-gfx] [PATCH v2 8/9] drm/i915: Reduce bigjoiner special casing
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (6 preceding siblings ...)
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Perform correct cpu_transcoder readout for bigjoiner Ville Syrjala
@ 2021-10-22 10:33 ` Ville Syrjala
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE Ville Syrjala
` (3 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:33 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Try to make bigjoiner pipes less special.
The main things here are that each pipe now does full
clock computation/readout with its own shared_dpll reference.
Also every pipe's cpu_transcoder always points correctly
at the master transcoder.
Due to the above changes state readout is now complete
and all the related hacks can go away. The actual modeset
sequence code is still a mess, but I think in order to clean
that up properly we're probably going to have to redesign
the modeset logic to treat transcoders vs. pipes separately.
That is going to require significant amounts of work.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 16 +--
drivers/gpu/drm/i915/display/intel_display.c | 136 ++++++-------------
2 files changed, 41 insertions(+), 111 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8b4ef9ef77fb..9fb99b09fff8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3515,18 +3515,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
return;
- if (pipe_config->bigjoiner_slave) {
- /* read out pipe settings from master */
- enum transcoder save = pipe_config->cpu_transcoder;
-
- /* Our own transcoder needs to be disabled when reading it in intel_ddi_read_func_ctl() */
- WARN_ON(pipe_config->output_types);
- pipe_config->cpu_transcoder = (enum transcoder)pipe_config->bigjoiner_linked_crtc->pipe;
- intel_ddi_read_func_ctl(encoder, pipe_config);
- pipe_config->cpu_transcoder = save;
- } else {
- intel_ddi_read_func_ctl(encoder, pipe_config);
- }
+ intel_ddi_read_func_ctl(encoder, pipe_config);
intel_ddi_mso_get_config(encoder, pipe_config);
@@ -3554,8 +3543,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
}
- if (!pipe_config->bigjoiner_slave)
- ddi_dotclock_get(pipe_config);
+ ddi_dotclock_get(pipe_config);
if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
pipe_config->lane_lat_optim_mask =
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 753f443e74bd..f21030ffa83d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1038,15 +1038,17 @@ struct intel_encoder *
intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
const struct drm_connector_state *connector_state;
const struct drm_connector *connector;
struct intel_encoder *encoder = NULL;
+ struct intel_crtc *master_crtc;
int num_encoders = 0;
int i;
+ master_crtc = intel_master_crtc(crtc_state);
+
for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
- if (connector_state->crtc != &crtc->base)
+ if (connector_state->crtc != &master_crtc->base)
continue;
encoder = to_intel_encoder(connector_state->best_encoder);
@@ -1055,7 +1057,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
drm_WARN(encoder->base.dev, num_encoders != 1,
"%d encoders for pipe %c\n",
- num_encoders, pipe_name(crtc->pipe));
+ num_encoders, pipe_name(master_crtc->pipe));
return encoder;
}
@@ -1974,20 +1976,20 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
break;
}
- if (!crtc_state->bigjoiner_slave) {
- /* need to enable VDSC, which we skipped in pre-enable */
- intel_dsc_enable(crtc_state);
- } else {
- /*
- * Enable sequence steps 1-7 on bigjoiner master
- */
+ /*
+ * Enable sequence steps 1-7 on bigjoiner master
+ */
+ if (crtc_state->bigjoiner_slave)
intel_encoders_pre_pll_enable(state, master_crtc);
- if (master_crtc_state->shared_dpll)
- intel_enable_shared_dpll(master_crtc_state);
+
+ if (crtc_state->shared_dpll)
+ intel_enable_shared_dpll(crtc_state);
+
+ if (crtc_state->bigjoiner_slave)
intel_encoders_pre_enable(state, master_crtc);
- intel_dsc_enable(crtc_state);
- }
+ /* need to enable VDSC, which we skipped in pre-enable */
+ intel_dsc_enable(crtc_state);
if (DISPLAY_VER(dev_priv) >= 13)
intel_uncompressed_joiner_enable(crtc_state);
@@ -2148,12 +2150,17 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
static void hsw_crtc_disable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+
/*
* FIXME collapse everything to one hook.
* Need care with mst->ddi interactions.
*/
- intel_encoders_disable(state, crtc);
- intel_encoders_post_disable(state, crtc);
+ if (!old_crtc_state->bigjoiner_slave) {
+ intel_encoders_disable(state, crtc);
+ intel_encoders_post_disable(state, crtc);
+ }
}
static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
@@ -4356,20 +4363,12 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
if (DISPLAY_VER(dev_priv) >= 13 && !pipe_config->dsc.compression_enable)
intel_uncompressed_joiner_get_config(pipe_config);
- if (!active) {
- /* bigjoiner slave doesn't enable transcoder */
- if (!pipe_config->bigjoiner_slave)
- goto out;
+ if (!active)
+ goto out;
- active = true;
- pipe_config->pixel_multiplier = 1;
-
- /* we cannot read out most state, so don't bother.. */
- pipe_config->quirks |= PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE;
- } else if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
- DISPLAY_VER(dev_priv) >= 11) {
+ if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
+ DISPLAY_VER(dev_priv) >= 11)
intel_get_transcoder_timings(crtc, pipe_config);
- }
if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder))
intel_vrr_get_config(crtc, pipe_config);
@@ -4437,10 +4436,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
}
}
- if (pipe_config->bigjoiner_slave) {
- /* Cannot be read out as a slave, set to 0. */
- pipe_config->pixel_multiplier = 0;
- } else if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
+ if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
!transcoder_is_dsi(pipe_config->cpu_transcoder)) {
pipe_config->pixel_multiplier =
intel_de_read(dev_priv,
@@ -5270,8 +5266,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
crtc_state->update_wm_post = true;
if (mode_changed && crtc_state->hw.enable &&
- dev_priv->dpll_funcs &&
- !crtc_state->bigjoiner_slave &&
!drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
ret = dev_priv->dpll_funcs->crtc_compute_clock(crtc_state);
if (ret)
@@ -5878,7 +5872,6 @@ copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
const struct intel_crtc_state *from_crtc_state)
{
struct intel_crtc_state *saved_state;
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
saved_state = kmemdup(from_crtc_state, sizeof(*saved_state), GFP_KERNEL);
if (!saved_state)
@@ -5908,8 +5901,8 @@ copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
crtc_state->nv12_planes = crtc_state->c8_planes = crtc_state->update_planes = 0;
crtc_state->bigjoiner_linked_crtc = to_intel_crtc(from_crtc_state->uapi.crtc);
crtc_state->bigjoiner_slave = true;
- crtc_state->cpu_transcoder = (enum transcoder)crtc->pipe;
- crtc_state->has_audio = false;
+ crtc_state->cpu_transcoder = from_crtc_state->cpu_transcoder;
+ crtc_state->has_audio = from_crtc_state->has_audio;
return 0;
}
@@ -6996,10 +6989,6 @@ verify_crtc_state(struct intel_crtc *crtc,
if (!new_crtc_state->hw.active)
return;
- if (new_crtc_state->bigjoiner_slave)
- /* No PLLs set for slave */
- pipe_config->shared_dpll = NULL;
-
intel_pipe_config_sanity_check(dev_priv, pipe_config);
if (!intel_pipe_config_compare(new_crtc_state,
@@ -7118,9 +7107,6 @@ verify_mpllb_state(struct intel_atomic_state *state,
if (!new_crtc_state->hw.active)
return;
- if (new_crtc_state->bigjoiner_slave)
- return;
-
encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
@@ -8316,16 +8302,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
- drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
-
- /*
- * We still need special handling for disabling bigjoiner master
- * and slaves since for slave we do not have encoder or plls
- * so we dont need to disable those.
- */
- if (old_crtc_state->bigjoiner)
- old_crtc_state->bigjoiner_linked_crtc->active = false;
-
/*
* We need to disable pipe CRC before disabling the pipe,
* or we race against vblank off.
@@ -8365,7 +8341,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
/* Only disable port sync and MST slaves */
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
- if (!intel_crtc_needs_modeset(new_crtc_state) || old_crtc_state->bigjoiner)
+ if (!intel_crtc_needs_modeset(new_crtc_state))
continue;
if (!old_crtc_state->hw.active)
@@ -8377,7 +8353,8 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
* Slave vblanks are masked till Master Vblanks.
*/
if (!is_trans_port_sync_slave(old_crtc_state) &&
- !intel_dp_mst_is_slave_trans(old_crtc_state))
+ !intel_dp_mst_is_slave_trans(old_crtc_state) &&
+ !old_crtc_state->bigjoiner_slave)
continue;
intel_old_crtc_state_disables(state, old_crtc_state,
@@ -8389,13 +8366,14 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
if (!intel_crtc_needs_modeset(new_crtc_state) ||
- (handled & BIT(crtc->pipe)) ||
- old_crtc_state->bigjoiner_slave)
+ (handled & BIT(crtc->pipe)))
continue;
- if (old_crtc_state->hw.active)
- intel_old_crtc_state_disables(state, old_crtc_state,
- new_crtc_state, crtc);
+ if (!old_crtc_state->hw.active)
+ continue;
+
+ intel_old_crtc_state_disables(state, old_crtc_state,
+ new_crtc_state, crtc);
}
}
@@ -10494,9 +10472,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
struct intel_plane *plane;
int min_cdclk = 0;
- if (crtc_state->bigjoiner_slave)
- continue;
-
if (crtc_state->hw.active) {
/*
* The initial mode needs to be set in order to keep
@@ -10556,39 +10531,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
intel_bw_crtc_update(bw_state, crtc_state);
intel_pipe_config_sanity_check(dev_priv, crtc_state);
-
- /* discard our incomplete slave state, copy it from master */
- if (crtc_state->bigjoiner && crtc_state->hw.active) {
- struct intel_crtc *slave = crtc_state->bigjoiner_linked_crtc;
- struct intel_crtc_state *slave_crtc_state =
- to_intel_crtc_state(slave->base.state);
-
- copy_bigjoiner_crtc_state(slave_crtc_state, crtc_state);
- slave->base.mode = crtc->base.mode;
-
- cdclk_state->min_cdclk[slave->pipe] = min_cdclk;
- cdclk_state->min_voltage_level[slave->pipe] =
- crtc_state->min_voltage_level;
-
- for_each_intel_plane_on_crtc(&dev_priv->drm, slave, plane) {
- const struct intel_plane_state *plane_state =
- to_intel_plane_state(plane->base.state);
-
- /*
- * FIXME don't have the fb yet, so can't
- * use intel_plane_data_rate() :(
- */
- if (plane_state->uapi.visible)
- crtc_state->data_rate[plane->id] =
- 4 * crtc_state->pixel_rate;
- else
- crtc_state->data_rate[plane->id] = 0;
- }
-
- intel_bw_crtc_update(bw_state, slave_crtc_state);
- drm_calc_timestamping_constants(&slave->base,
- &slave_crtc_state->hw.adjusted_mode);
- }
}
}
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [Intel-gfx] [PATCH v2 9/9] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (7 preceding siblings ...)
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Reduce bigjoiner special casing Ville Syrjala
@ 2021-10-22 10:33 ` Ville Syrjala
2021-10-22 17:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout (rev2) Patchwork
` (2 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2021-10-22 10:33 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Now that the bigjoiner state readout/computation has been
made to do the right thing nuke the related state checker
quirk.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 105 ++++++++----------
.../drm/i915/display/intel_display_types.h | 1 -
2 files changed, 47 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f21030ffa83d..79cd158503b3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6498,51 +6498,48 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_X(output_types);
- /* FIXME do the readout properly and get rid of this quirk */
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
- PIPE_CONF_CHECK_I(pixel_multiplier);
+ PIPE_CONF_CHECK_I(pixel_multiplier);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_INTERLACE);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_INTERLACE);
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_PHSYNC);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_NHSYNC);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_PVSYNC);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_NVSYNC);
- }
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_PHSYNC);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_NHSYNC);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_PVSYNC);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_NVSYNC);
}
PIPE_CONF_CHECK_I(output_format);
@@ -6554,9 +6551,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
PIPE_CONF_CHECK_BOOL(has_infoframe);
- /* FIXME do the readout properly and get rid of this quirk */
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
- PIPE_CONF_CHECK_BOOL(fec_enable);
+ PIPE_CONF_CHECK_BOOL(fec_enable);
PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
@@ -6585,9 +6580,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
}
PIPE_CONF_CHECK_I(scaler_state.scaler_id);
- /* FIXME do the readout properly and get rid of this quirk */
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
- PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
PIPE_CONF_CHECK_X(gamma_mode);
if (IS_CHERRYVIEW(dev_priv))
@@ -6614,11 +6607,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(double_wide);
- if (dev_priv->dpll.mgr)
+ if (dev_priv->dpll.mgr) {
PIPE_CONF_CHECK_P(shared_dpll);
- /* FIXME do the readout properly and get rid of this quirk */
- if (dev_priv->dpll.mgr && !PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
@@ -6652,19 +6643,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
}
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
- PIPE_CONF_CHECK_X(dsi_pll.ctrl);
- PIPE_CONF_CHECK_X(dsi_pll.div);
+ PIPE_CONF_CHECK_X(dsi_pll.ctrl);
+ PIPE_CONF_CHECK_X(dsi_pll.div);
- if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
- PIPE_CONF_CHECK_I(pipe_bpp);
+ if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
+ PIPE_CONF_CHECK_I(pipe_bpp);
- PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
- PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
- PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
- PIPE_CONF_CHECK_I(min_voltage_level);
- }
+ PIPE_CONF_CHECK_I(min_voltage_level);
if (current_config->has_psr || pipe_config->has_psr)
PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 3568d33be096..991972da0703 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -945,7 +945,6 @@ struct intel_crtc_state {
* accordingly.
*/
#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
-#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE (1<<1) /* bigjoiner slave, partial readout */
unsigned long quirks;
unsigned fb_bits; /* framebuffers to flip */
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout (rev2)
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (8 preceding siblings ...)
2021-10-22 10:33 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE Ville Syrjala
@ 2021-10-22 17:13 ` Patchwork
2021-10-22 17:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-22 23:59 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-10-22 17:13 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix bigjoiner state readout (rev2)
URL : https://patchwork.freedesktop.org/series/94609/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9b834bd6bbea drm/i915/psr: Disable PSR before modesets turn off all planes
4a710bf77f9e Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
c17b15ad96c9 drm/i915: Disable all planes before modesetting any pipes
0528d44fc4ec drm/i915: Introduce intel_master_crtc()
2852fb0b99d4 drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()
41811b325b36 drm/i915: Split PPS write from DSC enable
0fb2e7d625be drm/i915: Perform correct cpu_transcoder readout for bigjoiner
-:53: CHECK:SPACING: No space is necessary after a cast
#53: FILE: drivers/gpu/drm/i915/display/intel_display.c:4105:
+ power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);
-:102: CHECK:SPACING: No space is necessary after a cast
#102: FILE: drivers/gpu/drm/i915/display/intel_display.c:4208:
+ cpu_transcoder = (enum transcoder) crtc->pipe - 1;
total: 0 errors, 0 warnings, 2 checks, 88 lines checked
70dc7e08d720 drm/i915: Reduce bigjoiner special casing
15721df82bec drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE
^ permalink raw reply [flat|nested] 18+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix bigjoiner state readout (rev2)
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (9 preceding siblings ...)
2021-10-22 17:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout (rev2) Patchwork
@ 2021-10-22 17:42 ` Patchwork
2021-10-22 23:59 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-10-22 17:42 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4082 bytes --]
== Series Details ==
Series: drm/i915: Fix bigjoiner state readout (rev2)
URL : https://patchwork.freedesktop.org/series/94609/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10780 -> Patchwork_21421
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/index.html
Participating hosts (37 -> 35)
------------------------------
Additional (1): fi-skl-6600u
Missing (3): fi-ctg-p8600 fi-bsw-cyan fi-hsw-4200u
Known issues
------------
Here are the changes found in Patchwork_21421 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
- fi-skl-6600u: NOTRUN -> [SKIP][1] ([fdo#109271]) +23 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/fi-skl-6600u/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html
* igt@gem_huc_copy@huc-copy:
- fi-skl-6600u: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
* igt@kms_chamelium@vga-edid-read:
- fi-skl-6600u: NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827]) +8 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6600u: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#533])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/fi-skl-6600u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@kms_frontbuffer_tracking@basic:
- {fi-hsw-gt1}: [DMESG-WARN][5] -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/fi-hsw-gt1/igt@kms_frontbuffer_tracking@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/fi-hsw-gt1/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- {fi-tgl-dsi}: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/fi-tgl-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/fi-tgl-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_10780 -> Patchwork_21421
CI-20190529: 20190529
CI_DRM_10780: 2865f9182b99699fabab014ba66d2196e5c6e999 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6259: 89629f64da9f12b144f913865b08d2c9efcd10d7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21421: 15721df82becd7977dc97e0ef195af28a60ba7dd @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
15721df82bec drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE
70dc7e08d720 drm/i915: Reduce bigjoiner special casing
0fb2e7d625be drm/i915: Perform correct cpu_transcoder readout for bigjoiner
41811b325b36 drm/i915: Split PPS write from DSC enable
2852fb0b99d4 drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()
0528d44fc4ec drm/i915: Introduce intel_master_crtc()
c17b15ad96c9 drm/i915: Disable all planes before modesetting any pipes
4a710bf77f9e Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
9b834bd6bbea drm/i915/psr: Disable PSR before modesets turn off all planes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/index.html
[-- Attachment #2: Type: text/html, Size: 5089 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix bigjoiner state readout (rev2)
2021-10-22 10:32 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bigjoiner state readout Ville Syrjala
` (10 preceding siblings ...)
2021-10-22 17:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-10-22 23:59 ` Patchwork
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-10-22 23:59 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30267 bytes --]
== Series Details ==
Series: drm/i915: Fix bigjoiner state readout (rev2)
URL : https://patchwork.freedesktop.org/series/94609/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10780_full -> Patchwork_21421_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21421_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21421_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21421_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@flip-vs-suspend@a-vga1:
- shard-snb: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-snb6/igt@kms_flip@flip-vs-suspend@a-vga1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-snb5/igt@kms_flip@flip-vs-suspend@a-vga1.html
Known issues
------------
Here are the changes found in Patchwork_21421_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][3] ([i915#3002])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl5/igt@gem_create@create-massive.html
* igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-apl: [PASS][4] -> [DMESG-WARN][5] ([i915#180])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-apl3/igt@gem_ctx_isolation@preservation-s3@vcs0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl8/igt@gem_ctx_isolation@preservation-s3@vcs0.html
* igt@gem_ctx_persistence@file:
- shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-snb5/igt@gem_ctx_persistence@file.html
* igt@gem_ctx_persistence@heartbeat-stop:
- shard-apl: [PASS][7] -> [DMESG-WARN][8] ([i915#62])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-apl1/igt@gem_ctx_persistence@heartbeat-stop.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl1/igt@gem_ctx_persistence@heartbeat-stop.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2842])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-tglb3/igt@gem_exec_fair@basic-pace@vecs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk9/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_huc_copy@huc-copy:
- shard-kbl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#2190])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl4/igt@gem_huc_copy@huc-copy.html
- shard-skl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#2190])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_gtt@coherency:
- shard-tglb: NOTRUN -> [SKIP][17] ([fdo#111656])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@gem_mmap_gtt@coherency.html
* igt@gem_pxp@fail-invalid-protected-context:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#4270])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@gem_pxp@fail-invalid-protected-context.html
* igt@gem_userptr_blits@coherency-sync:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#110542])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-kbl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#3323])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl1/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@readonly-unsync:
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#3297])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@gem_userptr_blits@readonly-unsync.html
* igt@gen7_exec_parse@cmd-crossing-page:
- shard-tglb: NOTRUN -> [SKIP][22] ([fdo#109289]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@gen7_exec_parse@cmd-crossing-page.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-glk: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#658])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk8/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][24] -> [FAIL][25] ([i915#454])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-iclb5/igt@i915_pm_dc@dc6-psr.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
* igt@i915_selftest@live@gem_contexts:
- shard-skl: NOTRUN -> [INCOMPLETE][26] ([i915#198])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl6/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@gt_lrc:
- shard-tglb: NOTRUN -> [DMESG-FAIL][27] ([i915#2373])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@gt_pm:
- shard-tglb: NOTRUN -> [DMESG-FAIL][28] ([i915#1759])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@i915_selftest@live@gt_pm.html
- shard-skl: NOTRUN -> [DMESG-FAIL][29] ([i915#1886] / [i915#2291])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl6/igt@i915_selftest@live@gt_pm.html
* igt@kms_async_flips@crc:
- shard-skl: NOTRUN -> [FAIL][30] ([i915#4272])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl7/igt@kms_async_flips@crc.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271]) +80 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl3/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][32] ([fdo#111614])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-kbl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3777])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][35] ([fdo#111615])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-skl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][37] ([i915#3743]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk8/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +11 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl7/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][40] ([i915#3689] / [i915#3886]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
- shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109278] / [i915#3886])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-iclb3/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +8 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl4/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +4 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl7/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-ccs-on-another-bo-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][44] ([i915#3689]) +2 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_ccs@pipe-d-ccs-on-another-bo-y_tiled_ccs.html
* igt@kms_chamelium@vga-hpd:
- shard-skl: NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +12 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@kms_chamelium@vga-hpd.html
* igt@kms_chamelium@vga-hpd-for-each-pipe:
- shard-kbl: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +9 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html
* igt@kms_color@pipe-b-ctm-0-75:
- shard-skl: [PASS][47] -> [DMESG-WARN][48] ([i915#1982])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-skl10/igt@kms_color@pipe-b-ctm-0-75.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl8/igt@kms_color@pipe-b-ctm-0-75.html
* igt@kms_color_chamelium@pipe-b-ctm-max:
- shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109284] / [fdo#111827]) +5 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_color_chamelium@pipe-b-ctm-max.html
- shard-snb: NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-snb5/igt@kms_color_chamelium@pipe-b-ctm-max.html
* igt@kms_color_chamelium@pipe-d-ctm-limited-range:
- shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +9 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl3/igt@kms_color_chamelium@pipe-d-ctm-limited-range.html
* igt@kms_content_protection@srm:
- shard-kbl: NOTRUN -> [TIMEOUT][52] ([i915#1319])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl3/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-tglb: NOTRUN -> [SKIP][53] ([fdo#111828])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-tglb: [PASS][54] -> [INCOMPLETE][55] ([i915#2411] / [i915#2828] / [i915#456])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-tglb2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-32x10-sliding:
- shard-tglb: NOTRUN -> [SKIP][56] ([i915#3359]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_cursor_crc@pipe-b-cursor-32x10-sliding.html
* igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen:
- shard-skl: NOTRUN -> [SKIP][57] ([fdo#109271]) +145 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-32x32-sliding:
- shard-tglb: NOTRUN -> [SKIP][58] ([i915#3319]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@kms_cursor_crc@pipe-b-cursor-32x32-sliding.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-offscreen:
- shard-tglb: NOTRUN -> [SKIP][59] ([fdo#109279] / [i915#3359])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +2 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-kbl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#533]) +2 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl6/igt@kms_cursor_legacy@pipe-d-single-bo.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-tglb: [PASS][63] -> [INCOMPLETE][64] ([i915#2411] / [i915#456])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-tglb2/igt@kms_fbcon_fbt@fbc-suspend.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: NOTRUN -> [DMESG-WARN][65] ([i915#180]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
- shard-skl: NOTRUN -> [INCOMPLETE][66] ([i915#3699])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
- shard-skl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#2672])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render:
- shard-apl: [PASS][68] -> [DMESG-WARN][69] ([i915#165] / [i915#180] / [i915#1982] / [i915#62])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-apl1/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl1/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt:
- shard-snb: NOTRUN -> [SKIP][70] ([fdo#109271]) +26 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-snb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][71] ([fdo#111825]) +9 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
- shard-kbl: NOTRUN -> [SKIP][72] ([fdo#109271]) +109 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl3/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: NOTRUN -> [FAIL][73] ([i915#1188])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#533]) +1 similar issue
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][75] ([i915#265])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-kbl: NOTRUN -> [FAIL][76] ([i915#265])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl6/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265]) +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-kbl: NOTRUN -> [FAIL][78] ([fdo#108145] / [i915#265]) +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][79] ([fdo#112054])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@kms_plane_multiple@atomic-pipe-a-tiling-yf.html
* igt@kms_prime@basic-crc@first-to-second:
- shard-tglb: NOTRUN -> [SKIP][80] ([i915#1836])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb2/igt@kms_prime@basic-crc@first-to-second.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-kbl: NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
- shard-tglb: NOTRUN -> [SKIP][82] ([i915#2920])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
- shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#658]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
- shard-skl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#658]) +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][85] -> [SKIP][86] ([fdo#109441]) +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-iclb5/igt@kms_psr@psr2_cursor_render.html
* igt@kms_psr@sprite_blt:
- shard-glk: NOTRUN -> [SKIP][87] ([fdo#109271]) +6 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk8/igt@kms_psr@sprite_blt.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][88] -> [FAIL][89] ([i915#31])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-apl3/igt@kms_setmode@basic.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl1/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
- shard-tglb: [PASS][90] -> [INCOMPLETE][91] ([i915#456])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-tglb2/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb7/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [PASS][92] -> [DMESG-WARN][93] ([i915#180] / [i915#295])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-skl: [PASS][94] -> [INCOMPLETE][95] ([i915#198] / [i915#2828])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl6/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
* igt@kms_vblank@pipe-c-wait-busy-hang:
- shard-apl: [PASS][96] -> [DMESG-WARN][97] ([i915#165] / [i915#180] / [i915#62]) +6 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-apl1/igt@kms_vblank@pipe-c-wait-busy-hang.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl1/igt@kms_vblank@pipe-c-wait-busy-hang.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-skl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2437]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl1/igt@kms_writeback@writeback-pixel-formats.html
- shard-apl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2437])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl3/igt@kms_writeback@writeback-pixel-formats.html
* igt@nouveau_crc@pipe-a-source-outp-complete:
- shard-tglb: NOTRUN -> [SKIP][100] ([i915#2530])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@nouveau_crc@pipe-a-source-outp-complete.html
* igt@perf@polling-parameterized:
- shard-skl: [PASS][101] -> [FAIL][102] ([i915#1542])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-skl9/igt@perf@polling-parameterized.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl3/igt@perf@polling-parameterized.html
* igt@perf@short-reads:
- shard-skl: NOTRUN -> [FAIL][103] ([i915#51])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl7/igt@perf@short-reads.html
* igt@prime_nv_pcopy@test1_micro:
- shard-tglb: NOTRUN -> [SKIP][104] ([fdo#109291]) +1 similar issue
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@prime_nv_pcopy@test1_micro.html
* igt@sysfs_clients@recycle-many:
- shard-apl: NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#2994])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-apl7/igt@sysfs_clients@recycle-many.html
- shard-tglb: NOTRUN -> [SKIP][106] ([i915#2994])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@sysfs_clients@recycle-many.html
* igt@sysfs_clients@split-25:
- shard-skl: NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#2994]) +1 similar issue
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@sysfs_clients@split-25.html
* igt@sysfs_clients@split-50:
- shard-kbl: NOTRUN -> [SKIP][108] ([fdo#109271] / [i915#2994]) +2 similar issues
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl6/igt@sysfs_clients@split-50.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][109] ([i915#658]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-iclb3/igt@feature_discovery@psr2.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-glk: [FAIL][111] ([i915#2842]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-glk6/igt@gem_exec_fair@basic-none-solo@rcs0.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk5/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl: [FAIL][113] ([i915#2842]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs0.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs0.html
- shard-tglb: [FAIL][115] ([i915#2842]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs0.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [SKIP][117] ([fdo#109271]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-kbl2/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_whisper@basic-queues-forked-all:
- shard-glk: [DMESG-WARN][119] ([i915#118]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-glk5/igt@gem_exec_whisper@basic-queues-forked-all.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk9/igt@gem_exec_whisper@basic-queues-forked-all.html
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- shard-snb: [INCOMPLETE][121] -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-snb4/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-snb5/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
* igt@gen9_exec_parse@allowed-all:
- shard-skl: [DMESG-WARN][123] ([i915#1436] / [i915#716]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-skl5/igt@gen9_exec_parse@allowed-all.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl9/igt@gen9_exec_parse@allowed-all.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-tglb: [INCOMPLETE][125] ([i915#456]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-tglb7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2:
- shard-glk: [FAIL][127] ([i915#79]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-glk7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
- shard-iclb: [SKIP][129] ([i915#3701]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-iclb5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-skl: [DMESG-WARN][131] ([i915#1982]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [FAIL][133] ([i915#1188]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10780/shard-skl5/igt@kms_hdr@bpc-switch.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/shard-skl4/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [DMESG-WARN][135] ([i915#180]) -> [PASS][136] +3 similar issues
[1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21421/index.html
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