Re: [CI 0/5] Refactor to expand subslice mask

[Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>]

On 5/30/19 1:29 AM, Saarinen, Jani wrote:
> Hi,
> 
> 
>> -----Original Message-----
>> From: Summers, Stuart
>> Sent: keskiviikko 29. toukokuuta 2019 19.02
>> To: Saarinen, Jani <jani.saarinen@intel.com>; Ceraolo Spurio, Daniele
>> <daniele.ceraolospurio@intel.com>; Navare, Manasi D
>> <manasi.d.navare@intel.com>
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [CI 0/5] Refactor to expand subslice mask
>>
>> On Wed, 2019-05-29 at 07:21 -0700, Daniele Ceraolo Spurio wrote:
>>>
>>> On 5/28/19 11:48 PM, Saarinen, Jani wrote:
>>>> Hi,
>>>>
>>>>> -----Original Message-----
>>>>> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org]
>>>>> On Behalf Of
>>>>> Summers, Stuart
>>>>> Sent: tiistai 28. toukokuuta 2019 21.33
>>>>> To: Navare, Manasi D <manasi.d.navare@intel.com>
>>>>> Cc: intel-gfx@lists.freedesktop.org
>>>>> Subject: Re: [Intel-gfx] [CI 0/5] Refactor to expand subslice
>>>>> mask
>>>>>
>>>>> On Tue, 2019-05-28 at 11:32 -0700, Manasi Navare wrote:
>>>>>> Pushed to dinq, thanks for the patches and the reviews!
>>>>>
>>>>> Thanks for the push Manasi and the reviews Daniele and others!
>>>>
>>>> This broke all the ICL systems because CI data was not looked that
>>>> they did not actually even boot at all.
>>>> All ICL's in BAT and whole ICL shards.
>>>>
>>>
>>> Can we change the CI reply for the case where there are extra
>>> missing
>>> machines compared to the reference run from SUCCESS to WARNING or
>>> something like that, so people have a clearer indication that
>>> something
>>> might have gone wrong?
>>
>> I agree here. I'm sure with time and experience these types of things
>> will get easier to parse, but this was very unobvious to me when
>> posting. I have no problem reworking, but would really appreciate a
>> solution to this from the CI side to ensure we don't hit this type of
>> thing in the future.
> Sure, CI team already discussed on this.
> But going forward. Can you fix this still today that ICL's systems are green not orange on ci-grid.
> So would be good to get to the state that was on CI_DRM_6158.
> Reference eg. : https://intel-gfx-ci.01.org/tree/drm-tip/fi-icl-u2.html so clearly after module reload we fail.
> <3> [415.887946] [drm:_wa_add [i915]] *ERROR* Discarding overwritten w/a for reg 7034 (mask: ffffffff, value: 80000280)
> 
> Br,
> Jani

This doesn't seem to have anything to do with this series though. Looks 
like we duplicated the WA when merging 'drm/drm-next' into drm-tip:

static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
				     struct i915_wa_list *wal)
{
	struct drm_i915_private *i915 = engine->i915;

	/* WaDisableBankHangMode:icl */
	wa_write(wal,
		 GEN8_L3CNTLREG,
		 intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
		 GEN8_ERRDETBCTRL);

	/* WaDisableBankHangMode:icl */
	wa_write(wal,
		 GEN8_L3CNTLREG,
		 intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
		 GEN8_ERRDETBCTRL);


AFAICS the duplication is added by:

commit 7126b65091c417e757b638065ae4fdc2a5dc2f5c
Merge: 3aea8d02f801 14ee642c2ab0
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Thu May 30 12:06:55 2019 +0100

     Merge remote-tracking branch 'drm/drm-next' into drm-tip

Daniele

>>
>> Thanks,
>> Stuart
>>
>>>
>>> Daniele
>>>
>>>>
>>>>>
>>>>> -Stuart
>>>>>
>>>>>>
>>>>>> Regards
>>>>>> Manasi
>>>>>>
>>>>>> On Fri, May 24, 2019 at 08:40:17AM -0700, Stuart Summers wrote:
>>>>>>> This patch series contains a few code clean-up patches,
>>>>>>> followed by
>>>>>>> a patch which changes the storage of the subslice mask to
>>>>>>> better
>>>>>>> match the userspace access through the
>>>>>>> I915_QUERY_TOPOLOGY_INFO
>>>>>>> ioctl. The index into the subslice_mask array is then
>>>>>>> calculated:
>>>>>>>     slice * subslice stride + subslice index / 8
>>>>>>>
>>>>>>> v2: fix i915_pm_sseu test failure
>>>>>>> v3: no changes to patches in the series, just resending to
>>>>>>> pick up
>>>>>>>       in CI correctly
>>>>>>> v4: rebase
>>>>>>> v5: fix header test
>>>>>>> v6: address review comments from Jari
>>>>>>>       address minor checkpatch warning in existing code
>>>>>>>       use eu_stride for EU div-by-8
>>>>>>> v7: another rebase
>>>>>>> v8: address review comments from Tvrtko and Daniele
>>>>>>> v9: address review comments from Daniele
>>>>>>> v10: add reviewed-by on last patch with minor suggested
>>>>>>> change,
>>>>>>>        rebase, and repost for CI
>>>>>>>
>>>>>>> Stuart Summers (5):
>>>>>>>     drm/i915: Use local variable for SSEU info in GETPARAM
>>>>>>> ioctl
>>>>>>>     drm/i915: Add macro for SSEU stride calculation
>>>>>>>     drm/i915: Move calculation of subslices per slice to new
>>>>>>> function
>>>>>>>     drm/i915: Refactor sseu helper functions
>>>>>>>     drm/i915: Expand subslice mask
>>>>>>>
>>>>>>>    drivers/gpu/drm/i915/gt/intel_engine_cs.c    |  24 ++-
>>>>>>>    drivers/gpu/drm/i915/gt/intel_engine_types.h |  30 ++--
>>>>>>>    drivers/gpu/drm/i915/gt/intel_hangcheck.c    |   3 +-
>>>>>>>    drivers/gpu/drm/i915/gt/intel_sseu.c         |  62 +++++++
>>>>>>>    drivers/gpu/drm/i915/gt/intel_sseu.h         |  35 +++-
>>>>>>>    drivers/gpu/drm/i915/gt/intel_workarounds.c  |   2 +-
>>>>>>>    drivers/gpu/drm/i915/i915_debugfs.c          |  46 ++---
>>>>>>>    drivers/gpu/drm/i915/i915_drv.c              |  15 +-
>>>>>>>    drivers/gpu/drm/i915/i915_gpu_error.c        |   5 +-
>>>>>>>    drivers/gpu/drm/i915/i915_query.c            |  15 +-
>>>>>>>    drivers/gpu/drm/i915/intel_device_info.c     | 176
>>>>>>> +++++++++++--
>>>>>>> ------
>>>>>>>    drivers/gpu/drm/i915/intel_device_info.h     |  47 -----
>>>>>>>    12 files changed, 280 insertions(+), 180 deletions(-)
>>>>>>>
>>>>>>> --
>>>>>>> 2.21.0.5.gaeb582a983
>>>>>>>
>>>>>>> _______________________________________________
>>>>>>> Intel-gfx mailing list
>>>>>>> Intel-gfx@lists.freedesktop.org
>>>>>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>>>
>>>> _______________________________________________
>>>> Intel-gfx mailing list
>>>> Intel-gfx@lists.freedesktop.org
>>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>>>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx