[PATCH 0/3] Make casf updates atomic and dsb ready

[PATCH 0/3] Make casf updates atomic and dsb ready

[Nemesa Garg]

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The existing implementation for casf scaler re‑implemented
parts of skl_scaler logic and programmed registers from
pre‑plane update hooks, which caused:
  - updates were not atomic.
  - prevented execution via Display State Buffer.
  - computed state was late.

This series fixes these issues by:
  - consolidating common logic into skl_scaler.c.
  - moving computation into crtc_compute_config().
  - Create a common wrapper for pfit and casf so
    that whenever pipe scaler is done through dsb
    casf can also be dsb compatible.

Nemesa Garg (3):
  drm/i915/display: Move casf_compute_config
  drm/i915/display: Introduce skl_pipe_scaler_setup()
  drm/i915/display: Common wrapper for casf and pfit

 drivers/gpu/drm/i915/display/intel_display.c | 36 +++-----
 drivers/gpu/drm/i915/display/skl_scaler.c    | 96 +++++++++++++-------
 drivers/gpu/drm/i915/display/skl_scaler.h    |  5 +
 3 files changed, 81 insertions(+), 56 deletions(-)

-- 
2.25.1

[PATCH 1/3] drm/i915/display: Move casf_compute_config

[Nemesa Garg]

Prefill calculations are getting screwed up as casf_compute
is getting called in later stage. So move casf_compute_config
to crtc_compute_config and check if there is a change in the
sharpness strength, if so set the flag uapi.mode_changed
so that everytime when strength changes casf_compute_config
can be called and new strength value gets updated.

v2: Remove extra casf_check [Ville]

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9c6d3ecdb589..568730ffe359 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2494,6 +2494,10 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
 
 	intel_vrr_compute_guardband(crtc_state);
 
+	ret = intel_casf_compute_config(crtc_state);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
@@ -4286,10 +4290,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
 		return ret;
 	}
 
-	ret = intel_casf_compute_config(crtc_state);
-	if (ret)
-		return ret;
-
 	if (DISPLAY_VER(display) >= 9) {
 		if (intel_crtc_needs_modeset(crtc_state) ||
 		    intel_crtc_needs_fastset(crtc_state) ||
@@ -6431,6 +6431,10 @@ int intel_atomic_check(struct drm_device *dev,
 		if (new_crtc_state->uapi.scaling_filter !=
 		    old_crtc_state->uapi.scaling_filter)
 			new_crtc_state->uapi.mode_changed = true;
+
+		if (new_crtc_state->uapi.sharpness_strength !=
+                    old_crtc_state->uapi.sharpness_strength)
+                        new_crtc_state->uapi.mode_changed = true;
 	}
 
 	intel_vrr_check_modeset(state);
-- 
2.25.1

Re: [PATCH 1/3] drm/i915/display: Move casf_compute_config

[Nautiyal, Ankit K]

On 12/23/2025 1:42 PM, Nemesa Garg wrote:
> Prefill calculations are getting screwed up as casf_compute
> is getting called in later stage. So move casf_compute_config
> to crtc_compute_config and check if there is a change in the
> sharpness strength, if so set the flag uapi.mode_changed
> so that everytime when strength changes casf_compute_config
> can be called and new strength value gets updated.

Nit: Please wrap the commit message to ~75 characters as per kernel 
guidelines.

Patch looks good to me.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


>
> v2: Remove extra casf_check [Ville]
>
> Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++----
>   1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 9c6d3ecdb589..568730ffe359 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2494,6 +2494,10 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
>   
>   	intel_vrr_compute_guardband(crtc_state);
>   
> +	ret = intel_casf_compute_config(crtc_state);
> +	if (ret)
> +		return ret;
> +
>   	return 0;
>   }
>   
> @@ -4286,10 +4290,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>   		return ret;
>   	}
>   
> -	ret = intel_casf_compute_config(crtc_state);
> -	if (ret)
> -		return ret;
> -
>   	if (DISPLAY_VER(display) >= 9) {
>   		if (intel_crtc_needs_modeset(crtc_state) ||
>   		    intel_crtc_needs_fastset(crtc_state) ||
> @@ -6431,6 +6431,10 @@ int intel_atomic_check(struct drm_device *dev,
>   		if (new_crtc_state->uapi.scaling_filter !=
>   		    old_crtc_state->uapi.scaling_filter)
>   			new_crtc_state->uapi.mode_changed = true;
> +
> +		if (new_crtc_state->uapi.sharpness_strength !=
> +                    old_crtc_state->uapi.sharpness_strength)
> +                        new_crtc_state->uapi.mode_changed = true;
>   	}
>   
>   	intel_vrr_check_modeset(state);

[PATCH 2/3] drm/i915/display: Introduce skl_pipe_scaler_setup()

[Nemesa Garg]

As skl_pfit_enable and skl_scaler_setup_casf
have similar logic for pipe scaler registers
so to avoid duplicacy introduce new helper
skl_pipe_scaler_setup. This helper consolidates
common scaler setup steps and is now called
from both skl_pfit_enable() and skl_scaler_setup_casf().

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 67 ++++++++++++-----------
 drivers/gpu/drm/i915/display/skl_scaler.h |  2 +
 2 files changed, 36 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 4c4deac7f9c8..abd951f7dd71 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -761,41 +761,25 @@ static void skl_scaler_setup_filter(struct intel_display *display,
 
 void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct intel_display *display = to_intel_display(crtc);
+	struct intel_display *display = to_intel_display(crtc_state);
+        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	const struct intel_crtc_scaler_state *scaler_state =
+                &crtc_state->scaler_state;
 	struct drm_display_mode *adjusted_mode =
-	&crtc_state->hw.adjusted_mode;
-	struct intel_crtc_scaler_state *scaler_state =
-		&crtc_state->scaler_state;
-	struct drm_rect src, dest;
-	int id, width, height;
-	int x = 0, y = 0;
+		&crtc_state->hw.adjusted_mode;
 	enum pipe pipe = crtc->pipe;
-	u32 ps_ctrl;
+	int width, height, x = 0, y = 0;
+	int id;
 
 	width = adjusted_mode->crtc_hdisplay;
 	height = adjusted_mode->crtc_vdisplay;
 
-	drm_rect_init(&dest, x, y, width, height);
-
-	width = drm_rect_width(&dest);
-	height = drm_rect_height(&dest);
 	id = scaler_state->scaler_id;
 
-	drm_rect_init(&src, 0, 0,
-		      drm_rect_width(&crtc_state->pipe_src) << 16,
-		      drm_rect_height(&crtc_state->pipe_src) << 16);
+	skl_pipe_scaler_setup(crtc_state, width, height, x, y);
 
-	trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
-
-	ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
-		  CASF_SCALER_FILTER_SELECT;
-
-	intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
-	intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
-			  PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
 	intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
-			  PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
+                          PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
 }
 
 void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
@@ -814,7 +798,6 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 	int hscale, vscale;
 	struct drm_rect src;
 	int id;
-	u32 ps_ctrl;
 
 	if (!crtc_state->pch_pfit.enabled)
 		return;
@@ -836,10 +819,34 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 	uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
 	uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
 
+	skl_pipe_scaler_setup(crtc_state, width, height, x, y);
+
+	id = scaler_state->scaler_id;
+
+	intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),
+			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
+	intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),
+			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
+	intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
+			  PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
+}
+
+void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
+			   int width, int height, int x, int y)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	const struct intel_crtc_scaler_state *scaler_state =
+		&crtc_state->scaler_state;
+	enum pipe pipe = crtc->pipe;
+	int id;
+	u32 ps_ctrl;
+
 	id = scaler_state->scaler_id;
 
 	ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
-		skl_scaler_get_filter_select(crtc_state->hw.scaling_filter);
+		  skl_scaler_get_filter_select(crtc_state->hw.scaling_filter) |
+		  CASF_SCALER_FILTER_SELECT;
 
 	trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
 
@@ -848,14 +855,8 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 
 	intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
 
-	intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),
-			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
-	intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),
-			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
 	intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
 			  PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
-	intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
-			  PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
 }
 
 void
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 7e8d819c019d..94bde5d1c06a 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -30,6 +30,8 @@ void skl_program_plane_scaler(struct intel_dsb *dsb,
 			      struct intel_plane *plane,
 			      const struct intel_crtc_state *crtc_state,
 			      const struct intel_plane_state *plane_state);
+void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
+			   int width, int height, int x, int y);
 void skl_detach_scalers(struct intel_dsb *dsb,
 			const struct intel_crtc_state *crtc_state);
 void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
-- 
2.25.1

Re: [PATCH 2/3] drm/i915/display: Introduce skl_pipe_scaler_setup()

[Nautiyal, Ankit K]

On 12/23/2025 1:42 PM, Nemesa Garg wrote:
> As skl_pfit_enable and skl_scaler_setup_casf
> have similar logic for pipe scaler registers
> so to avoid duplicacy introduce new helper

Perhaps 'duplication' will be apt.


> skl_pipe_scaler_setup. This helper consolidates
> common scaler setup steps and is now called
> from both skl_pfit_enable() and skl_scaler_setup_casf().

As suggested in previous patch, lets use ~75 character limit.


>
> Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
> ---
>   drivers/gpu/drm/i915/display/skl_scaler.c | 67 ++++++++++++-----------
>   drivers/gpu/drm/i915/display/skl_scaler.h |  2 +
>   2 files changed, 36 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 4c4deac7f9c8..abd951f7dd71 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -761,41 +761,25 @@ static void skl_scaler_setup_filter(struct intel_display *display,
>   
>   void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
>   {
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct intel_display *display = to_intel_display(crtc);
> +	struct intel_display *display = to_intel_display(crtc_state);

I think we can retain the order in the new function as the previous one, 
there is no change required here.


> +        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

Extra space before the line. In fact, I can see a lot of styling issues 
caught by the checkpatch. Please fix those.


> +	const struct intel_crtc_scaler_state *scaler_state =
> +                &crtc_state->scaler_state;
>   	struct drm_display_mode *adjusted_mode =
> -	&crtc_state->hw.adjusted_mode;
> -	struct intel_crtc_scaler_state *scaler_state =
> -		&crtc_state->scaler_state;
> -	struct drm_rect src, dest;
> -	int id, width, height;
> -	int x = 0, y = 0;
> +		&crtc_state->hw.adjusted_mode;
>   	enum pipe pipe = crtc->pipe;
> -	u32 ps_ctrl;
> +	int width, height, x = 0, y = 0;
> +	int id;
>   
>   	width = adjusted_mode->crtc_hdisplay;
>   	height = adjusted_mode->crtc_vdisplay;
>   
> -	drm_rect_init(&dest, x, y, width, height);
> -
> -	width = drm_rect_width(&dest);
> -	height = drm_rect_height(&dest);
>   	id = scaler_state->scaler_id;
>   
> -	drm_rect_init(&src, 0, 0,
> -		      drm_rect_width(&crtc_state->pipe_src) << 16,
> -		      drm_rect_height(&crtc_state->pipe_src) << 16);
> +	skl_pipe_scaler_setup(crtc_state, width, height, x, y);
>   
> -	trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
> -
> -	ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
> -		  CASF_SCALER_FILTER_SELECT;
> -
> -	intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
> -	intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
> -			  PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
>   	intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
> -			  PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
> +                          PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
>   }
>   
>   void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> @@ -814,7 +798,6 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
>   	int hscale, vscale;
>   	struct drm_rect src;
>   	int id;
> -	u32 ps_ctrl;
>   
>   	if (!crtc_state->pch_pfit.enabled)
>   		return;
> @@ -836,10 +819,34 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
>   	uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
>   	uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
>   
> +	skl_pipe_scaler_setup(crtc_state, width, height, x, y);
> +
> +	id = scaler_state->scaler_id;
> +
> +	intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),
> +			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
> +	intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),
> +			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
> +	intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
> +			  PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
> +}
> +
> +void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
> +			   int width, int height, int x, int y)


Why is this exposed? I don't see this getting used outside of this file 
in this patch or the next patch.

This should be a static function. You should move this function just 
before the first caller.

> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	const struct intel_crtc_scaler_state *scaler_state =
> +		&crtc_state->scaler_state;
> +	enum pipe pipe = crtc->pipe;
> +	int id;
> +	u32 ps_ctrl;
> +
>   	id = scaler_state->scaler_id;
>   
>   	ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
> -		skl_scaler_get_filter_select(crtc_state->hw.scaling_filter);
> +		  skl_scaler_get_filter_select(crtc_state->hw.scaling_filter) |
> +		  CASF_SCALER_FILTER_SELECT;


This seems incorrect. With this we are setting CASF SCALER FILTER SELECT 
for pfit case also, which we do not want.

We need to set this, only when the call is from skl_scaler_setup_casf.


Regards,

Ankit

>   
>   	trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
>   
> @@ -848,14 +855,8 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
>   
>   	intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
>   
> -	intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),
> -			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
> -	intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),
> -			  PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
>   	intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
>   			  PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
> -	intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
> -			  PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
>   }
>   
>   void
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
> index 7e8d819c019d..94bde5d1c06a 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -30,6 +30,8 @@ void skl_program_plane_scaler(struct intel_dsb *dsb,
>   			      struct intel_plane *plane,
>   			      const struct intel_crtc_state *crtc_state,
>   			      const struct intel_plane_state *plane_state);
> +void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
> +			   int width, int height, int x, int y);
>   void skl_detach_scalers(struct intel_dsb *dsb,
>   			const struct intel_crtc_state *crtc_state);
>   void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);

[PATCH 3/3] drm/i915/display: Common wrapper for casf and pfit

[Nemesa Garg]

Make a common wrapper for pipe_scaling and sharpness
which will be invoked from hsw_crtc_enable and
pipe_fastset. Then accoridng to the condition
pfit_enable or casf_enable or casf_update_strength
can be invoked. This is done so that all pipe
related functions can be under one umberalla.

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 24 ++++------------
 drivers/gpu/drm/i915/display/skl_scaler.c    | 29 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/skl_scaler.h    |  3 ++
 3 files changed, 37 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 568730ffe359..ddab4a1417ec 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -991,15 +991,6 @@ static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
 		 memcmp(old_crtc_state->eld, new_crtc_state->eld, MAX_ELD_BYTES) != 0);
 }
 
-static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
-				const struct intel_crtc_state *old_crtc_state)
-{
-	if (!new_crtc_state->hw.active)
-		return false;
-
-	return is_enabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
-}
-
 static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
 				 const struct intel_crtc_state *new_crtc_state)
 {
@@ -1679,7 +1670,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
 			glk_pipe_scaler_clock_gating_wa(pipe_crtc, true);
 
 		if (DISPLAY_VER(display) >= 9)
-			skl_pfit_enable(pipe_crtc_state);
+			skl_scaler_enable(state, crtc);
 		else
 			ilk_pfit_enable(pipe_crtc_state);
 
@@ -6635,7 +6626,8 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
 	}
 }
 
-static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
+static void intel_pipe_fastset(struct intel_atomic_state *state,
+		const struct intel_crtc_state *old_crtc_state,
 			       const struct intel_crtc_state *new_crtc_state)
 {
 	struct intel_display *display = to_intel_display(new_crtc_state);
@@ -6653,8 +6645,7 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
 
 	/* on skylake this is done by detaching scalers */
 	if (DISPLAY_VER(display) >= 9) {
-		if (new_crtc_state->pch_pfit.enabled)
-			skl_pfit_enable(new_crtc_state);
+			skl_scaler_enable(state, crtc);
 	} else if (HAS_PCH_SPLIT(display)) {
 		if (new_crtc_state->pch_pfit.enabled)
 			ilk_pfit_enable(new_crtc_state);
@@ -6706,7 +6697,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
 			bdw_set_pipe_misc(NULL, new_crtc_state);
 
 		if (intel_crtc_needs_fastset(new_crtc_state))
-			intel_pipe_fastset(old_crtc_state, new_crtc_state);
+			intel_pipe_fastset(state, old_crtc_state, new_crtc_state);
 	}
 
 	intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state);
@@ -6805,11 +6796,6 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
 			intel_vrr_set_transcoder_timings(new_crtc_state);
 	}
 
-	if (intel_casf_enabling(new_crtc_state, old_crtc_state))
-		intel_casf_enable(new_crtc_state);
-	else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
-		intel_casf_update_strength(new_crtc_state);
-
 	intel_fbc_update(state, crtc);
 
 	drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index abd951f7dd71..19a9c4a0da0a 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -752,6 +752,19 @@ static void skl_scaler_setup_filter(struct intel_display *display,
 	}
 }
 
+#define is_enabling(feature, old_crtc_state, new_crtc_state) \
+        ((!(old_crtc_state)->feature || intel_crtc_needs_modeset(new_crtc_state)) && \
+         (new_crtc_state)->feature)
+
+static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
+                                const struct intel_crtc_state *old_crtc_state)
+{
+        if (!new_crtc_state->hw.active)
+                return false;
+
+        return is_enabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
+}
+
 #define CASF_SCALER_FILTER_SELECT \
 	(PS_FILTER_PROGRAMMED | \
 	PS_Y_VERT_FILTER_SELECT(0) | \
@@ -859,6 +872,22 @@ void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
 			  PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
 }
 
+void skl_scaler_enable(struct intel_atomic_state *state,
+                       struct intel_crtc *crtc)
+{
+        struct intel_crtc_state *new_crtc_state =
+                intel_atomic_get_new_crtc_state(state, crtc);
+        struct intel_crtc_state *old_crtc_state =
+                intel_atomic_get_old_crtc_state(state, crtc);
+
+       if (new_crtc_state->pch_pfit.enabled)
+               skl_pfit_enable(new_crtc_state);
+       else if (intel_casf_enabling(new_crtc_state, old_crtc_state))
+                intel_casf_enable(new_crtc_state);
+       else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
+                intel_casf_update_strength(new_crtc_state);
+}
+
 void
 skl_program_plane_scaler(struct intel_dsb *dsb,
 			 struct intel_plane *plane,
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 94bde5d1c06a..3d49836334b7 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -40,6 +40,9 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
 
 void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state);
 
+void skl_scaler_enable(struct intel_atomic_state *state,
+                       struct intel_crtc *crtc);
+
 enum drm_mode_status
 skl_scaler_mode_valid(struct intel_display *display,
 		      const struct drm_display_mode *mode,
-- 
2.25.1

Re: [PATCH 3/3] drm/i915/display: Common wrapper for casf and pfit

[Nautiyal, Ankit K]

On 12/23/2025 1:43 PM, Nemesa Garg wrote:
> Make a common wrapper for pipe_scaling and sharpness
> which will be invoked from hsw_crtc_enable and
> pipe_fastset. Then accoridng to the condition
s/accoridng/according
> pfit_enable or casf_enable or casf_update_strength
> can be invoked. This is done so that all pipe
> related functions can be under one umberalla.

You mean pipe scaler related functions?


>
> Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c | 24 ++++------------
>   drivers/gpu/drm/i915/display/skl_scaler.c    | 29 ++++++++++++++++++++
>   drivers/gpu/drm/i915/display/skl_scaler.h    |  3 ++
>   3 files changed, 37 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 568730ffe359..ddab4a1417ec 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -991,15 +991,6 @@ static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
>   		 memcmp(old_crtc_state->eld, new_crtc_state->eld, MAX_ELD_BYTES) != 0);
>   }
>   
> -static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> -				const struct intel_crtc_state *old_crtc_state)
> -{
> -	if (!new_crtc_state->hw.active)
> -		return false;
> -
> -	return is_enabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
> -}
> -
>   static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
>   				 const struct intel_crtc_state *new_crtc_state)
>   {
> @@ -1679,7 +1670,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>   			glk_pipe_scaler_clock_gating_wa(pipe_crtc, true);
>   
>   		if (DISPLAY_VER(display) >= 9)
> -			skl_pfit_enable(pipe_crtc_state);
> +			skl_scaler_enable(state, crtc);
>   		else
>   			ilk_pfit_enable(pipe_crtc_state);
>   
> @@ -6635,7 +6626,8 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
>   	}
>   }
>   
> -static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
> +static void intel_pipe_fastset(struct intel_atomic_state *state,
> +		const struct intel_crtc_state *old_crtc_state,
>   			       const struct intel_crtc_state *new_crtc_state)
>   {
>   	struct intel_display *display = to_intel_display(new_crtc_state);
> @@ -6653,8 +6645,7 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
>   
>   	/* on skylake this is done by detaching scalers */
>   	if (DISPLAY_VER(display) >= 9) {
> -		if (new_crtc_state->pch_pfit.enabled)
> -			skl_pfit_enable(new_crtc_state);
> +			skl_scaler_enable(state, crtc);
>   	} else if (HAS_PCH_SPLIT(display)) {
>   		if (new_crtc_state->pch_pfit.enabled)
>   			ilk_pfit_enable(new_crtc_state);
> @@ -6706,7 +6697,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
>   			bdw_set_pipe_misc(NULL, new_crtc_state);
>   
>   		if (intel_crtc_needs_fastset(new_crtc_state))
> -			intel_pipe_fastset(old_crtc_state, new_crtc_state);
> +			intel_pipe_fastset(state, old_crtc_state, new_crtc_state);
>   	}
>   
>   	intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state);
> @@ -6805,11 +6796,6 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
>   			intel_vrr_set_transcoder_timings(new_crtc_state);
>   	}
>   
> -	if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> -		intel_casf_enable(new_crtc_state);
> -	else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
> -		intel_casf_update_strength(new_crtc_state);
> -
>   	intel_fbc_update(state, crtc);
>   
>   	drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index abd951f7dd71..19a9c4a0da0a 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -752,6 +752,19 @@ static void skl_scaler_setup_filter(struct intel_display *display,
>   	}
>   }
>   
> +#define is_enabling(feature, old_crtc_state, new_crtc_state) \
> +        ((!(old_crtc_state)->feature || intel_crtc_needs_modeset(new_crtc_state)) && \
> +         (new_crtc_state)->feature)

I think if this is indeed needed this should be placed in 
intel_display.h instead of having a copy here.

> +
> +static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> +                                const struct intel_crtc_state *old_crtc_state)

This doesn't seem to belong to this file.


> +{
> +        if (!new_crtc_state->hw.active)
> +                return false;
> +
> +        return is_enabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
> +}
> +
>   #define CASF_SCALER_FILTER_SELECT \
>   	(PS_FILTER_PROGRAMMED | \
>   	PS_Y_VERT_FILTER_SELECT(0) | \
> @@ -859,6 +872,22 @@ void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
>   			  PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
>   }
>   
> +void skl_scaler_enable(struct intel_atomic_state *state,
> +                       struct intel_crtc *crtc)
> +{
> +        struct intel_crtc_state *new_crtc_state =
> +                intel_atomic_get_new_crtc_state(state, crtc);
> +        struct intel_crtc_state *old_crtc_state =
> +                intel_atomic_get_old_crtc_state(state, crtc);
> +
> +       if (new_crtc_state->pch_pfit.enabled)
> +               skl_pfit_enable(new_crtc_state);

The function `skl_pfit_enable()` was called from intel_display.c 
earlier. Since this is not used outside this file this should be a 
static function.


Regards,

Ankit

> +       else if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> +                intel_casf_enable(new_crtc_state);
> +       else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
> +                intel_casf_update_strength(new_crtc_state);
> +}
> +
>   void
>   skl_program_plane_scaler(struct intel_dsb *dsb,
>   			 struct intel_plane *plane,
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
> index 94bde5d1c06a..3d49836334b7 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -40,6 +40,9 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
>   
>   void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state);
>   
> +void skl_scaler_enable(struct intel_atomic_state *state,
> +                       struct intel_crtc *crtc);
> +
>   enum drm_mode_status
>   skl_scaler_mode_valid(struct intel_display *display,
>   		      const struct drm_display_mode *mode,

✗ i915.CI.BAT: failure for Make casf updates atomic and dsb ready (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3600 bytes --]

== Series Details ==

Series: Make casf updates atomic and dsb ready (rev2)
URL   : https://patchwork.freedesktop.org/series/158667/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17732 -> Patchwork_158667v2
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_158667v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_158667v2, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/index.html

Participating hosts (44 -> 42)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_158667v2:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@migrate:
    - bat-mtlp-8:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17732/bat-mtlp-8/igt@i915_selftest@live@migrate.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/bat-mtlp-8/igt@i915_selftest@live@migrate.html

  
Known issues
------------

  Here are the changes found in Patchwork_158667v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [PASS][3] -> [INCOMPLETE][4] ([i915#15176])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17732/bat-mtlp-8/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/bat-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arls-6:         [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17732/bat-arls-6/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/bat-arls-6/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8] +1 other test pass
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17732/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/bat-arlh-3/igt@i915_selftest@live@workarounds.html
    - bat-arls-5:         [DMESG-FAIL][9] ([i915#12061]) -> [PASS][10] +1 other test pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17732/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/bat-arls-5/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#15176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15176


Build changes
-------------

  * Linux: CI_DRM_17732 -> Patchwork_158667v2

  CI-20190529: 20190529
  CI_DRM_17732: f101d56dc32350daa45c130ff7a6d46512f614a9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8674: f38f4d8e9c65aff45ac807e646d06e38bc3193a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_158667v2: f101d56dc32350daa45c130ff7a6d46512f614a9 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158667v2/index.html

[-- Attachment #2: Type: text/html, Size: 4446 bytes --]

[PATCH 0/3] Make casf updates atomic and dsb ready

[Nemesa Garg]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 1071 bytes --]

  The existing implementation for casf scaler re‑implemented
parts of skl_scaler logic and programmed registers from
pre‑plane update hooks, which caused:
  - updates were not atomic.
  - prevented execution via Display State Buffer.
  - computed state was late.

This series fixes these issues by:
  - consolidating common logic into skl_scaler.c.
  - moving computation into crtc_compute_config().
  - Create a common wrapper for pfit and casf so
    that whenever pipe scaler is done through dsb
    casf can also be dsb compatible

Nemesa Garg (3):
  drm/i915/display: Move casf_compute_config
  drm/i915/display: Introduce skl_pipe_scaler_setup()
  drm/i915/display: Common wrapper for casf and pfit

 drivers/gpu/drm/i915/display/intel_casf.c    |  11 ++
 drivers/gpu/drm/i915/display/intel_casf.h    |   2 +
 drivers/gpu/drm/i915/display/intel_display.c |  36 +++----
 drivers/gpu/drm/i915/display/skl_scaler.c    | 104 +++++++++++--------
 drivers/gpu/drm/i915/display/skl_scaler.h    |   5 +-
 5 files changed, 89 insertions(+), 69 deletions(-)

-- 
2.25.1

[PATCH 1/3] drm/i915/display: Move casf_compute_config

[Nemesa Garg]

Prefill calculations are getting screwed up as casf_compute is getting
called in later stage. So move casf_compute_config to crtc_compute
config and check if there is a change in the sharpness strength, if so
set the flag uapi.mode_changed so that everytime when strength changes
casf_compute_config can be called and new strength value gets updated.

v2: Remove extra casf_check [Ville]
v3: Wrap commit message uto 75 [Ankit]

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 10b6c6fcb03f..29c165bd8960 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2516,6 +2516,10 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
 
 	intel_vrr_compute_guardband(crtc_state);
 
+	ret = intel_casf_compute_config(crtc_state);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
@@ -4308,10 +4312,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
 		return ret;
 	}
 
-	ret = intel_casf_compute_config(crtc_state);
-	if (ret)
-		return ret;
-
 	if (DISPLAY_VER(display) >= 9) {
 		if (intel_crtc_needs_modeset(crtc_state) ||
 		    intel_crtc_needs_fastset(crtc_state) ||
@@ -6441,6 +6441,10 @@ int intel_atomic_check(struct drm_device *dev,
 		if (new_crtc_state->uapi.scaling_filter !=
 		    old_crtc_state->uapi.scaling_filter)
 			new_crtc_state->uapi.mode_changed = true;
+
+		if (new_crtc_state->uapi.sharpness_strength !=
+		    old_crtc_state->uapi.sharpness_strength)
+			new_crtc_state->uapi.mode_changed = true;
 	}
 
 	intel_vrr_check_modeset(state);
-- 
2.25.1