Re: [Intel-gfx] [PATCH 1/5] drm/i915/display: Move display device info to header under display/

[Andrzej Hajda <andrzej.hajda@intel.com>]

On 18.05.2023 05:18, Matt Roper wrote:
> Moving display-specific substruture definitions will help keep display
> more self-contained and make it easier to re-use in other drivers (i.e.,
> Xe) in the future.
> 
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

s/substruture/substructure/

Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>

Regards
Andrzej

> ---
>   .../drm/i915/display/intel_display_device.h   | 60 +++++++++++++++++++
>   drivers/gpu/drm/i915/intel_device_info.h      | 49 +--------------
>   2 files changed, 62 insertions(+), 47 deletions(-)
>   create mode 100644 drivers/gpu/drm/i915/display/intel_display_device.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> new file mode 100644
> index 000000000000..c689d582dbf1
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -0,0 +1,60 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef __INTEL_DISPLAY_DEVICE_H__
> +#define __INTEL_DISPLAY_DEVICE_H__
> +
> +#include <linux/types.h>
> +
> +#include "display/intel_display_limits.h"
> +
> +#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
> +	/* Keep in alphabetical order */ \
> +	func(cursor_needs_physical); \
> +	func(has_cdclk_crawl); \
> +	func(has_cdclk_squash); \
> +	func(has_ddi); \
> +	func(has_dp_mst); \
> +	func(has_dsb); \
> +	func(has_fpga_dbg); \
> +	func(has_gmch); \
> +	func(has_hotplug); \
> +	func(has_hti); \
> +	func(has_ipc); \
> +	func(has_overlay); \
> +	func(has_psr); \
> +	func(has_psr_hw_tracking); \
> +	func(overlay_needs_physical); \
> +	func(supports_tv);
> +
> +struct intel_display_device_info {
> +	u8 abox_mask;
> +
> +	struct {
> +		u16 size; /* in blocks */
> +		u8 slice_mask;
> +	} dbuf;
> +
> +#define DEFINE_FLAG(name) u8 name:1
> +	DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
> +#undef DEFINE_FLAG
> +
> +	/* Global register offset for the display engine */
> +	u32 mmio_offset;
> +
> +	/* Register offsets for the various display pipes and transcoders */
> +	u32 pipe_offsets[I915_MAX_TRANSCODERS];
> +	u32 trans_offsets[I915_MAX_TRANSCODERS];
> +	u32 cursor_offsets[I915_MAX_PIPES];
> +
> +	struct {
> +		u32 degamma_lut_size;
> +		u32 gamma_lut_size;
> +		u32 degamma_lut_tests;
> +		u32 gamma_lut_tests;
> +	} color;
> +};
> +
> +#endif
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 959a4080840c..96f6bdb04b1b 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -29,7 +29,7 @@
>   
>   #include "intel_step.h"
>   
> -#include "display/intel_display_limits.h"
> +#include "display/intel_display_device.h"
>   
>   #include "gt/intel_engine_types.h"
>   #include "gt/intel_context_types.h"
> @@ -182,25 +182,6 @@ enum intel_ppgtt_type {
>   	func(unfenced_needs_alignment); \
>   	func(hws_needs_physical);
>   
> -#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
> -	/* Keep in alphabetical order */ \
> -	func(cursor_needs_physical); \
> -	func(has_cdclk_crawl); \
> -	func(has_cdclk_squash); \
> -	func(has_ddi); \
> -	func(has_dp_mst); \
> -	func(has_dsb); \
> -	func(has_fpga_dbg); \
> -	func(has_gmch); \
> -	func(has_hotplug); \
> -	func(has_hti); \
> -	func(has_ipc); \
> -	func(has_overlay); \
> -	func(has_psr); \
> -	func(has_psr_hw_tracking); \
> -	func(overlay_needs_physical); \
> -	func(supports_tv);
> -
>   struct intel_ip_version {
>   	u8 ver;
>   	u8 rel;
> @@ -278,33 +259,7 @@ struct intel_device_info {
>   	DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
>   #undef DEFINE_FLAG
>   
> -	struct {
> -		u8 abox_mask;
> -
> -		struct {
> -			u16 size; /* in blocks */
> -			u8 slice_mask;
> -		} dbuf;
> -
> -#define DEFINE_FLAG(name) u8 name:1
> -		DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
> -#undef DEFINE_FLAG
> -
> -		/* Global register offset for the display engine */
> -		u32 mmio_offset;
> -
> -		/* Register offsets for the various display pipes and transcoders */
> -		u32 pipe_offsets[I915_MAX_TRANSCODERS];
> -		u32 trans_offsets[I915_MAX_TRANSCODERS];
> -		u32 cursor_offsets[I915_MAX_PIPES];
> -
> -		struct {
> -			u32 degamma_lut_size;
> -			u32 gamma_lut_size;
> -			u32 degamma_lut_tests;
> -			u32 gamma_lut_tests;
> -		} color;
> -	} display;
> +	struct intel_display_device_info display;
>   
>   	/*
>   	 * Initial runtime info. Do not access outside of i915_driver_create().