From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: matthew.auld@intel.com
Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915: Initialise basic fence before acquiring seqno
Date: Mon, 3 Feb 2020 11:02:50 +0000 [thread overview]
Message-ID: <7bd4c98f-6834-cf2b-11a2-2f73df65c93f@linux.intel.com> (raw)
In-Reply-To: <158072752973.20090.2756546612205856039@skylake-alporthouse-com>
On 03/02/2020 10:58, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2020-02-03 10:55:52)
>> On 03/02/2020 09:41, Chris Wilson wrote:
>>> Inside the intel_timeline_get_seqno(), we currently track the retirement
>>> of the old cachelines by listening to the new request. This requires
>>> that the new request is ready to be used and so requires a minimum bit
>>> of initialisation prior to getting the new seqno.
>>>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_request.c | 21 ++++++++++++++-------
>>> 1 file changed, 14 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
>>> index 78a5f5d3c070..f56b046a32de 100644
>>> --- a/drivers/gpu/drm/i915/i915_request.c
>>> +++ b/drivers/gpu/drm/i915/i915_request.c
>>> @@ -595,6 +595,8 @@ static void __i915_request_ctor(void *arg)
>>> i915_sw_fence_init(&rq->submit, submit_notify);
>>> i915_sw_fence_init(&rq->semaphore, semaphore_notify);
>>>
>>> + dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock, 0, 0);
>>> +
>>> rq->file_priv = NULL;
>>> rq->capture_list = NULL;
>>>
>>> @@ -653,25 +655,30 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
>>> }
>>> }
>>>
>>> - ret = intel_timeline_get_seqno(tl, rq, &seqno);
>>> - if (ret)
>>> - goto err_free;
>>> -
>>> rq->i915 = ce->engine->i915;
>>> rq->context = ce;
>>> rq->engine = ce->engine;
>>> rq->ring = ce->ring;
>>> rq->execution_mask = ce->engine->mask;
>>>
>>> + kref_init(&rq->fence.refcount);
>>> + rq->fence.flags = 0;
>>> + rq->fence.error = 0;
>>> + INIT_LIST_HEAD(&rq->fence.cb_list);
>>
>> One of these fields the previous user leaves in a non-empty state?
>
> Yes, we don't reset cb_list after signaling, error and flags hold
> residuals, but refcount is known to be 0!
Okay,
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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next prev parent reply other threads:[~2020-02-03 11:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-03 9:41 [Intel-gfx] [PATCH 1/6] drm/i915: Hold reference to previous active fence as we queue Chris Wilson
2020-02-03 9:41 ` [Intel-gfx] [PATCH 2/6] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
2020-02-03 10:55 ` Tvrtko Ursulin
2020-02-03 10:58 ` Chris Wilson
2020-02-03 11:02 ` Tvrtko Ursulin [this message]
2020-02-03 9:41 ` [Intel-gfx] [PATCH 3/6] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
2020-02-03 9:41 ` [Intel-gfx] [PATCH 4/6] drm/i915/selftests: Add a simple rollover for the kernel context Chris Wilson
2020-02-03 17:32 ` Matthew Auld
2020-02-03 17:37 ` Chris Wilson
2020-02-03 9:41 ` [Intel-gfx] [PATCH 5/6] drm/i915: Flush execution tasklets before checking request status Chris Wilson
2020-02-03 9:41 ` [Intel-gfx] [PATCH 6/6] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore Chris Wilson
2020-02-03 10:50 ` [Intel-gfx] [PATCH 1/6] drm/i915: Hold reference to previous active fence as we queue Tvrtko Ursulin
2020-02-03 11:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] " Patchwork
2020-02-05 17:55 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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