* [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables
@ 2014-11-21 17:35 michael.h.nguyen
2014-11-23 6:01 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser shuang.he
2014-12-08 17:58 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables Bloomfield, Jon
0 siblings, 2 replies; 4+ messages in thread
From: michael.h.nguyen @ 2014-11-21 17:35 UTC (permalink / raw)
To: intel-gfx; +Cc: daniel.vetter, jesse.barnes
From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
Was missing
Issue: VIZ-4701
Signed-off-by: Michael H. Nguyen <michael.h.nguyen@intel.com>
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 14 +++++++++++---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 22c992a..364aff7 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -152,6 +152,7 @@ static const struct drm_i915_cmd_descriptor render_cmds[] = {
CMD( MI_PREDICATE, SMI, F, 1, S ),
CMD( MI_TOPOLOGY_FILTER, SMI, F, 1, S ),
CMD( MI_DISPLAY_FLIP, SMI, !F, 0xFF, R ),
+ CMD( MI_SET_APPID, SMI, F, 1, S ),
CMD( MI_SET_CONTEXT, SMI, !F, 0xFF, R ),
CMD( MI_URB_CLEAR, SMI, !F, 0xFF, S ),
CMD( MI_STORE_DWORD_IMM, SMI, !F, 0x3F, B,
@@ -210,6 +211,7 @@ static const struct drm_i915_cmd_descriptor hsw_render_cmds[] = {
CMD( MI_SET_PREDICATE, SMI, F, 1, S ),
CMD( MI_RS_CONTROL, SMI, F, 1, S ),
CMD( MI_URB_ATOMIC_ALLOC, SMI, F, 1, S ),
+ CMD( MI_SET_APPID, SMI, F, 1, S ),
CMD( MI_RS_CONTEXT, SMI, F, 1, S ),
CMD( MI_LOAD_SCAN_LINES_INCL, SMI, !F, 0x3F, M ),
CMD( MI_LOAD_SCAN_LINES_EXCL, SMI, !F, 0x3F, R ),
@@ -229,6 +231,7 @@ static const struct drm_i915_cmd_descriptor hsw_render_cmds[] = {
static const struct drm_i915_cmd_descriptor video_cmds[] = {
CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
+ CMD( MI_SET_APPID, SMI, F, 1, S ),
CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
.bits = {{
.offset = 0,
@@ -272,6 +275,7 @@ static const struct drm_i915_cmd_descriptor video_cmds[] = {
static const struct drm_i915_cmd_descriptor vecs_cmds[] = {
CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
+ CMD( MI_SET_APPID, SMI, F, 1, S ),
CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
.bits = {{
.offset = 0,
@@ -481,13 +485,17 @@ static u32 gen7_bsd_get_cmd_length_mask(u32 cmd_header)
u32 client = (cmd_header & INSTR_CLIENT_MASK) >> INSTR_CLIENT_SHIFT;
u32 subclient =
(cmd_header & INSTR_SUBCLIENT_MASK) >> INSTR_SUBCLIENT_SHIFT;
+ u32 op = (cmd_header & INSTR_26_TO_24_MASK) >> INSTR_26_TO_24_SHIFT;
if (client == INSTR_MI_CLIENT)
return 0x3F;
else if (client == INSTR_RC_CLIENT) {
- if (subclient == INSTR_MEDIA_SUBCLIENT)
- return 0xFFF;
- else
+ if (subclient == INSTR_MEDIA_SUBCLIENT) {
+ if (op == 6)
+ return 0xFFFF;
+ else
+ return 0xFFF;
+ } else
return 0xFF;
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7a77cd5..c881d88 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -204,6 +204,8 @@
#define INSTR_SUBCLIENT_SHIFT 27
#define INSTR_SUBCLIENT_MASK 0x18000000
#define INSTR_MEDIA_SUBCLIENT 0x2
+#define INSTR_26_TO_24_MASK 0x7000000
+#define INSTR_26_TO_24_SHIFT 24
/*
* Memory interface instructions used by the kernel
@@ -233,6 +235,7 @@
#define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
#define MI_SUSPEND_FLUSH MI_INSTR(0x0b, 0)
#define MI_SUSPEND_FLUSH_EN (1<<0)
+#define MI_SET_APPID MI_INSTR(0x0e, 0)
#define MI_OVERLAY_FLIP MI_INSTR(0x11, 0)
#define MI_OVERLAY_CONTINUE (0x0<<21)
#define MI_OVERLAY_ON (0x1<<21)
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser
2014-11-21 17:35 [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables michael.h.nguyen
@ 2014-11-23 6:01 ` shuang.he
2014-12-08 17:58 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables Bloomfield, Jon
1 sibling, 0 replies; 4+ messages in thread
From: shuang.he @ 2014-11-23 6:01 UTC (permalink / raw)
To: shuang.he, intel-gfx, michael.h.nguyen
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 367/367 367/367
ILK -4 373/375 369/375
SNB 450/450 450/450
IVB -1 502/503 501/503
BYT 289/289 289/289
HSW -3 567/567 564/567
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_rcs-flip-vs-panning-interruptible DMESG_WARN(1, M26)PASS(1, M37) DMESG_WARN(1, M26)
ILK igt_kms_flip_wf_vblank-ts-check-interruptible DMESG_WARN(1, M26)PASS(3, M37M26) DMESG_WARN(1, M26)
ILK igt_kms_render_direct-render PASS(2, M37M26) DMESG_WARN(1, M26)
ILK igt_kms_setmode_invalid-clone-exclusive-crtc DMESG_WARN(1, M26)PASS(1, M37) DMESG_WARN(1, M26)
IVB igt_gem_bad_reloc_negative-reloc-lut NSPT(3, M21M34M4)PASS(1, M21) NSPT(1, M4)
HSW igt_gem_bad_reloc_negative-reloc-lut NSPT(10, M40M20)PASS(1, M20) NSPT(1, M20)
HSW igt_kms_rotation_crc_primary-rotation PASS(11, M20M40) DMESG_WARN(1, M20)
HSW igt_pm_rc6_residency_rc6-accuracy PASS(11, M20M40) FAIL(1, M20)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables
2014-11-21 17:35 [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables michael.h.nguyen
2014-11-23 6:01 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser shuang.he
@ 2014-12-08 17:58 ` Bloomfield, Jon
2014-12-08 18:14 ` Daniel Vetter
1 sibling, 1 reply; 4+ messages in thread
From: Bloomfield, Jon @ 2014-12-08 17:58 UTC (permalink / raw)
To: Nguyen, Michael H, intel-gfx@lists.freedesktop.org
Cc: Vetter, Daniel, Barnes, Jesse
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf
> Of michael.h.nguyen@intel.com
> Sent: Friday, November 21, 2014 5:36 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vetter, Daniel; Barnes, Jesse
> Subject: [Intel-gfx] [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser
> tables
>
> From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
>
> Was missing
>
> Issue: VIZ-4701
> Signed-off-by: Michael H. Nguyen <michael.h.nguyen@intel.com>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 14 +++++++++++---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 2 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
> b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 22c992a..364aff7 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -152,6 +152,7 @@ static const struct drm_i915_cmd_descriptor
> render_cmds[] = {
> CMD( MI_PREDICATE, SMI, F, 1, S ),
> CMD( MI_TOPOLOGY_FILTER, SMI, F, 1, S ),
> CMD( MI_DISPLAY_FLIP, SMI, !F, 0xFF, R ),
> + CMD( MI_SET_APPID, SMI, F, 1, S ),
> CMD( MI_SET_CONTEXT, SMI, !F, 0xFF, R ),
> CMD( MI_URB_CLEAR, SMI, !F, 0xFF, S ),
> CMD( MI_STORE_DWORD_IMM, SMI, !F, 0x3F, B,
> @@ -210,6 +211,7 @@ static const struct drm_i915_cmd_descriptor
> hsw_render_cmds[] = {
> CMD( MI_SET_PREDICATE, SMI, F, 1, S ),
> CMD( MI_RS_CONTROL, SMI, F, 1, S ),
> CMD( MI_URB_ATOMIC_ALLOC, SMI, F, 1, S ),
> + CMD( MI_SET_APPID, SMI, F, 1, S ),
> CMD( MI_RS_CONTEXT, SMI, F, 1, S ),
> CMD( MI_LOAD_SCAN_LINES_INCL, SMI, !F, 0x3F, M ),
> CMD( MI_LOAD_SCAN_LINES_EXCL, SMI, !F, 0x3F, R ),
> @@ -229,6 +231,7 @@ static const struct drm_i915_cmd_descriptor
> hsw_render_cmds[] = {
>
> static const struct drm_i915_cmd_descriptor video_cmds[] = {
> CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
> + CMD( MI_SET_APPID, SMI, F, 1, S ),
> CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
> .bits = {{
> .offset = 0,
> @@ -272,6 +275,7 @@ static const struct drm_i915_cmd_descriptor
> video_cmds[] = {
>
> static const struct drm_i915_cmd_descriptor vecs_cmds[] = {
> CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
> + CMD( MI_SET_APPID, SMI, F, 1, S ),
> CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
> .bits = {{
> .offset = 0,
> @@ -481,13 +485,17 @@ static u32 gen7_bsd_get_cmd_length_mask(u32
> cmd_header)
> u32 client = (cmd_header & INSTR_CLIENT_MASK) >>
> INSTR_CLIENT_SHIFT;
> u32 subclient =
> (cmd_header & INSTR_SUBCLIENT_MASK) >>
> INSTR_SUBCLIENT_SHIFT;
> + u32 op = (cmd_header & INSTR_26_TO_24_MASK) >>
> INSTR_26_TO_24_SHIFT;
>
> if (client == INSTR_MI_CLIENT)
> return 0x3F;
> else if (client == INSTR_RC_CLIENT) {
> - if (subclient == INSTR_MEDIA_SUBCLIENT)
> - return 0xFFF;
> - else
> + if (subclient == INSTR_MEDIA_SUBCLIENT) {
> + if (op == 6)
> + return 0xFFFF;
> + else
> + return 0xFFF;
> + } else
> return 0xFF;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h index 7a77cd5..c881d88 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -204,6 +204,8 @@
> #define INSTR_SUBCLIENT_SHIFT 27
> #define INSTR_SUBCLIENT_MASK 0x18000000
> #define INSTR_MEDIA_SUBCLIENT 0x2
> +#define INSTR_26_TO_24_MASK 0x7000000
> +#define INSTR_26_TO_24_SHIFT 24
>
> /*
> * Memory interface instructions used by the kernel @@ -233,6 +235,7 @@
> #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
> #define MI_SUSPEND_FLUSH MI_INSTR(0x0b, 0)
> #define MI_SUSPEND_FLUSH_EN (1<<0)
> +#define MI_SET_APPID MI_INSTR(0x0e, 0)
> #define MI_OVERLAY_FLIP MI_INSTR(0x11, 0)
> #define MI_OVERLAY_CONTINUE (0x0<<21)
> #define MI_OVERLAY_ON (0x1<<21)
Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com>
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables
2014-12-08 17:58 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables Bloomfield, Jon
@ 2014-12-08 18:14 ` Daniel Vetter
0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2014-12-08 18:14 UTC (permalink / raw)
To: Bloomfield, Jon
Cc: Vetter, Daniel, intel-gfx@lists.freedesktop.org, Barnes, Jesse
On Mon, Dec 08, 2014 at 05:58:45PM +0000, Bloomfield, Jon wrote:
> > -----Original Message-----
> > From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf
> > Of michael.h.nguyen@intel.com
> > Sent: Friday, November 21, 2014 5:36 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Vetter, Daniel; Barnes, Jesse
> > Subject: [Intel-gfx] [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser
> > tables
> >
> > From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
> >
> > Was missing
> >
> > Issue: VIZ-4701
> > Signed-off-by: Michael H. Nguyen <michael.h.nguyen@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_cmd_parser.c | 14 +++++++++++---
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > 2 files changed, 14 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
> > b/drivers/gpu/drm/i915/i915_cmd_parser.c
> > index 22c992a..364aff7 100644
> > --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> > +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> > @@ -152,6 +152,7 @@ static const struct drm_i915_cmd_descriptor
> > render_cmds[] = {
> > CMD( MI_PREDICATE, SMI, F, 1, S ),
> > CMD( MI_TOPOLOGY_FILTER, SMI, F, 1, S ),
> > CMD( MI_DISPLAY_FLIP, SMI, !F, 0xFF, R ),
> > + CMD( MI_SET_APPID, SMI, F, 1, S ),
> > CMD( MI_SET_CONTEXT, SMI, !F, 0xFF, R ),
> > CMD( MI_URB_CLEAR, SMI, !F, 0xFF, S ),
> > CMD( MI_STORE_DWORD_IMM, SMI, !F, 0x3F, B,
> > @@ -210,6 +211,7 @@ static const struct drm_i915_cmd_descriptor
> > hsw_render_cmds[] = {
> > CMD( MI_SET_PREDICATE, SMI, F, 1, S ),
> > CMD( MI_RS_CONTROL, SMI, F, 1, S ),
> > CMD( MI_URB_ATOMIC_ALLOC, SMI, F, 1, S ),
> > + CMD( MI_SET_APPID, SMI, F, 1, S ),
> > CMD( MI_RS_CONTEXT, SMI, F, 1, S ),
> > CMD( MI_LOAD_SCAN_LINES_INCL, SMI, !F, 0x3F, M ),
> > CMD( MI_LOAD_SCAN_LINES_EXCL, SMI, !F, 0x3F, R ),
> > @@ -229,6 +231,7 @@ static const struct drm_i915_cmd_descriptor
> > hsw_render_cmds[] = {
> >
> > static const struct drm_i915_cmd_descriptor video_cmds[] = {
> > CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
> > + CMD( MI_SET_APPID, SMI, F, 1, S ),
> > CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
> > .bits = {{
> > .offset = 0,
> > @@ -272,6 +275,7 @@ static const struct drm_i915_cmd_descriptor
> > video_cmds[] = {
> >
> > static const struct drm_i915_cmd_descriptor vecs_cmds[] = {
> > CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
> > + CMD( MI_SET_APPID, SMI, F, 1, S ),
> > CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
> > .bits = {{
> > .offset = 0,
> > @@ -481,13 +485,17 @@ static u32 gen7_bsd_get_cmd_length_mask(u32
> > cmd_header)
> > u32 client = (cmd_header & INSTR_CLIENT_MASK) >>
> > INSTR_CLIENT_SHIFT;
> > u32 subclient =
> > (cmd_header & INSTR_SUBCLIENT_MASK) >>
> > INSTR_SUBCLIENT_SHIFT;
> > + u32 op = (cmd_header & INSTR_26_TO_24_MASK) >>
> > INSTR_26_TO_24_SHIFT;
> >
> > if (client == INSTR_MI_CLIENT)
> > return 0x3F;
> > else if (client == INSTR_RC_CLIENT) {
> > - if (subclient == INSTR_MEDIA_SUBCLIENT)
> > - return 0xFFF;
> > - else
> > + if (subclient == INSTR_MEDIA_SUBCLIENT) {
> > + if (op == 6)
> > + return 0xFFFF;
> > + else
> > + return 0xFFF;
> > + } else
> > return 0xFF;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 7a77cd5..c881d88 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -204,6 +204,8 @@
> > #define INSTR_SUBCLIENT_SHIFT 27
> > #define INSTR_SUBCLIENT_MASK 0x18000000
> > #define INSTR_MEDIA_SUBCLIENT 0x2
> > +#define INSTR_26_TO_24_MASK 0x7000000
> > +#define INSTR_26_TO_24_SHIFT 24
> >
> > /*
> > * Memory interface instructions used by the kernel @@ -233,6 +235,7 @@
> > #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
> > #define MI_SUSPEND_FLUSH MI_INSTR(0x0b, 0)
> > #define MI_SUSPEND_FLUSH_EN (1<<0)
> > +#define MI_SET_APPID MI_INSTR(0x0e, 0)
> > #define MI_OVERLAY_FLIP MI_INSTR(0x11, 0)
> > #define MI_OVERLAY_CONTINUE (0x0<<21)
> > #define MI_OVERLAY_ON (0x1<<21)
>
> Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-12-08 18:14 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-11-21 17:35 [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables michael.h.nguyen
2014-11-23 6:01 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser shuang.he
2014-12-08 17:58 ` [PATCH] drm/i915: Add MI_SET_APPID cmd to cmd parser tables Bloomfield, Jon
2014-12-08 18:14 ` Daniel Vetter
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox