[PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[Michel Thierry]

The firmware may change between the hang and cat /sys/class/drm/card0/error

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  4 ++++
 drivers/gpu/drm/i915/i915_gpu_error.c | 22 ++++++++++++++++------
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a74b87b1b5a9..3b0cff05f5f7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -953,6 +953,10 @@ struct i915_gpu_state {
 	u32 gab_ctl;
 	u32 gfx_mode;
 
+	/* Firmware load state */
+	u32 dmc_loaded;
+	u32 dmc_version;
+
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];
 	struct intel_overlay_error_state *overlay;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 2b1d15668192..ae6f0092b046 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -623,13 +623,10 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
 
 	if (HAS_CSR(dev_priv)) {
-		struct intel_csr *csr = &dev_priv->csr;
-
-		err_printf(m, "DMC loaded: %s\n",
-			   yesno(csr->dmc_payload != NULL));
+		err_printf(m, "DMC loaded: %s\n", yesno(error->dmc_loaded));
 		err_printf(m, "DMC fw version: %d.%d\n",
-			   CSR_VERSION_MAJOR(csr->version),
-			   CSR_VERSION_MINOR(csr->version));
+			   CSR_VERSION_MAJOR(error->dmc_version),
+			   CSR_VERSION_MINOR(error->dmc_version));
 	}
 
 	err_printf(m, "EIR: 0x%08x\n", error->eir);
@@ -1585,6 +1582,18 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
 	error->pgtbl_er = I915_READ(PGTBL_ER);
 }
 
+/* Capture all firmware related information. */
+static void i915_capture_fw_state(struct drm_i915_private *dev_priv,
+				  struct i915_gpu_state *error)
+{
+	if (HAS_CSR(dev_priv)) {
+		struct intel_csr *csr = &dev_priv->csr;
+
+		error->dmc_loaded = (csr->dmc_payload != NULL);
+		error->dmc_version = csr->version;
+	}
+}
+
 static void i915_error_capture_msg(struct drm_i915_private *dev_priv,
 				   struct i915_gpu_state *error,
 				   u32 engine_mask,
@@ -1650,6 +1659,7 @@ static int capture(void *data)
 
 	i915_capture_gen_state(error->i915, error);
 	i915_capture_reg_state(error->i915, error);
+	i915_capture_fw_state(error->i915, error);
 	i915_gem_record_fences(error->i915, error);
 	i915_gem_record_rings(error->i915, error);
 	i915_capture_active_buffers(error->i915, error);
-- 
2.11.0

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[PATCH 2/3] drm/i915: Include GuC fw version in error state

[Michel Thierry]

There was no way to check if the platform is running the latest
firmware.

v2: use HAS_GUC and intel_guc* (Michal)
    capture before reset (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  2 ++
 drivers/gpu/drm/i915/i915_gpu_error.c | 17 +++++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3b0cff05f5f7..a331c00523bc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -956,6 +956,8 @@ struct i915_gpu_state {
 	/* Firmware load state */
 	u32 dmc_loaded;
 	u32 dmc_version;
+	u32 guc_loaded;
+	u32 guc_version;
 
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index ae6f0092b046..63f1b9606b57 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -629,6 +629,13 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 			   CSR_VERSION_MINOR(error->dmc_version));
 	}
 
+	if (HAS_GUC(dev_priv)) {
+		err_printf(m, "GuC loaded: %s\n", yesno(error->guc_loaded));
+		err_printf(m, "GuC fw version: %d.%d\n",
+			   error->guc_version >> 16,
+			   error->guc_version & 0xffff);
+	}
+
 	err_printf(m, "EIR: 0x%08x\n", error->eir);
 	err_printf(m, "IER: 0x%08x\n", error->ier);
 	for (i = 0; i < error->ngtier; i++)
@@ -1592,6 +1599,16 @@ static void i915_capture_fw_state(struct drm_i915_private *dev_priv,
 		error->dmc_loaded = (csr->dmc_payload != NULL);
 		error->dmc_version = csr->version;
 	}
+
+	if (HAS_GUC(dev_priv)) {
+		struct intel_guc *guc = &dev_priv->guc;
+
+		error->guc_loaded =
+			(guc->fw.load_status == INTEL_UC_FIRMWARE_SUCCESS);
+		error->guc_version =
+			(guc->fw.major_ver_found << 16 |
+			 guc->fw.minor_ver_found);
+	}
 }
 
 static void i915_error_capture_msg(struct drm_i915_private *dev_priv,
-- 
2.11.0

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Re: [PATCH 2/3] drm/i915: Include GuC fw version in error state

[Michal Wajdeczko]

On Fri, Feb 24, 2017 at 11:05:29AM -0800, Michel Thierry wrote:
> There was no way to check if the platform is running the latest
> firmware.
> 
> v2: use HAS_GUC and intel_guc* (Michal)
>     capture before reset (Chris)
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  2 ++
>  drivers/gpu/drm/i915/i915_gpu_error.c | 17 +++++++++++++++++
>  2 files changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 3b0cff05f5f7..a331c00523bc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -956,6 +956,8 @@ struct i915_gpu_state {
>  	/* Firmware load state */
>  	u32 dmc_loaded;
>  	u32 dmc_version;
> +	u32 guc_loaded;

Btw, we can drop this u32 by assuming that non-zero version is same as "loaded"
as having fw version 0.0 loaded into Guc is unlikely ;)

> +	u32 guc_version;

Hmm, if we use 2x u16 here then we avoid manual bit operations on capture/print

But still

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

-Michal 


>  
>  	u32 nfence;
>  	u64 fence[I915_MAX_NUM_FENCES];
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index ae6f0092b046..63f1b9606b57 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -629,6 +629,13 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
>  			   CSR_VERSION_MINOR(error->dmc_version));
>  	}
>  
> +	if (HAS_GUC(dev_priv)) {
> +		err_printf(m, "GuC loaded: %s\n", yesno(error->guc_loaded));
> +		err_printf(m, "GuC fw version: %d.%d\n",
> +			   error->guc_version >> 16,
> +			   error->guc_version & 0xffff);
> +	}
> +
>  	err_printf(m, "EIR: 0x%08x\n", error->eir);
>  	err_printf(m, "IER: 0x%08x\n", error->ier);
>  	for (i = 0; i < error->ngtier; i++)
> @@ -1592,6 +1599,16 @@ static void i915_capture_fw_state(struct drm_i915_private *dev_priv,
>  		error->dmc_loaded = (csr->dmc_payload != NULL);
>  		error->dmc_version = csr->version;
>  	}
> +
> +	if (HAS_GUC(dev_priv)) {
> +		struct intel_guc *guc = &dev_priv->guc;
> +
> +		error->guc_loaded =
> +			(guc->fw.load_status == INTEL_UC_FIRMWARE_SUCCESS);
> +		error->guc_version =
> +			(guc->fw.major_ver_found << 16 |
> +			 guc->fw.minor_ver_found);
> +	}
>  }
>  
>  static void i915_error_capture_msg(struct drm_i915_private *dev_priv,
> -- 
> 2.11.0
> 
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[PATCH 3/3] drm/i915: Include HuC fw version in error state

[Michel Thierry]

HuC depends on GuC, so be it.

Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  2 ++
 drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++++++++++
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a331c00523bc..1f949cc4a072 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -958,6 +958,8 @@ struct i915_gpu_state {
 	u32 dmc_version;
 	u32 guc_loaded;
 	u32 guc_version;
+	u32 huc_loaded;
+	u32 huc_version;
 
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 63f1b9606b57..d4a78b8317d6 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -634,6 +634,10 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 		err_printf(m, "GuC fw version: %d.%d\n",
 			   error->guc_version >> 16,
 			   error->guc_version & 0xffff);
+		err_printf(m, "HuC loaded: %s\n", yesno(error->huc_loaded));
+		err_printf(m, "HuC fw version: %d.%d\n",
+			   error->huc_version >> 16,
+			   error->huc_version & 0xffff);
 	}
 
 	err_printf(m, "EIR: 0x%08x\n", error->eir);
@@ -1602,12 +1606,19 @@ static void i915_capture_fw_state(struct drm_i915_private *dev_priv,
 
 	if (HAS_GUC(dev_priv)) {
 		struct intel_guc *guc = &dev_priv->guc;
+		struct intel_huc *huc = &dev_priv->huc;
 
 		error->guc_loaded =
 			(guc->fw.load_status == INTEL_UC_FIRMWARE_SUCCESS);
 		error->guc_version =
 			(guc->fw.major_ver_found << 16 |
 			 guc->fw.minor_ver_found);
+
+		error->huc_loaded =
+			(huc->fw.load_status == INTEL_UC_FIRMWARE_SUCCESS);
+		error->huc_version =
+			(huc->fw.major_ver_found << 16 |
+			 huc->fw.minor_ver_found);
 	}
 }
 
-- 
2.11.0

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Re: [PATCH 3/3] drm/i915: Include HuC fw version in error state

[Chris Wilson]

On Fri, Feb 24, 2017 at 11:05:30AM -0800, Michel Thierry wrote:
> HuC depends on GuC, so be it.
> 
> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  2 ++
>  drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++++++++++
>  2 files changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a331c00523bc..1f949cc4a072 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -958,6 +958,8 @@ struct i915_gpu_state {
>  	u32 dmc_version;
>  	u32 guc_loaded;
>  	u32 guc_version;
> +	u32 huc_loaded;
> +	u32 huc_version;

I'll just ask once if you might consider merging major_ver_found,
minor_ver_found in fw so we don't dance around u16 -> u32 -> u16 so
blatantly.

Patches do what they say, so
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Just beware the style police.
-Chris

-- 
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Re: [PATCH 3/3] drm/i915: Include HuC fw version in error state

[Michal Wajdeczko]

On Fri, Feb 24, 2017 at 11:05:30AM -0800, Michel Thierry wrote:
> HuC depends on GuC, so be it.
> 
> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  2 ++
>  drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++++++++++
>  2 files changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a331c00523bc..1f949cc4a072 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -958,6 +958,8 @@ struct i915_gpu_state {
>  	u32 dmc_version;
>  	u32 guc_loaded;
>  	u32 guc_version;
> +	u32 huc_loaded;
> +	u32 huc_version;

Same comments as with patch 2/3 (only 2x u16), anyway

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

-Michal

>  
>  	u32 nfence;
>  	u64 fence[I915_MAX_NUM_FENCES];
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 63f1b9606b57..d4a78b8317d6 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -634,6 +634,10 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
>  		err_printf(m, "GuC fw version: %d.%d\n",
>  			   error->guc_version >> 16,
>  			   error->guc_version & 0xffff);
> +		err_printf(m, "HuC loaded: %s\n", yesno(error->huc_loaded));
> +		err_printf(m, "HuC fw version: %d.%d\n",
> +			   error->huc_version >> 16,
> +			   error->huc_version & 0xffff);
>  	}
>  
>  	err_printf(m, "EIR: 0x%08x\n", error->eir);
> @@ -1602,12 +1606,19 @@ static void i915_capture_fw_state(struct drm_i915_private *dev_priv,
>  
>  	if (HAS_GUC(dev_priv)) {
>  		struct intel_guc *guc = &dev_priv->guc;
> +		struct intel_huc *huc = &dev_priv->huc;
>  
>  		error->guc_loaded =
>  			(guc->fw.load_status == INTEL_UC_FIRMWARE_SUCCESS);
>  		error->guc_version =
>  			(guc->fw.major_ver_found << 16 |
>  			 guc->fw.minor_ver_found);
> +
> +		error->huc_loaded =
> +			(huc->fw.load_status == INTEL_UC_FIRMWARE_SUCCESS);
> +		error->huc_version =
> +			(huc->fw.major_ver_found << 16 |
> +			 huc->fw.minor_ver_found);
>  	}
>  }
>  
> -- 
> 2.11.0
> 
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Re: [PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[Michal Wajdeczko]

On Fri, Feb 24, 2017 at 11:05:28AM -0800, Michel Thierry wrote:
> The firmware may change between the hang and cat /sys/class/drm/card0/error
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

-Michal
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Re: [PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[Chris Wilson]

On Fri, Feb 24, 2017 at 11:05:28AM -0800, Michel Thierry wrote:
> The firmware may change between the hang and cat /sys/class/drm/card0/error
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>

Looks sane...

> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  4 ++++
>  drivers/gpu/drm/i915/i915_gpu_error.c | 22 ++++++++++++++++------
>  2 files changed, 20 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a74b87b1b5a9..3b0cff05f5f7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -953,6 +953,10 @@ struct i915_gpu_state {
>  	u32 gab_ctl;
>  	u32 gfx_mode;
>  
> +	/* Firmware load state */
> +	u32 dmc_loaded;

Can dmc_version be zero? i.e. Does !0 => dmc_loaded?

> +	u32 dmc_version;

-- 
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Re: [PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[Michel Thierry]

On 2/24/2017 11:22 AM, Chris Wilson wrote:
> On Fri, Feb 24, 2017 at 11:05:28AM -0800, Michel Thierry wrote:
>> The firmware may change between the hang and cat /sys/class/drm/card0/error
>>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>
> Looks sane...
>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h       |  4 ++++
>>  drivers/gpu/drm/i915/i915_gpu_error.c | 22 ++++++++++++++++------
>>  2 files changed, 20 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index a74b87b1b5a9..3b0cff05f5f7 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -953,6 +953,10 @@ struct i915_gpu_state {
>>  	u32 gab_ctl;
>>  	u32 gfx_mode;
>>
>> +	/* Firmware load state */
>> +	u32 dmc_loaded;
>
> Can dmc_version be zero? i.e. Does !0 => dmc_loaded?
>

Nothing would stop them to build a v0.0 firmware, but in this case, we 
can save one variable.
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Re: [PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[Chris Wilson]

On Fri, Feb 24, 2017 at 11:25:29AM -0800, Michel Thierry wrote:
> On 2/24/2017 11:22 AM, Chris Wilson wrote:
> >On Fri, Feb 24, 2017 at 11:05:28AM -0800, Michel Thierry wrote:
> >>The firmware may change between the hang and cat /sys/class/drm/card0/error
> >>
> >>Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >>Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> >
> >Looks sane...
> >
> >>---
> >> drivers/gpu/drm/i915/i915_drv.h       |  4 ++++
> >> drivers/gpu/drm/i915/i915_gpu_error.c | 22 ++++++++++++++++------
> >> 2 files changed, 20 insertions(+), 6 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >>index a74b87b1b5a9..3b0cff05f5f7 100644
> >>--- a/drivers/gpu/drm/i915/i915_drv.h
> >>+++ b/drivers/gpu/drm/i915/i915_drv.h
> >>@@ -953,6 +953,10 @@ struct i915_gpu_state {
> >> 	u32 gab_ctl;
> >> 	u32 gfx_mode;
> >>
> >>+	/* Firmware load state */
> >>+	u32 dmc_loaded;
> >
> >Can dmc_version be zero? i.e. Does !0 => dmc_loaded?
> >
> 
> Nothing would stop them to build a v0.0 firmware, but in this case,
> we can save one variable.

On the other guc thread, the suggestion is to use 0 as an invalid
version...
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: [PATCH 1/3] drm/i915: Capture dmc firmware information before reset

[Michel Thierry]

On 2/24/2017 11:34 AM, Chris Wilson wrote:
> On Fri, Feb 24, 2017 at 11:25:29AM -0800, Michel Thierry wrote:
>> On 2/24/2017 11:22 AM, Chris Wilson wrote:
>>> On Fri, Feb 24, 2017 at 11:05:28AM -0800, Michel Thierry wrote:
>>>> The firmware may change between the hang and cat /sys/class/drm/card0/error
>>>>
>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>>>
>>> Looks sane...
>>>
>>>> ---
>>>> drivers/gpu/drm/i915/i915_drv.h       |  4 ++++
>>>> drivers/gpu/drm/i915/i915_gpu_error.c | 22 ++++++++++++++++------
>>>> 2 files changed, 20 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>>> index a74b87b1b5a9..3b0cff05f5f7 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>> @@ -953,6 +953,10 @@ struct i915_gpu_state {
>>>> 	u32 gab_ctl;
>>>> 	u32 gfx_mode;
>>>>
>>>> +	/* Firmware load state */
>>>> +	u32 dmc_loaded;
>>>
>>> Can dmc_version be zero? i.e. Does !0 => dmc_loaded?
>>>
>>
>> Nothing would stop them to build a v0.0 firmware, but in this case,
>> we can save one variable.
>
> On the other guc thread, the suggestion is to use 0 as an invalid
> version...
> -Chris
>
ok, let's go with that, I'll remove *_loaded.
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✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Capture dmc firmware information before reset

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Capture dmc firmware information before reset
URL   : https://patchwork.freedesktop.org/series/20220/
State : success

== Summary ==

Series 20220v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/20220/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
fi-bxt-t5700     total:108  pass:95   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50 
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17 
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18 
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29 

9243ada504db810aa40b0e8f5e00d46871c78149 drm-tip: 2017y-02m-24d-17h-52m-18s UTC integration manifest
4325c98 drm/i915: Include HuC fw version in error state
c03914e drm/i915: Include GuC fw version in error state
1123b62 drm/i915: Capture dmc firmware information before reset

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3964/
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