From: Eric Anholt <eric@anholt.net>
To: Jesse Barnes <jbarnes@virtuousgeek.org>Jesse Barnes
<jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: RFC: i915 arch changes to better support new chipsets
Date: Wed, 28 Mar 2012 12:35:53 -0700 [thread overview]
Message-ID: <871uocldra.fsf@eliezer.anholt.net> (raw)
In-Reply-To: <20120321134121.6eef8b74@jbarnes-desktop>
[-- Attachment #1.1: Type: text/plain, Size: 1503 bytes --]
On Wed, 21 Mar 2012 13:41:21 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> On Tue, 20 Mar 2012 13:13:47 -0700
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > > > I'm open to suggestions on how to fix i915_reg.h; it's becoming quite a
> > > > beast. Our goal to be to make it easy to add new definitions while
> > > > also making it easy to not accidentally use old an incorrect
> > > > definitions on a new platform.
> > >
> > > Close your eyes and just keep on adding gunk. Imo i915_reg.h is pretty
> > > much a write-once file, and cscope can still keep up with the definitions.
> > > So not a pain point for me.
>
> Oh I forgot the most important thing here: how many f*cking places do
> we need to add PCI IDs??!!
>
> I'd really really like to see i915_reg.h shared to libdrm and used
> directly by intel-gpu-tools and Mesa if at all possible, whether we
> split it or not. The IS_* and HAS_* macros should be in there as well,
> with the PCI IDs, then we can just add this stuff in one place...
So, I was thinking about this, but the problem I see is that if we
settle on the PCI ID/gen-number identifier being in libdrm, then some
distro pulls a new libdrm with hsw bits, and ships the rest of old
userland that happily initializes and spits ivb packets at it.
I guess we could have the gen-number stuff be a union of
IS_IVB()/IS_HSW()/IS_VLV(), and switch chipset probing to using each of
those instead of just gen >= 4.
Does this sound sane?
[-- Attachment #1.2: Type: application/pgp-signature, Size: 197 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2012-03-28 19:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-20 18:13 RFC: i915 arch changes to better support new chipsets Jesse Barnes
2012-03-20 18:43 ` Daniel Vetter
2012-03-20 20:13 ` Jesse Barnes
2012-03-21 11:42 ` Eugeni Dodonov
2012-03-21 11:58 ` Chris Wilson
2012-03-21 20:41 ` Jesse Barnes
2012-03-28 19:35 ` Eric Anholt [this message]
2012-03-28 19:46 ` Jesse Barnes
2012-03-28 19:59 ` Eugeni Dodonov
2012-03-28 20:29 ` Eric Anholt
2012-03-28 20:37 ` Daniel Vetter
2012-03-29 1:02 ` Eugeni Dodonov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=871uocldra.fsf@eliezer.anholt.net \
--to=eric@anholt.net \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jbarnes@virtuousgeek.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox