From: Jani Nikula <jani.nikula@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: move rawclk init to intel_cdclk_init()
Date: Mon, 27 May 2024 21:16:20 +0300 [thread overview]
Message-ID: <874jajm87f.fsf@intel.com> (raw)
In-Reply-To: <ZhQrvAjDK_H-9Af4@intel.com>
On Mon, 08 Apr 2024, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Mon, Apr 08, 2024 at 08:28:27PM +0300, Ville Syrjälä wrote:
>> On Mon, Apr 08, 2024 at 08:23:14PM +0300, Jani Nikula wrote:
>> > The rawclk initialization is a bit out of place in
>> > intel_device_info_runtime_init(). Move it to intel_cdclk_init(), with a
>> > bit of refactoring on intel_read_rawclk().
>>
>> rawclk is used outside of display.
>
> The correct solution would likely be to extract a
> i9xx_fsb_freq(), and use that to populate both rawclk_freq
> and fsb_freq (and switch over to fsb_freq in the
> non-display code).
I circled back to this, and PNV seems to be the problem case for making
this happen.
pnv_detect_mem_freq() in intel_dram.c and i9xx_hrawclk() in
intel_cdclk.c interpret the CLKCFG register slightly differently.
I'm presuming PNV only supports a subset of the values covered by
i9xx_hrawclk(). For IS_MOBILE() they all match, but for !IS_MOBILE()
there's a different value for 400 MHz FSB.
So how should desktop PNV interpret the register, I wonder? I can't find
any specs on that anymore.
BR,
Jani.
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-05-27 18:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-08 17:23 [PATCH 1/2] drm/i915: move rawclk init to intel_cdclk_init() Jani Nikula
2024-04-08 17:23 ` [PATCH 2/2] drm/i915: move rawclk from runtime to display runtime info Jani Nikula
2024-04-08 17:28 ` [PATCH 1/2] drm/i915: move rawclk init to intel_cdclk_init() Ville Syrjälä
2024-04-08 17:39 ` Ville Syrjälä
2024-05-27 18:16 ` Jani Nikula [this message]
2024-05-27 18:25 ` Jani Nikula
2024-04-08 22:02 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork
2024-04-08 22:15 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-05-27 18:36 ` ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915: move rawclk init to intel_cdclk_init() (rev2) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=874jajm87f.fsf@intel.com \
--to=jani.nikula@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox