From: Jani Nikula <jani.nikula@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers
Date: Thu, 14 Oct 2021 17:07:16 +0300 [thread overview]
Message-ID: <874k9jwvhn.fsf@intel.com> (raw)
In-Reply-To: <20211007203517.3364336-2-imre.deak@intel.com>
On Thu, 07 Oct 2021, Imre Deak <imre.deak@intel.com> wrote:
> Add a table describing all the framebuffer modifiers used by i915 at one
> place. This has the benefit of deduplicating the listing of supported
> modifiers for each platform and checking the support of these modifiers
> on a given plane. This also simplifies in a similar way getting some
> attribute for a modifier, for instance checking if the modifier is a
> CCS modifier type.
Just some high level comments inline.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cursor.c | 19 +-
> .../drm/i915/display/intel_display_types.h | 1 -
> drivers/gpu/drm/i915/display/intel_fb.c | 178 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_fb.h | 8 +
> drivers/gpu/drm/i915/display/intel_sprite.c | 35 +---
> drivers/gpu/drm/i915/display/skl_scaler.c | 1 +
> .../drm/i915/display/skl_universal_plane.c | 137 +-------------
> drivers/gpu/drm/i915/i915_drv.h | 3 +
> 8 files changed, 218 insertions(+), 164 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index f6dcb5aa63f64..bcd44ff30ce5b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
> DRM_FORMAT_ARGB8888,
> };
>
> -static const u64 cursor_format_modifiers[] = {
> - DRM_FORMAT_MOD_LINEAR,
> - DRM_FORMAT_MOD_INVALID
> -};
> -
> static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
> {
> struct drm_i915_private *dev_priv =
> @@ -605,8 +600,10 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
> static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
> u32 format, u64 modifier)
> {
> - return modifier == DRM_FORMAT_MOD_LINEAR &&
> - format == DRM_FORMAT_ARGB8888;
> + if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
> + return false;
> +
> + return format == DRM_FORMAT_ARGB8888;
> }
>
> static int
> @@ -754,6 +751,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
> {
> struct intel_plane *cursor;
> int ret, zpos;
> + u64 *modifiers;
>
> cursor = intel_plane_alloc();
> if (IS_ERR(cursor))
> @@ -784,13 +782,18 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
> if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
> cursor->cursor.size = ~0;
>
> + modifiers = intel_fb_plane_get_modifiers(dev_priv, pipe, cursor->id);
> +
> ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
> 0, &intel_cursor_plane_funcs,
> intel_cursor_formats,
> ARRAY_SIZE(intel_cursor_formats),
> - cursor_format_modifiers,
> + modifiers,
> DRM_PLANE_TYPE_CURSOR,
> "cursor %c", pipe_name(pipe));
> +
> + kfree(modifiers);
> +
> if (ret)
> goto fail;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 21ce8bccc645a..bb53b01f07aee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1336,7 +1336,6 @@ struct intel_plane {
> enum plane_id id;
> enum pipe pipe;
> bool has_fbc;
> - bool has_ccs;
> bool need_async_flip_disable_wa;
> u32 frontbuffer_bit;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index fa1f375e696bf..aefae988b620b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -13,6 +13,184 @@
>
> #define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= ARRAY_SIZE(a))
>
> +const struct intel_modifier_desc {
static?
Maybe split the struct declaration and the array definition for
clarity. *shrug*
> + u64 id;
> + u64 display_versions;
> +
> + struct {
> +#define INTEL_CCS_RC BIT(0)
> +#define INTEL_CCS_RC_CC BIT(1)
> +#define INTEL_CCS_MC BIT(2)
> +
> +#define INTEL_CCS_ANY (INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)
> + u8 type:3;
> + } ccs;
> +} intel_modifiers[] = {
> + {
> + .id = DRM_FORMAT_MOD_LINEAR,
> + .display_versions = DISPLAY_VER_MASK_ALL,
What is this going to look like when display version mask isn't fine
grained enough to cover all the platforms? Do we have cases like that
already?
[snip]
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 12256218634f4..a92228c922a54 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1342,6 +1342,9 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
> #define DISPLAY_VER(i915) (INTEL_INFO(i915)->display.ver)
> #define IS_DISPLAY_VER(i915, from, until) \
> (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
> +#define DISPLAY_VER_BIT(d) BIT_ULL(d)
> +#define DISPLAY_VER_MASK(f, u) GENMASK_ULL(u, f)
> +#define DISPLAY_VER_MASK_ALL DISPLAY_VER_MASK(0, BITS_PER_LONG_LONG - 1)
Do we want to promote this usage all over the place? Maybe keep them
internal to intel_fb.c?
Or just add both from and until members in intel_modifier_desc, and use
the regular IS_DISPLAY_VER() in intel_fb.c as well. It's not worse
considering the mask you have is u64. You could have two u8's
instead. You could consider 0 for either to mean "no limit", and skip
the initialization instead of duplicating .display_versions =
DISPLAY_VER_MASK_ALL.
I think I'd prefer that. Or do you see masks with gaps in them?
BR,
Jani.
>
> #define INTEL_REVID(dev_priv) (to_pci_dev((dev_priv)->drm.dev)->revision)
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2021-10-14 14:07 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-07 20:35 [Intel-gfx] [PATCH 00/11] drm/i915: Simplify handling of modifiers Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers Imre Deak
2021-10-07 21:10 ` Ville Syrjälä
2021-10-07 21:26 ` Imre Deak
2021-10-07 21:32 ` Ville Syrjälä
2021-10-07 22:00 ` Imre Deak
2021-10-08 9:41 ` Ville Syrjälä
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-13 20:14 ` Ville Syrjälä
2021-10-13 21:01 ` Imre Deak
2021-10-13 21:34 ` Ville Syrjälä
2021-10-13 20:40 ` Ville Syrjälä
2021-10-14 10:07 ` Imre Deak
2021-10-14 14:07 ` Jani Nikula [this message]
2021-10-14 14:16 ` [Intel-gfx] [PATCH " Jani Nikula
2021-10-14 15:03 ` Imre Deak
2021-10-14 15:48 ` Jani Nikula
2021-10-07 20:35 ` [Intel-gfx] [PATCH 02/11] drm/i915: Move intel_get_format_info() to intel_fb.c Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-13 20:17 ` Ville Syrjälä
2021-10-13 21:06 ` Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 03/11] drm/i915: Add tiling attribute to the modifier descriptor Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-13 20:18 ` [Intel-gfx] [PATCH " Ville Syrjälä
2021-10-13 21:08 ` Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 04/11] drm/i915: Simplify the modifier check for interlaced scanout support Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 05/11] drm/i915: Unexport is_semiplanar_uv_plane() Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 06/11] drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.c Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 07/11] drm/i915: Add a platform independent way to get the RC CCS CC plane Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 08/11] drm/i915: Handle CCS CC planes separately from CCS control planes Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 09/11] drm/i915: Add a platform independent way to check for " Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-13 20:27 ` [Intel-gfx] [PATCH " Ville Syrjälä
2021-10-13 20:45 ` Ville Syrjälä
2021-10-13 21:32 ` Imre Deak
2021-10-13 21:54 ` Ville Syrjälä
2021-10-13 22:28 ` Imre Deak
2021-10-13 22:38 ` Ville Syrjälä
2021-10-14 10:10 ` Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 10/11] drm/i915: Move is_ccs_modifier() to intel_fb.c Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-07 20:35 ` [Intel-gfx] [PATCH 11/11] drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers Imre Deak
2021-10-08 0:19 ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-10-07 21:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Simplify handling of modifiers Patchwork
2021-10-07 21:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-07 21:50 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-08 0:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Simplify handling of modifiers (rev9) Patchwork
2021-10-08 0:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-08 1:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-08 2:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-13 19:41 ` [Intel-gfx] [PATCH 00/11] drm/i915: Simplify handling of modifiers Juha-Pekka Heikkila
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=874k9jwvhn.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox