* [PATCH v4 0/7] Add xe3lpd edp enabling
@ 2024-10-18 20:03 Matt Atwood
2024-10-18 20:03 ` [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming Matt Atwood
` (10 more replies)
0 siblings, 11 replies; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Matt Atwood
This series defines the xe3lpd definition, which is functionally
identical to the xe2lpd definition for now. This series then adds
additional requirements mostly for edp output of display through type c.
Additional patches will be required for display and will follow.
v2: cdclk table update, multiple patches have macros changed from
functions to multiple platform specific paths. Several commit messages
and subjects changed to be more accurate. PM demand patch changed to
accurately reflect minimum number of pips.
v3: updates to "drm/i915/xe3lpd: Add check to see if edp over type c is
allowed", "drm/i915/xe3lpd: Add new bit range of MAX swing setup",
"drm/i915/xe3lpd: Add C20 Phy consolidated programming table",
"drm/i915/xe3lpd: Include hblank restriction for xe3lpd",
"drm/i915/xe3lpd: Add cdclk changes", "drm/i915/xe3lpd: Update pmdemand
programming".
v4: updates to "drm/i915/xe3lpd: Update pmdemand programming",
"drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3", "drm/i915/xe3lpd:
Add new bit range of MAX swing setup"
Matt Roper (1):
drm/i915/xe3lpd: Update pmdemand programming
Radhakrishna Sripada (1):
drm/i915/xe3lpd: Add cdclk changes
Suraj Kandpal (5):
drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
drm/i915/xe3lpd: Add C20 Phy consolidated programming table
drm/i915/xe3lpd: Add new bit range of MAX swing setup
drm/i915/xe3lpd: Add check to see if edp over type c is allowed
drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG
drivers/gpu/drm/i915/display/intel_cdclk.c | 59 +++++++++++++++-
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 33 +++++++--
.../drm/i915/display/intel_display_device.c | 4 ++
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++-
drivers/gpu/drm/i915/display/intel_dp.h | 5 ++
drivers/gpu/drm/i915/display/intel_hdcp.c | 10 ++-
drivers/gpu/drm/i915/display/intel_pmdemand.c | 68 +++++++++++++------
drivers/gpu/drm/i915/display/intel_pmdemand.h | 4 +-
drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 5 ++
11 files changed, 172 insertions(+), 36 deletions(-)
--
2.45.0
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-21 12:41 ` Gustavo Sousa
2024-10-18 20:03 ` [PATCH v4 2/7] drm/i915/xe3lpd: Add cdclk changes Matt Atwood
` (9 subsequent siblings)
10 siblings, 1 reply; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Matt Roper, Matt Atwood
From: Matt Roper <matthew.d.roper@intel.com>
There are some minor changes to pmdemand handling on Xe3:
- Active scalers are no longer tracked. We can simply skip the readout
and programming of this field.
- Active dbuf slices are no longer tracked. We should skip the readout
and programming of this field and also make sure that it stays 0 in
our software bookkeeping so that we won't erroneously return true
from intel_pmdemand_needs_update() due to mismatches.
- Even though there aren't enough pipes to utilize them, the size of
the 'active pipes' field has expanded to four bits, taking over the
register bits previously used for dbuf slices. Since the lower bits
of the mask have moved, we need to update our reads/writes to handle
this properly.
v2: active pipes is no longer always max 3, add in the ability to go to
4 for PTL.
v3: use intel_display for display_ver check, use INTEL_NUM_PIPES
v4: add a conditional for number of pipes macro vs using 3.
Bspec: 68883, 69125
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
drivers/gpu/drm/i915/display/intel_pmdemand.c | 68 +++++++++++++------
drivers/gpu/drm/i915/display/intel_pmdemand.h | 4 +-
drivers/gpu/drm/i915/i915_reg.h | 1 +
3 files changed, 50 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
index ceaf9e3147da..7cda674fa851 100644
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
@@ -258,6 +258,7 @@ intel_pmdemand_connector_needs_update(struct intel_atomic_state *state)
static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
const struct intel_bw_state *new_bw_state, *old_bw_state;
const struct intel_cdclk_state *new_cdclk_state, *old_cdclk_state;
const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
@@ -274,12 +275,16 @@ static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
if (new_dbuf_state &&
- (new_dbuf_state->active_pipes !=
- old_dbuf_state->active_pipes ||
- new_dbuf_state->enabled_slices !=
- old_dbuf_state->enabled_slices))
+ new_dbuf_state->active_pipes != old_dbuf_state->active_pipes)
return true;
+ if (DISPLAY_VER(display) < 30) {
+ if (new_dbuf_state &&
+ new_dbuf_state->enabled_slices !=
+ old_dbuf_state->enabled_slices)
+ return true;
+ }
+
new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
old_cdclk_state = intel_atomic_get_old_cdclk_state(state);
if (new_cdclk_state &&
@@ -327,10 +332,15 @@ int intel_pmdemand_atomic_check(struct intel_atomic_state *state)
if (IS_ERR(new_dbuf_state))
return PTR_ERR(new_dbuf_state);
- new_pmdemand_state->params.active_pipes =
- min_t(u8, hweight8(new_dbuf_state->active_pipes), 3);
- new_pmdemand_state->params.active_dbufs =
- min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3);
+ if (DISPLAY_VER(i915) < 30) {
+ new_pmdemand_state->params.active_dbufs =
+ min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3);
+ new_pmdemand_state->params.active_pipes =
+ min_t(u8, hweight8(new_dbuf_state->active_pipes), INTEL_NUM_PIPES(i915));
+ }
+ else
+ new_pmdemand_state->params.active_pipes =
+ min_t(u8, hweight8(new_dbuf_state->active_pipes), 3);
new_cdclk_state = intel_atomic_get_cdclk_state(state);
if (IS_ERR(new_cdclk_state))
@@ -395,27 +405,32 @@ intel_pmdemand_init_pmdemand_params(struct drm_i915_private *i915,
reg2 = intel_de_read(i915, XELPDP_INITIATE_PMDEMAND_REQUEST(1));
- /* Set 1*/
pmdemand_state->params.qclk_gv_bw =
REG_FIELD_GET(XELPDP_PMDEMAND_QCLK_GV_BW_MASK, reg1);
pmdemand_state->params.voltage_index =
REG_FIELD_GET(XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK, reg1);
pmdemand_state->params.qclk_gv_index =
REG_FIELD_GET(XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK, reg1);
- pmdemand_state->params.active_pipes =
- REG_FIELD_GET(XELPDP_PMDEMAND_PIPES_MASK, reg1);
- pmdemand_state->params.active_dbufs =
- REG_FIELD_GET(XELPDP_PMDEMAND_DBUFS_MASK, reg1);
pmdemand_state->params.active_phys =
REG_FIELD_GET(XELPDP_PMDEMAND_PHYS_MASK, reg1);
- /* Set 2*/
pmdemand_state->params.cdclk_freq_mhz =
REG_FIELD_GET(XELPDP_PMDEMAND_CDCLK_FREQ_MASK, reg2);
pmdemand_state->params.ddiclk_max =
REG_FIELD_GET(XELPDP_PMDEMAND_DDICLK_FREQ_MASK, reg2);
- pmdemand_state->params.scalers =
- REG_FIELD_GET(XELPDP_PMDEMAND_SCALERS_MASK, reg2);
+
+ if (DISPLAY_VER(i915) >= 30) {
+ pmdemand_state->params.active_pipes =
+ REG_FIELD_GET(XE3_PMDEMAND_PIPES_MASK, reg1);
+ } else {
+ pmdemand_state->params.active_pipes =
+ REG_FIELD_GET(XELPDP_PMDEMAND_PIPES_MASK, reg1);
+ pmdemand_state->params.active_dbufs =
+ REG_FIELD_GET(XELPDP_PMDEMAND_DBUFS_MASK, reg1);
+
+ pmdemand_state->params.scalers =
+ REG_FIELD_GET(XELPDP_PMDEMAND_SCALERS_MASK, reg2);
+ }
unlock:
mutex_unlock(&i915->display.pmdemand.lock);
@@ -442,6 +457,10 @@ void intel_pmdemand_program_dbuf(struct drm_i915_private *i915,
{
u32 dbufs = min_t(u32, hweight8(dbuf_slices), 3);
+ /* PM Demand only tracks active dbufs on pre-Xe3 platforms */
+ if (DISPLAY_VER(i915) >= 30)
+ return;
+
mutex_lock(&i915->display.pmdemand.lock);
if (drm_WARN_ON(&i915->drm,
!intel_pmdemand_check_prev_transaction(i915)))
@@ -460,7 +479,8 @@ void intel_pmdemand_program_dbuf(struct drm_i915_private *i915,
}
static void
-intel_pmdemand_update_params(const struct intel_pmdemand_state *new,
+intel_pmdemand_update_params(struct drm_i915_private *i915,
+ const struct intel_pmdemand_state *new,
const struct intel_pmdemand_state *old,
u32 *reg1, u32 *reg2, bool serialized)
{
@@ -495,16 +515,22 @@ intel_pmdemand_update_params(const struct intel_pmdemand_state *new,
update_reg(reg1, qclk_gv_bw, XELPDP_PMDEMAND_QCLK_GV_BW_MASK);
update_reg(reg1, voltage_index, XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK);
update_reg(reg1, qclk_gv_index, XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK);
- update_reg(reg1, active_pipes, XELPDP_PMDEMAND_PIPES_MASK);
- update_reg(reg1, active_dbufs, XELPDP_PMDEMAND_DBUFS_MASK);
update_reg(reg1, active_phys, XELPDP_PMDEMAND_PHYS_MASK);
/* Set 2*/
update_reg(reg2, cdclk_freq_mhz, XELPDP_PMDEMAND_CDCLK_FREQ_MASK);
update_reg(reg2, ddiclk_max, XELPDP_PMDEMAND_DDICLK_FREQ_MASK);
- update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK);
update_reg(reg2, plls, XELPDP_PMDEMAND_PLLS_MASK);
+ if (DISPLAY_VER(i915) >= 30) {
+ update_reg(reg1, active_pipes, XE3_PMDEMAND_PIPES_MASK);
+ } else {
+ update_reg(reg1, active_pipes, XELPDP_PMDEMAND_PIPES_MASK);
+ update_reg(reg1, active_dbufs, XELPDP_PMDEMAND_DBUFS_MASK);
+
+ update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK);
+ }
+
#undef update_reg
}
@@ -529,7 +555,7 @@ intel_pmdemand_program_params(struct drm_i915_private *i915,
reg2 = intel_de_read(i915, XELPDP_INITIATE_PMDEMAND_REQUEST(1));
mod_reg2 = reg2;
- intel_pmdemand_update_params(new, old, &mod_reg1, &mod_reg2,
+ intel_pmdemand_update_params(i915, new, old, &mod_reg1, &mod_reg2,
serialized);
if (reg1 != mod_reg1) {
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.h b/drivers/gpu/drm/i915/display/intel_pmdemand.h
index 128fd61f8f14..a1c49efdc493 100644
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.h
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.h
@@ -20,14 +20,14 @@ struct pmdemand_params {
u8 voltage_index;
u8 qclk_gv_index;
u8 active_pipes;
- u8 active_dbufs;
+ u8 active_dbufs; /* pre-Xe3 only */
/* Total number of non type C active phys from active_phys_mask */
u8 active_phys;
u8 plls;
u16 cdclk_freq_mhz;
/* max from ddi_clocks[] */
u16 ddiclk_max;
- u8 scalers;
+ u8 scalers; /* pre-Xe3 only */
};
struct intel_pmdemand_state {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 405f409e9761..89e4381f8baa 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2696,6 +2696,7 @@
#define XELPDP_PMDEMAND_QCLK_GV_BW_MASK REG_GENMASK(31, 16)
#define XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK REG_GENMASK(14, 12)
#define XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK REG_GENMASK(11, 8)
+#define XE3_PMDEMAND_PIPES_MASK REG_GENMASK(7, 4)
#define XELPDP_PMDEMAND_PIPES_MASK REG_GENMASK(7, 6)
#define XELPDP_PMDEMAND_DBUFS_MASK REG_GENMASK(5, 4)
#define XELPDP_PMDEMAND_PHYS_MASK REG_GENMASK(2, 0)
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 2/7] drm/i915/xe3lpd: Add cdclk changes
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
2024-10-18 20:03 ` [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-21 12:49 ` Gustavo Sousa
2024-10-18 20:03 ` [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Matt Atwood
` (8 subsequent siblings)
10 siblings, 1 reply; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Radhakrishna Sripada, Matt Atwood, Matt Roper
From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Xe3_LPD has new max cdclk of 691200 which requires reusing the lnl table
and modify/add higher frequencies. Updating the max cdclk supported by
the platform and voltage_level determination is also updated.
There are minor changes in cdclk programming sequence compared to lnl,
where programming cd2x divider needs to be skipped. This is already handled
by the calculations in existing code.
v2: update tables
v3: xe3lpd doesnt supply the power control unit the voltage index
Bspec: 68861, 68863, 68864
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 59 +++++++++++++++++++++-
1 file changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index fa1c2012b10c..96523526a2c3 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1468,6 +1468,39 @@ static const struct intel_cdclk_vals xe2hpd_cdclk_table[] = {
{}
};
+static const struct intel_cdclk_vals xe3lpd_cdclk_table[] = {
+ { .refclk = 38400, .cdclk = 153600, .ratio = 16, .waveform = 0xaaaa },
+ { .refclk = 38400, .cdclk = 172800, .ratio = 16, .waveform = 0xad5a },
+ { .refclk = 38400, .cdclk = 192000, .ratio = 16, .waveform = 0xb6b6 },
+ { .refclk = 38400, .cdclk = 211200, .ratio = 16, .waveform = 0xdbb6 },
+ { .refclk = 38400, .cdclk = 230400, .ratio = 16, .waveform = 0xeeee },
+ { .refclk = 38400, .cdclk = 249600, .ratio = 16, .waveform = 0xf7de },
+ { .refclk = 38400, .cdclk = 268800, .ratio = 16, .waveform = 0xfefe },
+ { .refclk = 38400, .cdclk = 288000, .ratio = 16, .waveform = 0xfffe },
+ { .refclk = 38400, .cdclk = 307200, .ratio = 16, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 326400, .ratio = 17, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 345600, .ratio = 18, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 364800, .ratio = 19, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 384000, .ratio = 20, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 403200, .ratio = 21, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 422400, .ratio = 22, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 441600, .ratio = 23, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 460800, .ratio = 24, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 480000, .ratio = 25, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 499200, .ratio = 26, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 518400, .ratio = 27, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 537600, .ratio = 28, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 556800, .ratio = 29, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 576000, .ratio = 30, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 595200, .ratio = 31, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 614400, .ratio = 32, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 633600, .ratio = 33, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 672000, .ratio = 35, .waveform = 0xffff },
+ { .refclk = 38400, .cdclk = 691200, .ratio = 36, .waveform = 0xffff },
+ {}
+};
+
static const int cdclk_squash_len = 16;
static int cdclk_squash_divider(u16 waveform)
@@ -1594,6 +1627,16 @@ static u8 rplu_calc_voltage_level(int cdclk)
rplu_voltage_level_max_cdclk);
}
+static u8 xe3lpd_calc_voltage_level(int cdclk)
+{
+ /*
+ * Starting with xe3lpd power controller does not need the voltage
+ * index when doing the modeset update. This function is best left
+ * defined but returning 0 to the mask.
+ */
+ return 0;
+}
+
static void icl_readout_refclk(struct intel_display *display,
struct intel_cdclk_config *cdclk_config)
{
@@ -3437,7 +3480,9 @@ void intel_update_max_cdclk(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
- if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) {
+ if (DISPLAY_VER(display) >= 30) {
+ display->cdclk.max_cdclk_freq = 691200;
+ } else if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) {
if (display->cdclk.hw.ref == 24000)
display->cdclk.max_cdclk_freq = 552000;
else
@@ -3650,6 +3695,13 @@ void intel_cdclk_debugfs_register(struct intel_display *display)
display, &i915_cdclk_info_fops);
}
+static const struct intel_cdclk_funcs xe3lpd_cdclk_funcs = {
+ .get_cdclk = bxt_get_cdclk,
+ .set_cdclk = bxt_set_cdclk,
+ .modeset_calc_cdclk = bxt_modeset_calc_cdclk,
+ .calc_voltage_level = xe3lpd_calc_voltage_level,
+};
+
static const struct intel_cdclk_funcs rplu_cdclk_funcs = {
.get_cdclk = bxt_get_cdclk,
.set_cdclk = bxt_set_cdclk,
@@ -3794,7 +3846,10 @@ void intel_init_cdclk_hooks(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
- if (DISPLAY_VER(display) >= 20) {
+ if (DISPLAY_VER(display) >= 30) {
+ display->funcs.cdclk = &xe3lpd_cdclk_funcs;
+ display->cdclk.table = xe3lpd_cdclk_table;
+ } else if (DISPLAY_VER(display) >= 20) {
display->funcs.cdclk = &rplu_cdclk_funcs;
display->cdclk.table = xe2lpd_cdclk_table;
} else if (DISPLAY_VER_FULL(display) >= IP_VER(14, 1)) {
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
2024-10-18 20:03 ` [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming Matt Atwood
2024-10-18 20:03 ` [PATCH v4 2/7] drm/i915/xe3lpd: Add cdclk changes Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-23 17:52 ` Matt Roper
2024-10-18 20:03 ` [PATCH v4 4/7] drm/i915/xe3lpd: Add C20 Phy consolidated programming table Matt Atwood
` (7 subsequent siblings)
10 siblings, 1 reply; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Suraj Kandpal, Matt Atwood
From: Suraj Kandpal <suraj.kandpal@intel.com>
We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
encoder.
v2: add additional definition instead of function, commit message typo
fix and update.
v3: restore lost conditional from v2.
v4: subject line and subject message updated, fix the if ladder order,
fix the bit definition order.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ed6aa87403e2..70dfc9d4d6ac 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -43,14 +43,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
return;
if (DISPLAY_VER(display) >= 14) {
- if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0, STEP_FOREVER))
- intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp->cpu_transcoder),
- 0, HDCP_LINE_REKEY_DISABLE);
+ if (DISPLAY_VER(display) >= 30)
+ intel_de_rmw(display,
+ TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder),
+ 0, XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0, STEP_FOREVER) ||
IS_DISPLAY_VER_STEP(display, IP_VER(20, 0), STEP_B0, STEP_FOREVER))
intel_de_rmw(display,
TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder),
0, TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
+ else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0, STEP_FOREVER))
+ intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp->cpu_transcoder),
+ 0, HDCP_LINE_REKEY_DISABLE);
}
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 89e4381f8baa..8d758947f301 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3817,6 +3817,7 @@ enum skl_power_gate {
#define TRANS_DDI_PVSYNC (1 << 17)
#define TRANS_DDI_PHSYNC (1 << 16)
#define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
+#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
#define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
#define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
#define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 4/7] drm/i915/xe3lpd: Add C20 Phy consolidated programming table
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (2 preceding siblings ...)
2024-10-18 20:03 ` [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-18 20:03 ` [PATCH v4 5/7] drm/i915/xe3lpd: Add new bit range of MAX swing setup Matt Atwood
` (6 subsequent siblings)
10 siblings, 0 replies; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Suraj Kandpal, Matt Atwood, Clint Taylor
From: Suraj Kandpal <suraj.kandpal@intel.com>
From DISPLAY_VER() >= 30 C20 PHY consolidated programming table of
DP and eDP been merged and now use the same rates and values. eDP
over TypeC has also been introduced.
Moreover it allows more granular and higher rates. Add new table to
represent this change.
Bspec: 68961
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 26 +++++++++++++++++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index f73d576fd99e..f878ef1a97ec 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -1122,6 +1122,22 @@ static const struct intel_c20pll_state * const xe2hpd_c20_dp_tables[] = {
NULL,
};
+static const struct intel_c20pll_state * const xe3lpd_c20_dp_edp_tables[] = {
+ &mtl_c20_dp_rbr,
+ &xe2hpd_c20_edp_r216,
+ &xe2hpd_c20_edp_r243,
+ &mtl_c20_dp_hbr1,
+ &xe2hpd_c20_edp_r324,
+ &xe2hpd_c20_edp_r432,
+ &mtl_c20_dp_hbr2,
+ &xe2hpd_c20_edp_r675,
+ &mtl_c20_dp_hbr3,
+ &mtl_c20_dp_uhbr10,
+ &xe2hpd_c20_dp_uhbr13_5,
+ &mtl_c20_dp_uhbr20,
+ NULL,
+};
+
/*
* HDMI link rates with 38.4 MHz reference clock.
*/
@@ -2242,10 +2258,14 @@ intel_c20_pll_tables_get(struct intel_crtc_state *crtc_state,
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
if (intel_crtc_has_dp_encoder(crtc_state)) {
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- return xe2hpd_c20_edp_tables;
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+ if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
+ return xe2hpd_c20_edp_tables;
+ }
- if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
+ if (DISPLAY_VER(i915) >= 30)
+ return xe3lpd_c20_dp_edp_tables;
+ else if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
return xe2hpd_c20_dp_tables;
else
return mtl_c20_dp_tables;
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 5/7] drm/i915/xe3lpd: Add new bit range of MAX swing setup
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (3 preceding siblings ...)
2024-10-18 20:03 ` [PATCH v4 4/7] drm/i915/xe3lpd: Add C20 Phy consolidated programming table Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-18 23:38 ` Matt Roper
2024-10-18 20:03 ` [PATCH v4 6/7] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Matt Atwood
` (5 subsequent siblings)
10 siblings, 1 reply; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Suraj Kandpal, Matt Atwood
From: Suraj Kandpal <suraj.kandpal@intel.com>
Add new bit range for Max PHY Swing Setup in PORT_ALPM_CTL
register for DISPLAY_VER >= 30.
v2: implement as two seperate macros instead of a single macro
v3: extend previous definition by 2 bits that were previously reserved
Bspec: 70277
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 0841242543ca..9ad7611506e8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -298,7 +298,7 @@
#define _PORT_ALPM_CTL_B 0x16fc2c
#define PORT_ALPM_CTL(port) _MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
#define PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(31)
-#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK REG_GENMASK(23, 20)
+#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK REG_GENMASK(25, 20)
#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
#define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK REG_GENMASK(19, 16)
#define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK, val)
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 6/7] drm/i915/xe3lpd: Add check to see if edp over type c is allowed
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (4 preceding siblings ...)
2024-10-18 20:03 ` [PATCH v4 5/7] drm/i915/xe3lpd: Add new bit range of MAX swing setup Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-21 12:22 ` Jani Nikula
2024-10-18 20:03 ` [PATCH v4 7/7] drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG Matt Atwood
` (4 subsequent siblings)
10 siblings, 1 reply; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Suraj Kandpal, Matt Atwood, Mika Kahola
From: Suraj Kandpal <suraj.kandpal@intel.com>
Read PICA register to see if edp over type C is possible and then
add the appropriate tables for it.
--v2
-remove bool from intel_encoder have it in runtime_info [Jani]
-initialize the bool in runtime_info init [Jani]
-dont abbreviate the bool [Jani]
Bspec: 68846
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4 ++++
.../gpu/drm/i915/display/intel_display_device.c | 4 ++++
.../gpu/drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp.h | 5 +++++
drivers/gpu/drm/i915/i915_reg.h | 3 +++
6 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index f878ef1a97ec..37c66b32325d 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2256,9 +2256,13 @@ intel_c20_pll_tables_get(struct intel_crtc_state *crtc_state,
struct intel_encoder *encoder)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(i915);
if (intel_crtc_has_dp_encoder(crtc_state)) {
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+ if (DISPLAY_VER(i915) >= 30 &&
+ display_runtime->edp_typec_support)
+ return xe3lpd_c20_dp_edp_tables;
if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
return xe2hpd_c20_edp_tables;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index aa22189e3853..8583c3529060 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -15,6 +15,7 @@
#include "intel_display_params.h"
#include "intel_display_power.h"
#include "intel_display_reg_defs.h"
+#include "intel_dp.h"
#include "intel_fbc.h"
#include "intel_step.h"
@@ -1685,6 +1686,9 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
}
}
+ if (DISPLAY_VER(i915) >= 30)
+ intel_dp_check_edp_typec_support(display, display_runtime);
+
display_runtime->rawclk_freq = intel_read_rawclk(display);
drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq);
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 071a36b51f79..410f8b33a8a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -232,6 +232,7 @@ struct intel_display_runtime_info {
bool has_hdcp;
bool has_dmc;
bool has_dsc;
+ bool edp_typec_support;
};
struct intel_display_device_info {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7e04913bc2ff..be21e2743801 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5571,6 +5571,16 @@ intel_dp_detect_sdp_caps(struct intel_dp *intel_dp)
drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
}
+void
+intel_dp_check_edp_typec_support(struct intel_display *display,
+ struct intel_display_runtime_info *display_runtime)
+{
+ u32 ret = 0;
+
+ ret = intel_de_read(display, PICA_PHY_CONFIG_CONTROL);
+ display_runtime->edp_typec_support = ret & EDP_ON_TYPEC;
+}
+
static int
intel_dp_detect(struct drm_connector *connector,
struct drm_modeset_acquire_ctx *ctx,
@@ -6440,10 +6450,11 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
if (_intel_dp_is_port_edp(dev_priv, intel_encoder->devdata, port)) {
/*
- * Currently we don't support eDP on TypeC ports, although in
- * theory it could work on TypeC legacy ports.
+ * Currently we don't support eDP on TypeC ports for DISPLAY_VER < 30,
+ * although in theory it could work on TypeC legacy ports.
*/
- drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder));
+ if (DISPLAY_VER(dev_priv) < 30)
+ drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder));
type = DRM_MODE_CONNECTOR_eDP;
intel_encoder->type = INTEL_OUTPUT_EDP;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 60baf4072dc9..c6a80c4e2166 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -20,6 +20,8 @@ struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
struct intel_digital_port;
+struct intel_display;
+struct intel_display_runtime_info;
struct intel_dp;
struct intel_encoder;
@@ -204,5 +206,8 @@ bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
u8 lane_count);
bool intel_dp_has_connector(struct intel_dp *intel_dp,
const struct drm_connector_state *conn_state);
+void
+intel_dp_check_edp_typec_support(struct intel_display *display,
+ struct intel_display_runtime_info *display_runtime);
#endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8d758947f301..2743a2dd0a3d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4575,4 +4575,7 @@ enum skl_power_gate {
#define MTL_MEDIA_GSI_BASE 0x380000
+#define PICA_PHY_CONFIG_CONTROL _MMIO(0x16FE68)
+#define EDP_ON_TYPEC REG_BIT(31)
+
#endif /* _I915_REG_H_ */
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 7/7] drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (5 preceding siblings ...)
2024-10-18 20:03 ` [PATCH v4 6/7] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Matt Atwood
@ 2024-10-18 20:03 ` Matt Atwood
2024-10-18 21:18 ` ✗ Fi.CI.CHECKPATCH: warning for Add xe3lpd edp enabling (rev4) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 23+ messages in thread
From: Matt Atwood @ 2024-10-18 20:03 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Suraj Kandpal, Matt Atwood, Mika Kahola
From: Suraj Kandpal <suraj.kandpal@intel.com>
Add condition for P2.PG power down value.
v2: change subject line to better match patch condition
Bspec: 74494
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 37c66b32325d..13a99f494680 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -3146,7 +3146,8 @@ static u8 cx0_power_control_disable_val(struct intel_encoder *encoder)
if (intel_encoder_is_c10phy(encoder))
return CX0_P2PG_STATE_DISABLE;
- if (IS_BATTLEMAGE(i915) && encoder->port == PORT_A)
+ if ((IS_BATTLEMAGE(i915) && encoder->port == PORT_A) ||
+ (DISPLAY_VER(i915) >= 30 && encoder->type == INTEL_OUTPUT_EDP))
return CX0_P2PG_STATE_DISABLE;
return CX0_P4PG_STATE_DISABLE;
--
2.45.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Add xe3lpd edp enabling (rev4)
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (6 preceding siblings ...)
2024-10-18 20:03 ` [PATCH v4 7/7] drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG Matt Atwood
@ 2024-10-18 21:18 ` Patchwork
2024-10-18 21:18 ` ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-10-18 21:18 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx
== Series Details ==
Series: Add xe3lpd edp enabling (rev4)
URL : https://patchwork.freedesktop.org/series/139731/
State : warning
== Summary ==
Error: dim checkpatch failed
a9981eac7be9 drm/i915/xe3lpd: Update pmdemand programming
-:75: ERROR:ELSE_AFTER_BRACE: else should follow close brace '}'
#75: FILE: drivers/gpu/drm/i915/display/intel_pmdemand.c:341:
+ }
+ else
total: 1 errors, 0 warnings, 0 checks, 161 lines checked
4df58ffb4efa drm/i915/xe3lpd: Add cdclk changes
-:15: WARNING:TYPO_SPELLING: 'doesnt' may be misspelled - perhaps 'doesn't'?
#15:
v3: xe3lpd doesnt supply the power control unit the voltage index
^^^^^^
total: 0 errors, 1 warnings, 0 checks, 89 lines checked
fa8e1f47015a drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
23bd5927d849 drm/i915/xe3lpd: Add C20 Phy consolidated programming table
5e14947e9214 drm/i915/xe3lpd: Add new bit range of MAX swing setup
-:9: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'?
#9:
v2: implement as two seperate macros instead of a single macro
^^^^^^^^
total: 0 errors, 1 warnings, 0 checks, 8 lines checked
be840fa05685 drm/i915/xe3lpd: Add check to see if edp over type c is allowed
ab3d3ff44b04 drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Add xe3lpd edp enabling (rev4)
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (7 preceding siblings ...)
2024-10-18 21:18 ` ✗ Fi.CI.CHECKPATCH: warning for Add xe3lpd edp enabling (rev4) Patchwork
@ 2024-10-18 21:18 ` Patchwork
2024-10-18 21:26 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-18 22:25 ` ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-10-18 21:18 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx
== Series Details ==
Series: Add xe3lpd edp enabling (rev4)
URL : https://patchwork.freedesktop.org/series/139731/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Fi.CI.BAT: success for Add xe3lpd edp enabling (rev4)
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (8 preceding siblings ...)
2024-10-18 21:18 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2024-10-18 21:26 ` Patchwork
2024-10-18 22:25 ` ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-10-18 21:26 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4680 bytes --]
== Series Details ==
Series: Add xe3lpd edp enabling (rev4)
URL : https://patchwork.freedesktop.org/series/139731/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15562 -> Patchwork_139731v4
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/index.html
Participating hosts (41 -> 40)
------------------------------
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_139731v4 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@load:
- bat-adlp-6: [PASS][1] -> [DMESG-WARN][2] ([i915#12253])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-adlp-6/igt@i915_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-adlp-6/igt@i915_module_load@load.html
* igt@i915_selftest@live:
- bat-twl-1: [PASS][3] -> [INCOMPLETE][4] ([i915#12133] / [i915#9413])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-twl-1/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-twl-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_lrc:
- bat-twl-1: [PASS][5] -> [INCOMPLETE][6] ([i915#9413])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-twl-1/igt@i915_selftest@live@gt_lrc.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-twl-1/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@late_gt_pm:
- bat-atsm-1: [PASS][7] -> [ABORT][8] ([i915#12133]) +1 other test abort
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-atsm-1/igt@i915_selftest@live@late_gt_pm.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-atsm-1/igt@i915_selftest@live@late_gt_pm.html
* igt@i915_selftest@live@workarounds:
- bat-adlp-6: [PASS][9] -> [INCOMPLETE][10] ([i915#9413]) +1 other test incomplete
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-adlp-6/igt@i915_selftest@live@workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-adlp-6/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-dg2-8: [DMESG-FAIL][11] ([i915#12133] / [i915#9500]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-dg2-8/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-dg2-8/igt@i915_selftest@live.html
- {bat-arlh-3}: [ABORT][13] ([i915#12133]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-arlh-3/igt@i915_selftest@live.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-arlh-3/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- {bat-arlh-3}: [ABORT][15] ([i915#12061]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-arlh-3/igt@i915_selftest@live@workarounds.html
- bat-dg2-8: [DMESG-FAIL][17] ([i915#9500]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/bat-dg2-8/igt@i915_selftest@live@workarounds.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/bat-dg2-8/igt@i915_selftest@live@workarounds.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
[i915#12253]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12253
[i915#9413]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413
[i915#9500]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9500
Build changes
-------------
* Linux: CI_DRM_15562 -> Patchwork_139731v4
CI-20190529: 20190529
CI_DRM_15562: fe768c9d3f0cfbe30a1dddf3ae2319d1e04a4403 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8080: 20fcbc59241a16c84d12f4f6ba390fb46fd65a36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_139731v4: fe768c9d3f0cfbe30a1dddf3ae2319d1e04a4403 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/index.html
[-- Attachment #2: Type: text/html, Size: 5907 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✗ Fi.CI.IGT: failure for Add xe3lpd edp enabling (rev4)
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
` (9 preceding siblings ...)
2024-10-18 21:26 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2024-10-18 22:25 ` Patchwork
2024-10-23 17:17 ` Matt Roper
10 siblings, 1 reply; 23+ messages in thread
From: Patchwork @ 2024-10-18 22:25 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 84450 bytes --]
== Series Details ==
Series: Add xe3lpd edp enabling (rev4)
URL : https://patchwork.freedesktop.org/series/139731/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15562_full -> Patchwork_139731v4_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_139731v4_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_139731v4_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_139731v4_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_create@forked@smem:
- shard-glk: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk5/igt@gem_exec_create@forked@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk4/igt@gem_exec_create@forked@smem.html
* igt@kms_cursor_crc@cursor-suspend@pipe-d-dp-3:
- shard-dg2: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cursor_crc@cursor-suspend@pipe-d-dp-3.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu:
- shard-glk: NOTRUN -> [INCOMPLETE][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html
Known issues
------------
Here are the changes found in Patchwork_139731v4_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][5] ([i915#8411])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@drm_fdinfo@all-busy-check-all:
- shard-mtlp: NOTRUN -> [SKIP][6] ([i915#8414])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@drm_fdinfo@all-busy-check-all.html
* igt@drm_fdinfo@busy@ccs0:
- shard-dg2: NOTRUN -> [SKIP][7] ([i915#8414]) +7 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@drm_fdinfo@busy@ccs0.html
* igt@fbdev@info:
- shard-dg2: [PASS][8] -> [SKIP][9] ([i915#1849] / [i915#2582])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@fbdev@info.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@fbdev@info.html
* igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0:
- shard-dg2: [PASS][10] -> [INCOMPLETE][11] ([i915#12392] / [i915#7297])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-7/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-1/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-mtlp: NOTRUN -> [SKIP][12] ([i915#7697])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-mtlp: NOTRUN -> [SKIP][13] ([i915#6335])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_ctx_engines@invalid-engines:
- shard-rkl: [PASS][14] -> [FAIL][15] ([i915#12031] / [i915#12065])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-4/igt@gem_ctx_engines@invalid-engines.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-1/igt@gem_ctx_engines@invalid-engines.html
* igt@gem_ctx_sseu@engines:
- shard-tglu: NOTRUN -> [SKIP][16] ([i915#280])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_ctx_sseu@engines.html
* igt@gem_exec_balancer@bonded-true-hang:
- shard-mtlp: NOTRUN -> [SKIP][17] ([i915#4812])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_exec_balancer@bonded-true-hang.html
* igt@gem_exec_fair@basic-none:
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#3539] / [i915#4852])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_fair@basic-none.html
* igt@gem_exec_fair@basic-none-solo:
- shard-tglu: NOTRUN -> [FAIL][19] ([i915#2842]) +1 other test fail
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_exec_fair@basic-none-solo.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: NOTRUN -> [FAIL][20] ([i915#2842]) +3 other tests fail
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-pace-share:
- shard-mtlp: NOTRUN -> [SKIP][21] ([i915#4473] / [i915#4771])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@gem_exec_fair@basic-pace-share.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-rkl: [PASS][22] -> [FAIL][23] ([i915#2842]) +3 other tests fail
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-dg2: NOTRUN -> [SKIP][24] ([i915#5107])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_reloc@basic-cpu-active:
- shard-mtlp: NOTRUN -> [SKIP][25] ([i915#3281]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_exec_reloc@basic-cpu-active.html
* igt@gem_exec_reloc@basic-gtt-wc-active:
- shard-dg2: NOTRUN -> [SKIP][26] ([i915#3281]) +5 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_reloc@basic-gtt-wc-active.html
* igt@gem_exec_reloc@basic-wc-read:
- shard-dg1: NOTRUN -> [SKIP][27] ([i915#3281])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@gem_exec_reloc@basic-wc-read.html
* igt@gem_exec_schedule@pi-ringfull@bcs0:
- shard-glk: NOTRUN -> [FAIL][28] ([i915#12296]) +4 other tests fail
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_exec_schedule@pi-ringfull@bcs0.html
* igt@gem_exec_schedule@pi-ringfull@ccs0:
- shard-dg2: NOTRUN -> [FAIL][29] ([i915#12296]) +7 other tests fail
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_schedule@pi-ringfull@ccs0.html
* igt@gem_exec_schedule@preempt-queue:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#4537] / [i915#4812])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_schedule@preempt-queue.html
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: [PASS][31] -> [INCOMPLETE][32] ([i915#11441]) +1 other test incomplete
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-4/igt@gem_exec_suspend@basic-s0.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-7/igt@gem_exec_suspend@basic-s0.html
* igt@gem_fence_thrash@bo-copy:
- shard-dg2: NOTRUN -> [SKIP][33] ([i915#4860]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_fence_thrash@bo-copy.html
* igt@gem_fenced_exec_thrash@no-spare-fences:
- shard-dg1: NOTRUN -> [SKIP][34] ([i915#4860])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@gem_fenced_exec_thrash@no-spare-fences.html
* igt@gem_lmem_swapping@heavy-verify-multi-ccs:
- shard-mtlp: NOTRUN -> [SKIP][35] ([i915#4613]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-glk: NOTRUN -> [SKIP][36] ([i915#4613])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@smem-oom:
- shard-tglu: NOTRUN -> [SKIP][37] ([i915#4613])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_mmap_gtt@basic-small-copy:
- shard-mtlp: NOTRUN -> [SKIP][38] ([i915#4077])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@gem_mmap_gtt@basic-small-copy.html
* igt@gem_mmap_wc@write:
- shard-mtlp: NOTRUN -> [SKIP][39] ([i915#4083]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_mmap_wc@write.html
* igt@gem_partial_pwrite_pread@writes-after-reads-display:
- shard-mtlp: NOTRUN -> [SKIP][40] ([i915#3282]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_partial_pwrite_pread@writes-after-reads-display.html
* igt@gem_pwrite@basic-exhaustion:
- shard-glk: NOTRUN -> [WARN][41] ([i915#2658])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_pwrite@basic-exhaustion.html
- shard-dg2: NOTRUN -> [SKIP][42] ([i915#3282]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@create-protected-buffer:
- shard-dg2: NOTRUN -> [SKIP][43] ([i915#4270])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@gem_pxp@create-protected-buffer.html
* igt@gem_pxp@create-regular-context-2:
- shard-mtlp: NOTRUN -> [SKIP][44] ([i915#4270]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_pxp@create-regular-context-2.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-tglu: NOTRUN -> [SKIP][45] ([i915#4270])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-dg2: NOTRUN -> [SKIP][46] ([i915#5190] / [i915#8428])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_render_copy@yf-tiled-ccs-to-x-tiled:
- shard-mtlp: NOTRUN -> [SKIP][47] ([i915#8428])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_render_copy@yf-tiled-ccs-to-x-tiled.html
* igt@gem_set_tiling_vs_gtt:
- shard-dg2: NOTRUN -> [SKIP][48] ([i915#4079])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@gem_set_tiling_vs_gtt.html
* igt@gem_userptr_blits@access-control:
- shard-mtlp: NOTRUN -> [SKIP][49] ([i915#3297])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_userptr_blits@access-control.html
* igt@gen9_exec_parse@basic-rejected:
- shard-tglu: NOTRUN -> [SKIP][50] ([i915#2527] / [i915#2856])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gen9_exec_parse@basic-rejected.html
* igt@gen9_exec_parse@bb-secure:
- shard-dg2: NOTRUN -> [SKIP][51] ([i915#2856]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@gen9_exec_parse@bb-secure.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-mtlp: NOTRUN -> [SKIP][52] ([i915#2856])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-tglu: [PASS][53] -> [ABORT][54] ([i915#9820])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-tglu: NOTRUN -> [SKIP][55] ([i915#8399])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
- shard-dg1: [PASS][56] -> [FAIL][57] ([i915#3591]) +2 other tests fail
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
* igt@i915_pm_rps@min-max-config-idle:
- shard-dg2: NOTRUN -> [SKIP][58] ([i915#11681] / [i915#6621])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@i915_pm_rps@min-max-config-idle.html
* igt@i915_pm_rps@thresholds-idle:
- shard-mtlp: NOTRUN -> [SKIP][59] ([i915#11681])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@i915_pm_rps@thresholds-idle.html
* igt@i915_selftest@perf:
- shard-snb: [PASS][60] -> [ABORT][61] ([i915#12450])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb1/igt@i915_selftest@perf.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb6/igt@i915_selftest@perf.html
* igt@i915_selftest@perf@engine_cs:
- shard-snb: [PASS][62] -> [ABORT][63] ([i915#11703])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb1/igt@i915_selftest@perf@engine_cs.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb6/igt@i915_selftest@perf@engine_cs.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-dg1: NOTRUN -> [SKIP][64] ([i915#4077])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_addfb_basic@addfb25-x-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][65] ([i915#4212])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html
* igt@kms_addfb_basic@clobberred-modifier:
- shard-mtlp: NOTRUN -> [SKIP][66] ([i915#4212])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_addfb_basic@clobberred-modifier.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][67] ([i915#8709]) +3 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html
* igt@kms_atomic_transition@modeset-transition-fencing:
- shard-glk: [PASS][68] -> [FAIL][69] ([i915#12238])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk8/igt@kms_atomic_transition@modeset-transition-fencing.html
* igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs:
- shard-glk: [PASS][70] -> [FAIL][71] ([i915#11859])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk8/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-glk: NOTRUN -> [SKIP][72] ([i915#1769])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk9/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-tglu: NOTRUN -> [SKIP][73] ([i915#5286]) +1 other test skip
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#5190] / [i915#9197])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
- shard-dg2: NOTRUN -> [SKIP][75] ([i915#4538] / [i915#5190]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][76] ([i915#4538])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
- shard-mtlp: NOTRUN -> [SKIP][77] +4 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][78] ([i915#10307] / [i915#10434] / [i915#6095]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][79] ([i915#6095]) +14 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs@pipe-b-edp-1.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [SKIP][80] ([i915#10307] / [i915#6095]) +157 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-a-dp-3.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][81] ([i915#6095]) +93 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-tglu: NOTRUN -> [SKIP][82] ([i915#12313])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][83] ([i915#6095]) +59 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-dg2: NOTRUN -> [SKIP][84] ([i915#12313]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-tglu: NOTRUN -> [SKIP][85] ([i915#6095]) +14 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1:
- shard-glk: NOTRUN -> [SKIP][86] +87 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk9/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-mtlp: NOTRUN -> [SKIP][87] ([i915#7213] / [i915#9010])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling@pipe-c-dp-3:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#4087]) +3 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-c-dp-3.html
* igt@kms_chamelium_edid@dp-mode-timings:
- shard-mtlp: NOTRUN -> [SKIP][89] ([i915#7828]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_chamelium_edid@dp-mode-timings.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-tglu: NOTRUN -> [SKIP][90] ([i915#7828]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-dg2: NOTRUN -> [SKIP][91] ([i915#7828]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [TIMEOUT][92] ([i915#7173])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_content_protection@lic-type-0@pipe-a-dp-3.html
* igt@kms_content_protection@type1:
- shard-mtlp: NOTRUN -> [SKIP][93] ([i915#3555] / [i915#6944] / [i915#9424])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent:
- shard-dg2: NOTRUN -> [SKIP][94] ([i915#7118] / [i915#9424])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-32x10:
- shard-mtlp: NOTRUN -> [SKIP][95] ([i915#3555] / [i915#8814])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-8/igt@kms_cursor_crc@cursor-offscreen-32x10.html
* igt@kms_cursor_crc@cursor-random-128x42:
- shard-mtlp: NOTRUN -> [SKIP][96] ([i915#8814]) +1 other test skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_cursor_crc@cursor-random-128x42.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-dg1: NOTRUN -> [SKIP][97] ([i915#11453])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
- shard-mtlp: NOTRUN -> [SKIP][98] ([i915#11453])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-dg2: NOTRUN -> [INCOMPLETE][99] ([i915#12358] / [i915#7882])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-dg2: NOTRUN -> [SKIP][100] ([i915#4103] / [i915#4213])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-tglu: NOTRUN -> [SKIP][101] ([i915#4103])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-mtlp: NOTRUN -> [SKIP][102] ([i915#9809])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_dsc@dsc-basic:
- shard-mtlp: NOTRUN -> [SKIP][103] ([i915#3555] / [i915#3840] / [i915#9159])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_dsc@dsc-basic.html
* igt@kms_feature_discovery@psr1:
- shard-dg2: NOTRUN -> [SKIP][104] ([i915#658])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-dg2: NOTRUN -> [SKIP][105] +2 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-mtlp: NOTRUN -> [SKIP][106] ([i915#3637]) +1 other test skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip@2x-flip-vs-wf_vblank:
- shard-tglu: NOTRUN -> [SKIP][107] ([i915#3637])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_flip@2x-flip-vs-wf_vblank.html
* igt@kms_flip@2x-flip-vs-wf_vblank@ab-vga1-hdmi-a1:
- shard-snb: [PASS][108] -> [FAIL][109] ([i915#10826]) +1 other test fail
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb7/igt@kms_flip@2x-flip-vs-wf_vblank@ab-vga1-hdmi-a1.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb1/igt@kms_flip@2x-flip-vs-wf_vblank@ab-vga1-hdmi-a1.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][110] -> [FAIL][111] ([i915#2122]) +1 other test fail
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk4/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk8/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@blocking-wf_vblank:
- shard-mtlp: [PASS][112] -> [FAIL][113] ([i915#2122]) +1 other test fail
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@kms_flip@blocking-wf_vblank.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_flip@blocking-wf_vblank.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-tglu: NOTRUN -> [FAIL][114] ([i915#2122])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-3/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1:
- shard-tglu: [PASS][115] -> [FAIL][116] ([i915#2122]) +1 other test fail
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-7/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-3/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-tglu: NOTRUN -> [SKIP][117] ([i915#2672] / [i915#3555])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][118] ([i915#2587] / [i915#2672])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][119] ([i915#2672]) +2 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2: NOTRUN -> [SKIP][120] ([i915#2672] / [i915#3555] / [i915#5190])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
- shard-dg2: [PASS][121] -> [SKIP][122] ([i915#3555]) +4 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-mtlp: NOTRUN -> [SKIP][123] ([i915#2672] / [i915#3555] / [i915#8813]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][124] ([i915#2672] / [i915#8813]) +1 other test skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][125] ([i915#8708])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-snb: [PASS][126] -> [SKIP][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-dg1: NOTRUN -> [SKIP][128]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
- shard-dg2: [PASS][129] -> [SKIP][130] ([i915#5354]) +9 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-dg2: [PASS][131] -> [FAIL][132] ([i915#6880])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#8708]) +2 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-mtlp: NOTRUN -> [SKIP][134] ([i915#1825]) +6 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render:
- shard-tglu: NOTRUN -> [SKIP][135] +22 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#3458]) +3 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][137] ([i915#3458])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt:
- shard-dg2: NOTRUN -> [SKIP][138] ([i915#5354]) +12 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2: NOTRUN -> [SKIP][139] ([i915#3555] / [i915#8228])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-tglu: NOTRUN -> [SKIP][140] ([i915#3555] / [i915#8228])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][141] +2 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1.html
* igt@kms_plane@plane-panning-bottom-right-suspend:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#8825])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane@plane-panning-bottom-right-suspend.html
* igt@kms_plane@plane-position-covered:
- shard-dg2: [PASS][143] -> [SKIP][144] ([i915#8825])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane@plane-position-covered.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane@plane-position-covered.html
* igt@kms_plane_alpha_blend@alpha-7efc:
- shard-dg2: [PASS][145] -> [SKIP][146] ([i915#7294])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_alpha_blend@alpha-7efc.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_alpha_blend@alpha-7efc.html
* igt@kms_plane_multiple@tiling-yf:
- shard-mtlp: NOTRUN -> [SKIP][147] ([i915#3555] / [i915#8806])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2: [PASS][148] -> [SKIP][149] ([i915#6953] / [i915#9423])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-10/igt@kms_plane_scaling@intel-max-src-size.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-11/igt@kms_plane_scaling@intel-max-src-size.html
- shard-rkl: [PASS][150] -> [FAIL][151] ([i915#8292])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-5/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [FAIL][152] ([i915#8292])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-5/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation:
- shard-dg2: [PASS][153] -> [SKIP][154] ([i915#12247] / [i915#8152] / [i915#9423]) +2 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-b:
- shard-dg2: [PASS][155] -> [SKIP][156] ([i915#12247]) +11 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-b.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-b.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d:
- shard-dg2: [PASS][157] -> [SKIP][158] ([i915#12247] / [i915#8152]) +3 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25:
- shard-dg2: [PASS][159] -> [SKIP][160] ([i915#6953] / [i915#8152] / [i915#9423])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-mtlp: NOTRUN -> [SKIP][161] ([i915#12247] / [i915#3555])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b:
- shard-mtlp: NOTRUN -> [SKIP][162] ([i915#12247]) +3 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b.html
* igt@kms_pm_backlight@bad-brightness:
- shard-tglu: NOTRUN -> [SKIP][163] ([i915#9812])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2: NOTRUN -> [SKIP][164] ([i915#9685])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@kms_pm_dc@dc5-psr.html
- shard-dg1: NOTRUN -> [SKIP][165] ([i915#9685])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-tglu: NOTRUN -> [SKIP][166] ([i915#8430])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: [PASS][167] -> [SKIP][168] ([i915#9519]) +3 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-2/igt@kms_pm_rpm@dpms-lpsp.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-3/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-tglu: NOTRUN -> [SKIP][169] ([i915#9519])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_prime@d3hot:
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#6524] / [i915#6805])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@kms_prime@d3hot.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][171] ([i915#9808])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][172] ([i915#12316]) +1 other test skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][173] ([i915#11520])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#11520])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
- shard-tglu: NOTRUN -> [SKIP][175] ([i915#11520]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2: NOTRUN -> [SKIP][176] ([i915#9683])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-pr-primary-blt:
- shard-mtlp: NOTRUN -> [SKIP][177] ([i915#9688]) +5 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_psr@fbc-pr-primary-blt.html
* igt@kms_psr@psr-primary-blt:
- shard-dg1: NOTRUN -> [SKIP][178] ([i915#1072] / [i915#9732]) +1 other test skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_psr@psr-primary-blt.html
* igt@kms_psr@psr2-cursor-plane-move:
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#1072] / [i915#9732]) +5 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_psr@psr2-cursor-plane-move.html
* igt@kms_psr@psr2-cursor-plane-onoff:
- shard-tglu: NOTRUN -> [SKIP][180] ([i915#9732]) +4 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_psr@psr2-cursor-plane-onoff.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-dg1: NOTRUN -> [SKIP][181] ([i915#5289])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-dg2: NOTRUN -> [SKIP][182] ([i915#3555]) +1 other test skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_universal_plane@universal-plane-sanity:
- shard-dg2: [PASS][183] -> [SKIP][184] ([i915#9197]) +20 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_universal_plane@universal-plane-sanity.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_universal_plane@universal-plane-sanity.html
* igt@kms_vrr@flip-dpms:
- shard-tglu: NOTRUN -> [SKIP][185] ([i915#3555]) +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_vrr@flip-dpms.html
* igt@kms_vrr@lobf:
- shard-mtlp: NOTRUN -> [SKIP][186] ([i915#11920])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_vrr@lobf.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-glk: NOTRUN -> [SKIP][187] ([i915#2437])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@kms_writeback@writeback-invalid-parameters.html
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#2437])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf_pmu@all-busy-idle-check-all:
- shard-dg1: [PASS][189] -> [DMESG-WARN][190] ([i915#4423]) +2 other tests dmesg-warn
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-15/igt@perf_pmu@all-busy-idle-check-all.html
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@perf_pmu@all-busy-idle-check-all.html
* igt@prime_vgem@basic-read:
- shard-dg2: NOTRUN -> [SKIP][191] ([i915#3291] / [i915#3708])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@prime_vgem@basic-read.html
#### Possible fixes ####
* igt@gem_ctx_engines@invalid-engines:
- shard-mtlp: [FAIL][192] ([i915#12027] / [i915#12031]) -> [PASS][193]
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@gem_ctx_engines@invalid-engines.html
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-5/igt@gem_ctx_engines@invalid-engines.html
* igt@gem_eio@kms:
- shard-dg2: [FAIL][194] ([i915#5784]) -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-3/igt@gem_eio@kms.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-4/igt@gem_eio@kms.html
* igt@gem_exec_suspend@basic-s4-devices:
- shard-tglu: [ABORT][196] ([i915#7975] / [i915#8213]) -> [PASS][197] +1 other test pass
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices.html
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_exec_suspend@basic-s4-devices.html
* igt@gem_mmap_offset@clear:
- shard-mtlp: [ABORT][198] ([i915#10729]) -> [PASS][199]
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@gem_mmap_offset@clear.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_mmap_offset@clear.html
* igt@gem_mmap_offset@clear@smem0:
- shard-mtlp: [ABORT][200] ([i915#10029] / [i915#10729]) -> [PASS][201]
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@gem_mmap_offset@clear@smem0.html
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_mmap_offset@clear@smem0.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-glk: [ABORT][202] ([i915#9820]) -> [PASS][203]
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk2/igt@i915_module_load@reload-with-fault-injection.html
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@i915_module_load@reload-with-fault-injection.html
- shard-dg2: [ABORT][204] ([i915#9820]) -> [PASS][205]
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-4/igt@i915_module_load@reload-with-fault-injection.html
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_power@sanity:
- shard-mtlp: [SKIP][206] ([i915#7984]) -> [PASS][207]
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@i915_power@sanity.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-5/igt@i915_power@sanity.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-mtlp: [INCOMPLETE][208] ([i915#12358]) -> [PASS][209] +1 other test pass
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-1/igt@kms_cursor_crc@cursor-suspend.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-8/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-glk: [TIMEOUT][210] -> [PASS][211]
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1:
- shard-snb: [FAIL][212] ([i915#2122]) -> [PASS][213] +1 other test pass
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb7/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html
* igt@kms_flip@blocking-wf_vblank:
- shard-dg2: [FAIL][214] ([i915#2122]) -> [PASS][215]
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-10/igt@kms_flip@blocking-wf_vblank.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-1/igt@kms_flip@blocking-wf_vblank.html
* igt@kms_flip@blocking-wf_vblank@b-hdmi-a1:
- shard-tglu: [FAIL][216] ([i915#2122]) -> [PASS][217] +2 other tests pass
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-8/igt@kms_flip@blocking-wf_vblank@b-hdmi-a1.html
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-7/igt@kms_flip@blocking-wf_vblank@b-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-mtlp: [FAIL][218] ([i915#79]) -> [PASS][219] +1 other test pass
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@modeset-vs-vblank-race:
- shard-dg2: [SKIP][220] ([i915#5354]) -> [PASS][221] +6 other tests pass
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_flip@modeset-vs-vblank-race.html
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_flip@modeset-vs-vblank-race.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
- shard-dg2: [SKIP][222] ([i915#3555]) -> [PASS][223]
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-snb: [INCOMPLETE][224] -> [PASS][225]
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-snb: [SKIP][226] -> [PASS][227] +1 other test pass
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_hdr@static-toggle:
- shard-dg2: [SKIP][228] ([i915#3555] / [i915#8228]) -> [PASS][229]
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-11/igt@kms_hdr@static-toggle.html
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-dg2: [SKIP][230] ([i915#12388]) -> [PASS][231]
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_joiner@basic-force-big-joiner.html
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant:
- shard-dg2: [SKIP][232] ([i915#7294]) -> [PASS][233] +1 other test pass
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant.html
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-b:
- shard-dg2: [SKIP][234] ([i915#12247]) -> [PASS][235] +8 other tests pass
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-b.html
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-b.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d:
- shard-dg2: [SKIP][236] ([i915#12247] / [i915#8152]) -> [PASS][237] +2 other tests pass
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation:
- shard-dg2: [SKIP][238] ([i915#12247] / [i915#8152] / [i915#9423]) -> [PASS][239] +1 other test pass
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation.html
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
- shard-dg2: [SKIP][240] ([i915#12247] / [i915#6953] / [i915#8152] / [i915#9423]) -> [PASS][241]
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
* igt@kms_pm_rpm@cursor-dpms:
- shard-dg2: [SKIP][242] ([i915#1849]) -> [PASS][243]
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_pm_rpm@cursor-dpms.html
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_pm_rpm@cursor-dpms.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-dg2: [SKIP][244] ([i915#9519]) -> [PASS][245] +1 other test pass
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-6/igt@kms_pm_rpm@dpms-lpsp.html
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-4/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-rkl: [SKIP][246] ([i915#9519]) -> [PASS][247] +1 other test pass
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp-stress.html
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-dg2: [SKIP][248] ([i915#9197]) -> [PASS][249] +20 other tests pass
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_vblank@ts-continuation-dpms-suspend.html
#### Warnings ####
* igt@i915_selftest@mock:
- shard-glk: [DMESG-WARN][250] ([i915#9311]) -> [DMESG-WARN][251] ([i915#1982] / [i915#9311])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk3/igt@i915_selftest@mock.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk3/igt@i915_selftest@mock.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-dg2: [SKIP][252] ([i915#9197]) -> [SKIP][253] +2 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-dg2: [SKIP][254] ([i915#5190] / [i915#9197]) -> [SKIP][255] ([i915#4538] / [i915#5190]) +4 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
- shard-dg2: [SKIP][256] ([i915#4538] / [i915#5190]) -> [SKIP][257] ([i915#5190] / [i915#9197]) +4 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc:
- shard-dg2: [SKIP][258] ([i915#10307] / [i915#6095]) -> [SKIP][259] ([i915#9197]) +5 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc:
- shard-dg2: [SKIP][260] ([i915#9197]) -> [SKIP][261] ([i915#10307] / [i915#6095]) +6 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_cdclk@plane-scaling:
- shard-dg2: [SKIP][262] ([i915#9197]) -> [SKIP][263] ([i915#4087])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_cdclk@plane-scaling.html
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm:
- shard-dg1: [SKIP][264] ([i915#7828]) -> [SKIP][265] ([i915#4423] / [i915#7828])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-15/igt@kms_chamelium_hpd@hdmi-hpd-storm.html
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_chamelium_hpd@hdmi-hpd-storm.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2: [SKIP][266] ([i915#7118] / [i915#9424]) -> [SKIP][267] ([i915#9197])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_content_protection@atomic-dpms.html
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@content-type-change:
- shard-dg2: [SKIP][268] ([i915#9197]) -> [SKIP][269] ([i915#9424]) +1 other test skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_content_protection@content-type-change.html
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2: [SKIP][270] ([i915#3299]) -> [SKIP][271] ([i915#9197])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_content_protection@dp-mst-type-0.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2: [SKIP][272] ([i915#9197]) -> [TIMEOUT][273] ([i915#7173])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_content_protection@lic-type-0.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@srm:
- shard-dg2: [TIMEOUT][274] ([i915#7173]) -> [SKIP][275] ([i915#7118])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-10/igt@kms_content_protection@srm.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-11/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-dg2: [SKIP][276] ([i915#3555]) -> [SKIP][277] ([i915#9197])
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_cursor_crc@cursor-offscreen-max-size.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-dg2: [SKIP][278] ([i915#9197]) -> [SKIP][279] ([i915#3555]) +4 other tests skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_cursor_crc@cursor-random-max-size.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-dg2: [SKIP][280] ([i915#11453]) -> [SKIP][281] ([i915#9197]) +1 other test skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_cursor_crc@cursor-sliding-512x170.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-dg2: [SKIP][282] ([i915#5354]) -> [SKIP][283] ([i915#9197])
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-dg2: [SKIP][284] ([i915#9197]) -> [SKIP][285] ([i915#5354])
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-dg2: [SKIP][286] ([i915#9197]) -> [SKIP][287] ([i915#9833])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-dg2: [SKIP][288] ([i915#3840] / [i915#9688]) -> [SKIP][289] ([i915#9197])
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_dsc@dsc-fractional-bpp.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-dg2: [SKIP][290] ([i915#9197]) -> [SKIP][291] ([i915#3840])
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-dg2: [SKIP][292] ([i915#9197]) -> [SKIP][293] ([i915#3840] / [i915#9053])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-dg2: [SKIP][294] ([i915#3555] / [i915#5190]) -> [SKIP][295] ([i915#2672] / [i915#3555] / [i915#5190]) +1 other test skip
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-dg2: [SKIP][296] ([i915#8708]) -> [SKIP][297] ([i915#5354]) +8 other tests skip
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
- shard-dg2: [SKIP][298] ([i915#5354]) -> [SKIP][299] ([i915#8708]) +5 other tests skip
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-dg2: [SKIP][300] ([i915#5354]) -> [SKIP][301] ([i915#3458]) +6 other tests skip
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: [SKIP][302] ([i915#5354]) -> [SKIP][303] ([i915#10055])
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
- shard-dg2: [SKIP][304] ([i915#3458]) -> [SKIP][305] ([i915#5354]) +6 other tests skip
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: [SKIP][306] ([i915#3458]) -> [SKIP][307] ([i915#10433] / [i915#3458]) +4 other tests skip
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-dg1: [SKIP][308] ([i915#4423] / [i915#8708]) -> [SKIP][309] ([i915#8708])
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_hdr@static-toggle-suspend:
- shard-dg2: [SKIP][310] ([i915#9197]) -> [SKIP][311] ([i915#3555] / [i915#8228])
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_hdr@static-toggle-suspend.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation:
- shard-dg2: [SKIP][312] ([i915#12247] / [i915#8152] / [i915#9423]) -> [SKIP][313] ([i915#12247] / [i915#9423])
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d:
- shard-dg2: [SKIP][314] ([i915#12247] / [i915#8152]) -> [SKIP][315] ([i915#12247])
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][316] ([i915#3828]) -> [SKIP][317] ([i915#9340])
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-5/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-dg1: [SKIP][318] ([i915#1072] / [i915#9732]) -> [SKIP][319] ([i915#1072] / [i915#4423] / [i915#9732])
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-13/igt@kms_psr@pr-sprite-plane-onoff.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_psr@pr-sprite-plane-onoff.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2: [SKIP][320] ([i915#9197]) -> [SKIP][321] ([i915#11131]) +1 other test skip
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_rotation_crc@primary-rotation-270.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-dg2: [SKIP][322] ([i915#5190] / [i915#9197]) -> [SKIP][323] ([i915#11131] / [i915#5190])
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2: [SKIP][324] ([i915#8623]) -> [SKIP][325] ([i915#9197])
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-dg2: [SKIP][326] ([i915#9906]) -> [SKIP][327] ([i915#9197])
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_vrr@seamless-rr-switch-drrs.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_vrr@seamless-rr-switch-drrs.html
[i915#10029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10029
[i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10729]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10729
[i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
[i915#11131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11131
[i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
[i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11703]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11703
[i915#11859]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11859
[i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
[i915#12027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12027
[i915#12031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12031
[i915#12065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12065
[i915#12238]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12238
[i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
[i915#12296]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12296
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
[i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
[i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
[i915#12450]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12450
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
[i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4473]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4473
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#5107]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5107
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
[i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
[i915#7294]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7294
[i915#7297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7297
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
[i915#79]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/79
[i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8152
[i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
[i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
[i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
[i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
[i915#9010]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9010
[i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
[i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159
[i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
[i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
[i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
Build changes
-------------
* Linux: CI_DRM_15562 -> Patchwork_139731v4
CI-20190529: 20190529
CI_DRM_15562: fe768c9d3f0cfbe30a1dddf3ae2319d1e04a4403 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8080: 20fcbc59241a16c84d12f4f6ba390fb46fd65a36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_139731v4: fe768c9d3f0cfbe30a1dddf3ae2319d1e04a4403 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/index.html
[-- Attachment #2: Type: text/html, Size: 105131 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 5/7] drm/i915/xe3lpd: Add new bit range of MAX swing setup
2024-10-18 20:03 ` [PATCH v4 5/7] drm/i915/xe3lpd: Add new bit range of MAX swing setup Matt Atwood
@ 2024-10-18 23:38 ` Matt Roper
0 siblings, 0 replies; 23+ messages in thread
From: Matt Roper @ 2024-10-18 23:38 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-xe, intel-gfx, Suraj Kandpal
On Fri, Oct 18, 2024 at 01:03:09PM -0700, Matt Atwood wrote:
> From: Suraj Kandpal <suraj.kandpal@intel.com>
>
> Add new bit range for Max PHY Swing Setup in PORT_ALPM_CTL
> register for DISPLAY_VER >= 30.
>
> v2: implement as two seperate macros instead of a single macro
> v3: extend previous definition by 2 bits that were previously reserved
>
> Bspec: 70277
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 0841242543ca..9ad7611506e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -298,7 +298,7 @@
> #define _PORT_ALPM_CTL_B 0x16fc2c
> #define PORT_ALPM_CTL(port) _MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
> #define PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(31)
> -#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK REG_GENMASK(23, 20)
> +#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK REG_GENMASK(25, 20)
> #define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
> #define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK REG_GENMASK(19, 16)
> #define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK, val)
> --
> 2.45.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 6/7] drm/i915/xe3lpd: Add check to see if edp over type c is allowed
2024-10-18 20:03 ` [PATCH v4 6/7] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Matt Atwood
@ 2024-10-21 12:22 ` Jani Nikula
0 siblings, 0 replies; 23+ messages in thread
From: Jani Nikula @ 2024-10-21 12:22 UTC (permalink / raw)
To: Matt Atwood, intel-xe, intel-gfx; +Cc: Suraj Kandpal, Matt Atwood, Mika Kahola
On Fri, 18 Oct 2024, Matt Atwood <matthew.s.atwood@intel.com> wrote:
> From: Suraj Kandpal <suraj.kandpal@intel.com>
>
> Read PICA register to see if edp over type C is possible and then
> add the appropriate tables for it.
>
> --v2
> -remove bool from intel_encoder have it in runtime_info [Jani]
> -initialize the bool in runtime_info init [Jani]
> -dont abbreviate the bool [Jani]
>
> Bspec: 68846
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4 ++++
> .../gpu/drm/i915/display/intel_display_device.c | 4 ++++
> .../gpu/drm/i915/display/intel_display_device.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++++++++---
> drivers/gpu/drm/i915/display/intel_dp.h | 5 +++++
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 6 files changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index f878ef1a97ec..37c66b32325d 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -2256,9 +2256,13 @@ intel_c20_pll_tables_get(struct intel_crtc_state *crtc_state,
> struct intel_encoder *encoder)
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(i915);
Please add struct intel_display *display = to_intel_display(crtc_state)
and pass that to DISPLAY_RUNTIME_INFO().
Please don't add display_runtime local variables for one time uses like
this. It could be just DISPLAY_RUNTIME_INFO(display)->edp_typec_support.
>
> if (intel_crtc_has_dp_encoder(crtc_state)) {
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> + if (DISPLAY_VER(i915) >= 30 &&
The version check is redundant. You won't initialize or have
edp_typec_support unless display ver >= 30 anyway.
> + display_runtime->edp_typec_support)
> + return xe3lpd_c20_dp_edp_tables;
> if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
> return xe2hpd_c20_edp_tables;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index aa22189e3853..8583c3529060 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -15,6 +15,7 @@
> #include "intel_display_params.h"
> #include "intel_display_power.h"
> #include "intel_display_reg_defs.h"
> +#include "intel_dp.h"
Drop.
> #include "intel_fbc.h"
> #include "intel_step.h"
>
> @@ -1685,6 +1686,9 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
> }
> }
>
> + if (DISPLAY_VER(i915) >= 30)
> + intel_dp_check_edp_typec_support(display, display_runtime);
> +
Please just read the register directly here like we do for all the other
straps etc. No need to add additional interfaces. We don't pass
display_runtime around in any case.
> display_runtime->rawclk_freq = intel_read_rawclk(display);
> drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 071a36b51f79..410f8b33a8a1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -232,6 +232,7 @@ struct intel_display_runtime_info {
> bool has_hdcp;
> bool has_dmc;
> bool has_dsc;
> + bool edp_typec_support;
> };
>
> struct intel_display_device_info {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7e04913bc2ff..be21e2743801 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5571,6 +5571,16 @@ intel_dp_detect_sdp_caps(struct intel_dp *intel_dp)
> drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
> }
>
> +void
> +intel_dp_check_edp_typec_support(struct intel_display *display,
> + struct intel_display_runtime_info *display_runtime)
> +{
> + u32 ret = 0;
> +
> + ret = intel_de_read(display, PICA_PHY_CONFIG_CONTROL);
> + display_runtime->edp_typec_support = ret & EDP_ON_TYPEC;
> +}
> +
This is a completely unnecessary function and interface, just drop it,
and do this in runtime info init.
> static int
> intel_dp_detect(struct drm_connector *connector,
> struct drm_modeset_acquire_ctx *ctx,
> @@ -6440,10 +6450,11 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>
> if (_intel_dp_is_port_edp(dev_priv, intel_encoder->devdata, port)) {
> /*
> - * Currently we don't support eDP on TypeC ports, although in
> - * theory it could work on TypeC legacy ports.
> + * Currently we don't support eDP on TypeC ports for DISPLAY_VER < 30,
> + * although in theory it could work on TypeC legacy ports.
> */
> - drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder));
> + if (DISPLAY_VER(dev_priv) < 30)
> + drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder));
Just include the version check in the drm_WARN_ON() instead of adding it
inside an if.
drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder) && DISPLAY_VER(dev_priv) < 30);
> type = DRM_MODE_CONNECTOR_eDP;
> intel_encoder->type = INTEL_OUTPUT_EDP;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 60baf4072dc9..c6a80c4e2166 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -20,6 +20,8 @@ struct intel_atomic_state;
> struct intel_connector;
> struct intel_crtc_state;
> struct intel_digital_port;
> +struct intel_display;
> +struct intel_display_runtime_info;
Drop.
> struct intel_dp;
> struct intel_encoder;
>
> @@ -204,5 +206,8 @@ bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
> u8 lane_count);
> bool intel_dp_has_connector(struct intel_dp *intel_dp,
> const struct drm_connector_state *conn_state);
> +void
> +intel_dp_check_edp_typec_support(struct intel_display *display,
> + struct intel_display_runtime_info *display_runtime);
Drop.
>
> #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8d758947f301..2743a2dd0a3d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4575,4 +4575,7 @@ enum skl_power_gate {
>
> #define MTL_MEDIA_GSI_BASE 0x380000
>
> +#define PICA_PHY_CONFIG_CONTROL _MMIO(0x16FE68)
> +#define EDP_ON_TYPEC REG_BIT(31)
> +
We shouldn't be adding new display registers to i915_reg.h anymore...
> #endif /* _I915_REG_H_ */
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming
2024-10-18 20:03 ` [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming Matt Atwood
@ 2024-10-21 12:41 ` Gustavo Sousa
0 siblings, 0 replies; 23+ messages in thread
From: Gustavo Sousa @ 2024-10-21 12:41 UTC (permalink / raw)
To: Matt Atwood, intel-gfx, intel-xe; +Cc: Matt Roper, Matt Atwood
Quoting Matt Atwood (2024-10-18 17:03:05-03:00)
>From: Matt Roper <matthew.d.roper@intel.com>
>
>There are some minor changes to pmdemand handling on Xe3:
> - Active scalers are no longer tracked. We can simply skip the readout
> and programming of this field.
> - Active dbuf slices are no longer tracked. We should skip the readout
> and programming of this field and also make sure that it stays 0 in
> our software bookkeeping so that we won't erroneously return true
> from intel_pmdemand_needs_update() due to mismatches.
> - Even though there aren't enough pipes to utilize them, the size of
> the 'active pipes' field has expanded to four bits, taking over the
> register bits previously used for dbuf slices. Since the lower bits
> of the mask have moved, we need to update our reads/writes to handle
> this properly.
>
>v2: active pipes is no longer always max 3, add in the ability to go to
>4 for PTL.
>v3: use intel_display for display_ver check, use INTEL_NUM_PIPES
>v4: add a conditional for number of pipes macro vs using 3.
>
>Bspec: 68883, 69125
>Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_pmdemand.c | 68 +++++++++++++------
> drivers/gpu/drm/i915/display/intel_pmdemand.h | 4 +-
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 3 files changed, 50 insertions(+), 23 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
>index ceaf9e3147da..7cda674fa851 100644
>--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
>+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
>@@ -258,6 +258,7 @@ intel_pmdemand_connector_needs_update(struct intel_atomic_state *state)
>
> static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
> {
>+ struct intel_display *display = to_intel_display(state);
> const struct intel_bw_state *new_bw_state, *old_bw_state;
> const struct intel_cdclk_state *new_cdclk_state, *old_cdclk_state;
> const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
>@@ -274,12 +275,16 @@ static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
> new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
> old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
> if (new_dbuf_state &&
>- (new_dbuf_state->active_pipes !=
>- old_dbuf_state->active_pipes ||
>- new_dbuf_state->enabled_slices !=
>- old_dbuf_state->enabled_slices))
>+ new_dbuf_state->active_pipes != old_dbuf_state->active_pipes)
> return true;
>
>+ if (DISPLAY_VER(display) < 30) {
>+ if (new_dbuf_state &&
>+ new_dbuf_state->enabled_slices !=
>+ old_dbuf_state->enabled_slices)
>+ return true;
>+ }
>+
> new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
> old_cdclk_state = intel_atomic_get_old_cdclk_state(state);
> if (new_cdclk_state &&
>@@ -327,10 +332,15 @@ int intel_pmdemand_atomic_check(struct intel_atomic_state *state)
> if (IS_ERR(new_dbuf_state))
> return PTR_ERR(new_dbuf_state);
>
>- new_pmdemand_state->params.active_pipes =
>- min_t(u8, hweight8(new_dbuf_state->active_pipes), 3);
>- new_pmdemand_state->params.active_dbufs =
>- min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3);
>+ if (DISPLAY_VER(i915) < 30) {
>+ new_pmdemand_state->params.active_dbufs =
>+ min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3);
>+ new_pmdemand_state->params.active_pipes =
>+ min_t(u8, hweight8(new_dbuf_state->active_pipes), INTEL_NUM_PIPES(i915));
It is the other way around: We should use INTEL_NUM_PIPES(i915) for
DISPLAY_VER(i915) >= 30 and 3 otherwise.
--
Gustavo Sousa
>+ }
>+ else
>+ new_pmdemand_state->params.active_pipes =
>+ min_t(u8, hweight8(new_dbuf_state->active_pipes), 3);
>
> new_cdclk_state = intel_atomic_get_cdclk_state(state);
> if (IS_ERR(new_cdclk_state))
>@@ -395,27 +405,32 @@ intel_pmdemand_init_pmdemand_params(struct drm_i915_private *i915,
>
> reg2 = intel_de_read(i915, XELPDP_INITIATE_PMDEMAND_REQUEST(1));
>
>- /* Set 1*/
> pmdemand_state->params.qclk_gv_bw =
> REG_FIELD_GET(XELPDP_PMDEMAND_QCLK_GV_BW_MASK, reg1);
> pmdemand_state->params.voltage_index =
> REG_FIELD_GET(XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK, reg1);
> pmdemand_state->params.qclk_gv_index =
> REG_FIELD_GET(XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK, reg1);
>- pmdemand_state->params.active_pipes =
>- REG_FIELD_GET(XELPDP_PMDEMAND_PIPES_MASK, reg1);
>- pmdemand_state->params.active_dbufs =
>- REG_FIELD_GET(XELPDP_PMDEMAND_DBUFS_MASK, reg1);
> pmdemand_state->params.active_phys =
> REG_FIELD_GET(XELPDP_PMDEMAND_PHYS_MASK, reg1);
>
>- /* Set 2*/
> pmdemand_state->params.cdclk_freq_mhz =
> REG_FIELD_GET(XELPDP_PMDEMAND_CDCLK_FREQ_MASK, reg2);
> pmdemand_state->params.ddiclk_max =
> REG_FIELD_GET(XELPDP_PMDEMAND_DDICLK_FREQ_MASK, reg2);
>- pmdemand_state->params.scalers =
>- REG_FIELD_GET(XELPDP_PMDEMAND_SCALERS_MASK, reg2);
>+
>+ if (DISPLAY_VER(i915) >= 30) {
>+ pmdemand_state->params.active_pipes =
>+ REG_FIELD_GET(XE3_PMDEMAND_PIPES_MASK, reg1);
>+ } else {
>+ pmdemand_state->params.active_pipes =
>+ REG_FIELD_GET(XELPDP_PMDEMAND_PIPES_MASK, reg1);
>+ pmdemand_state->params.active_dbufs =
>+ REG_FIELD_GET(XELPDP_PMDEMAND_DBUFS_MASK, reg1);
>+
>+ pmdemand_state->params.scalers =
>+ REG_FIELD_GET(XELPDP_PMDEMAND_SCALERS_MASK, reg2);
>+ }
>
> unlock:
> mutex_unlock(&i915->display.pmdemand.lock);
>@@ -442,6 +457,10 @@ void intel_pmdemand_program_dbuf(struct drm_i915_private *i915,
> {
> u32 dbufs = min_t(u32, hweight8(dbuf_slices), 3);
>
>+ /* PM Demand only tracks active dbufs on pre-Xe3 platforms */
>+ if (DISPLAY_VER(i915) >= 30)
>+ return;
>+
> mutex_lock(&i915->display.pmdemand.lock);
> if (drm_WARN_ON(&i915->drm,
> !intel_pmdemand_check_prev_transaction(i915)))
>@@ -460,7 +479,8 @@ void intel_pmdemand_program_dbuf(struct drm_i915_private *i915,
> }
>
> static void
>-intel_pmdemand_update_params(const struct intel_pmdemand_state *new,
>+intel_pmdemand_update_params(struct drm_i915_private *i915,
>+ const struct intel_pmdemand_state *new,
> const struct intel_pmdemand_state *old,
> u32 *reg1, u32 *reg2, bool serialized)
> {
>@@ -495,16 +515,22 @@ intel_pmdemand_update_params(const struct intel_pmdemand_state *new,
> update_reg(reg1, qclk_gv_bw, XELPDP_PMDEMAND_QCLK_GV_BW_MASK);
> update_reg(reg1, voltage_index, XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK);
> update_reg(reg1, qclk_gv_index, XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK);
>- update_reg(reg1, active_pipes, XELPDP_PMDEMAND_PIPES_MASK);
>- update_reg(reg1, active_dbufs, XELPDP_PMDEMAND_DBUFS_MASK);
> update_reg(reg1, active_phys, XELPDP_PMDEMAND_PHYS_MASK);
>
> /* Set 2*/
> update_reg(reg2, cdclk_freq_mhz, XELPDP_PMDEMAND_CDCLK_FREQ_MASK);
> update_reg(reg2, ddiclk_max, XELPDP_PMDEMAND_DDICLK_FREQ_MASK);
>- update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK);
> update_reg(reg2, plls, XELPDP_PMDEMAND_PLLS_MASK);
>
>+ if (DISPLAY_VER(i915) >= 30) {
>+ update_reg(reg1, active_pipes, XE3_PMDEMAND_PIPES_MASK);
>+ } else {
>+ update_reg(reg1, active_pipes, XELPDP_PMDEMAND_PIPES_MASK);
>+ update_reg(reg1, active_dbufs, XELPDP_PMDEMAND_DBUFS_MASK);
>+
>+ update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK);
>+ }
>+
> #undef update_reg
> }
>
>@@ -529,7 +555,7 @@ intel_pmdemand_program_params(struct drm_i915_private *i915,
> reg2 = intel_de_read(i915, XELPDP_INITIATE_PMDEMAND_REQUEST(1));
> mod_reg2 = reg2;
>
>- intel_pmdemand_update_params(new, old, &mod_reg1, &mod_reg2,
>+ intel_pmdemand_update_params(i915, new, old, &mod_reg1, &mod_reg2,
> serialized);
>
> if (reg1 != mod_reg1) {
>diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.h b/drivers/gpu/drm/i915/display/intel_pmdemand.h
>index 128fd61f8f14..a1c49efdc493 100644
>--- a/drivers/gpu/drm/i915/display/intel_pmdemand.h
>+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.h
>@@ -20,14 +20,14 @@ struct pmdemand_params {
> u8 voltage_index;
> u8 qclk_gv_index;
> u8 active_pipes;
>- u8 active_dbufs;
>+ u8 active_dbufs; /* pre-Xe3 only */
> /* Total number of non type C active phys from active_phys_mask */
> u8 active_phys;
> u8 plls;
> u16 cdclk_freq_mhz;
> /* max from ddi_clocks[] */
> u16 ddiclk_max;
>- u8 scalers;
>+ u8 scalers; /* pre-Xe3 only */
> };
>
> struct intel_pmdemand_state {
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 405f409e9761..89e4381f8baa 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -2696,6 +2696,7 @@
> #define XELPDP_PMDEMAND_QCLK_GV_BW_MASK REG_GENMASK(31, 16)
> #define XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK REG_GENMASK(14, 12)
> #define XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK REG_GENMASK(11, 8)
>+#define XE3_PMDEMAND_PIPES_MASK REG_GENMASK(7, 4)
> #define XELPDP_PMDEMAND_PIPES_MASK REG_GENMASK(7, 6)
> #define XELPDP_PMDEMAND_DBUFS_MASK REG_GENMASK(5, 4)
> #define XELPDP_PMDEMAND_PHYS_MASK REG_GENMASK(2, 0)
>--
>2.45.0
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 2/7] drm/i915/xe3lpd: Add cdclk changes
2024-10-18 20:03 ` [PATCH v4 2/7] drm/i915/xe3lpd: Add cdclk changes Matt Atwood
@ 2024-10-21 12:49 ` Gustavo Sousa
0 siblings, 0 replies; 23+ messages in thread
From: Gustavo Sousa @ 2024-10-21 12:49 UTC (permalink / raw)
To: Matt Atwood, intel-gfx, intel-xe
Cc: Radhakrishna Sripada, Matt Atwood, Matt Roper
Quoting Matt Atwood (2024-10-18 17:03:06-03:00)
>From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
>
>Xe3_LPD has new max cdclk of 691200 which requires reusing the lnl table
>and modify/add higher frequencies. Updating the max cdclk supported by
>the platform and voltage_level determination is also updated.
>
>There are minor changes in cdclk programming sequence compared to lnl,
>where programming cd2x divider needs to be skipped. This is already handled
>by the calculations in existing code.
>
>v2: update tables
>v3: xe3lpd doesnt supply the power control unit the voltage index
>
>Bspec: 68861, 68863, 68864
>Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
>Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
>Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Re-adding my r-b[1] here:
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
[1] https://lore.kernel.org/all/172909183684.4147.5683276375084691858@gjsousa-mobl2/
>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 59 +++++++++++++++++++++-
> 1 file changed, 57 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
>index fa1c2012b10c..96523526a2c3 100644
>--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
>+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
>@@ -1468,6 +1468,39 @@ static const struct intel_cdclk_vals xe2hpd_cdclk_table[] = {
> {}
> };
>
>+static const struct intel_cdclk_vals xe3lpd_cdclk_table[] = {
>+ { .refclk = 38400, .cdclk = 153600, .ratio = 16, .waveform = 0xaaaa },
>+ { .refclk = 38400, .cdclk = 172800, .ratio = 16, .waveform = 0xad5a },
>+ { .refclk = 38400, .cdclk = 192000, .ratio = 16, .waveform = 0xb6b6 },
>+ { .refclk = 38400, .cdclk = 211200, .ratio = 16, .waveform = 0xdbb6 },
>+ { .refclk = 38400, .cdclk = 230400, .ratio = 16, .waveform = 0xeeee },
>+ { .refclk = 38400, .cdclk = 249600, .ratio = 16, .waveform = 0xf7de },
>+ { .refclk = 38400, .cdclk = 268800, .ratio = 16, .waveform = 0xfefe },
>+ { .refclk = 38400, .cdclk = 288000, .ratio = 16, .waveform = 0xfffe },
>+ { .refclk = 38400, .cdclk = 307200, .ratio = 16, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 326400, .ratio = 17, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 345600, .ratio = 18, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 364800, .ratio = 19, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 384000, .ratio = 20, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 403200, .ratio = 21, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 422400, .ratio = 22, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 441600, .ratio = 23, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 460800, .ratio = 24, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 480000, .ratio = 25, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 499200, .ratio = 26, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 518400, .ratio = 27, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 537600, .ratio = 28, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 556800, .ratio = 29, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 576000, .ratio = 30, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 595200, .ratio = 31, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 614400, .ratio = 32, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 633600, .ratio = 33, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 672000, .ratio = 35, .waveform = 0xffff },
>+ { .refclk = 38400, .cdclk = 691200, .ratio = 36, .waveform = 0xffff },
>+ {}
>+};
>+
> static const int cdclk_squash_len = 16;
>
> static int cdclk_squash_divider(u16 waveform)
>@@ -1594,6 +1627,16 @@ static u8 rplu_calc_voltage_level(int cdclk)
> rplu_voltage_level_max_cdclk);
> }
>
>+static u8 xe3lpd_calc_voltage_level(int cdclk)
>+{
>+ /*
>+ * Starting with xe3lpd power controller does not need the voltage
>+ * index when doing the modeset update. This function is best left
>+ * defined but returning 0 to the mask.
>+ */
>+ return 0;
>+}
>+
> static void icl_readout_refclk(struct intel_display *display,
> struct intel_cdclk_config *cdclk_config)
> {
>@@ -3437,7 +3480,9 @@ void intel_update_max_cdclk(struct intel_display *display)
> {
> struct drm_i915_private *dev_priv = to_i915(display->drm);
>
>- if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) {
>+ if (DISPLAY_VER(display) >= 30) {
>+ display->cdclk.max_cdclk_freq = 691200;
>+ } else if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) {
> if (display->cdclk.hw.ref == 24000)
> display->cdclk.max_cdclk_freq = 552000;
> else
>@@ -3650,6 +3695,13 @@ void intel_cdclk_debugfs_register(struct intel_display *display)
> display, &i915_cdclk_info_fops);
> }
>
>+static const struct intel_cdclk_funcs xe3lpd_cdclk_funcs = {
>+ .get_cdclk = bxt_get_cdclk,
>+ .set_cdclk = bxt_set_cdclk,
>+ .modeset_calc_cdclk = bxt_modeset_calc_cdclk,
>+ .calc_voltage_level = xe3lpd_calc_voltage_level,
>+};
>+
> static const struct intel_cdclk_funcs rplu_cdclk_funcs = {
> .get_cdclk = bxt_get_cdclk,
> .set_cdclk = bxt_set_cdclk,
>@@ -3794,7 +3846,10 @@ void intel_init_cdclk_hooks(struct intel_display *display)
> {
> struct drm_i915_private *dev_priv = to_i915(display->drm);
>
>- if (DISPLAY_VER(display) >= 20) {
>+ if (DISPLAY_VER(display) >= 30) {
>+ display->funcs.cdclk = &xe3lpd_cdclk_funcs;
>+ display->cdclk.table = xe3lpd_cdclk_table;
>+ } else if (DISPLAY_VER(display) >= 20) {
> display->funcs.cdclk = &rplu_cdclk_funcs;
> display->cdclk.table = xe2lpd_cdclk_table;
> } else if (DISPLAY_VER_FULL(display) >= IP_VER(14, 1)) {
>--
>2.45.0
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for Add xe3lpd edp enabling (rev4)
2024-10-18 22:25 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2024-10-23 17:17 ` Matt Roper
0 siblings, 0 replies; 23+ messages in thread
From: Matt Roper @ 2024-10-23 17:17 UTC (permalink / raw)
To: intel-gfx; +Cc: Matt Atwood, Clinton Taylor
On Fri, Oct 18, 2024 at 10:25:29PM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: Add xe3lpd edp enabling (rev4)
> URL : https://patchwork.freedesktop.org/series/139731/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_15562_full -> Patchwork_139731v4_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_139731v4_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_139731v4_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (7 -> 7)
> ------------------------------
>
> No changes in participating hosts
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_139731v4_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@gem_exec_create@forked@smem:
> - shard-glk: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk5/igt@gem_exec_create@forked@smem.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk4/igt@gem_exec_create@forked@smem.html
>
> * igt@kms_cursor_crc@cursor-suspend@pipe-d-dp-3:
> - shard-dg2: NOTRUN -> [INCOMPLETE][3]
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cursor_crc@cursor-suspend@pipe-d-dp-3.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu:
> - shard-glk: NOTRUN -> [INCOMPLETE][4]
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html
None of these incompletes on old platforms appear to be related to this
series.
Since the patches in this series are all independent (and none are
actually active yet since we haven't flipped the switch on PTL display
yet), I've applied #2, 4, 5, and 7 to drm-intel-next since they're fully
reviewed and ready to go. Thanks for the patches and reviews.
Matt
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_139731v4_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@api_intel_bb@blit-reloc-purge-cache:
> - shard-dg2: NOTRUN -> [SKIP][5] ([i915#8411])
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@api_intel_bb@blit-reloc-purge-cache.html
>
> * igt@drm_fdinfo@all-busy-check-all:
> - shard-mtlp: NOTRUN -> [SKIP][6] ([i915#8414])
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@drm_fdinfo@all-busy-check-all.html
>
> * igt@drm_fdinfo@busy@ccs0:
> - shard-dg2: NOTRUN -> [SKIP][7] ([i915#8414]) +7 other tests skip
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@drm_fdinfo@busy@ccs0.html
>
> * igt@fbdev@info:
> - shard-dg2: [PASS][8] -> [SKIP][9] ([i915#1849] / [i915#2582])
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@fbdev@info.html
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@fbdev@info.html
>
> * igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0:
> - shard-dg2: [PASS][10] -> [INCOMPLETE][11] ([i915#12392] / [i915#7297])
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-7/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-1/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
>
> * igt@gem_close_race@multigpu-basic-threads:
> - shard-mtlp: NOTRUN -> [SKIP][12] ([i915#7697])
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_close_race@multigpu-basic-threads.html
>
> * igt@gem_create@create-ext-cpu-access-sanity-check:
> - shard-mtlp: NOTRUN -> [SKIP][13] ([i915#6335])
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@gem_create@create-ext-cpu-access-sanity-check.html
>
> * igt@gem_ctx_engines@invalid-engines:
> - shard-rkl: [PASS][14] -> [FAIL][15] ([i915#12031] / [i915#12065])
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-4/igt@gem_ctx_engines@invalid-engines.html
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-1/igt@gem_ctx_engines@invalid-engines.html
>
> * igt@gem_ctx_sseu@engines:
> - shard-tglu: NOTRUN -> [SKIP][16] ([i915#280])
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_ctx_sseu@engines.html
>
> * igt@gem_exec_balancer@bonded-true-hang:
> - shard-mtlp: NOTRUN -> [SKIP][17] ([i915#4812])
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_exec_balancer@bonded-true-hang.html
>
> * igt@gem_exec_fair@basic-none:
> - shard-dg2: NOTRUN -> [SKIP][18] ([i915#3539] / [i915#4852])
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_fair@basic-none.html
>
> * igt@gem_exec_fair@basic-none-solo:
> - shard-tglu: NOTRUN -> [FAIL][19] ([i915#2842]) +1 other test fail
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_exec_fair@basic-none-solo.html
>
> * igt@gem_exec_fair@basic-none@rcs0:
> - shard-glk: NOTRUN -> [FAIL][20] ([i915#2842]) +3 other tests fail
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_exec_fair@basic-none@rcs0.html
>
> * igt@gem_exec_fair@basic-pace-share:
> - shard-mtlp: NOTRUN -> [SKIP][21] ([i915#4473] / [i915#4771])
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@gem_exec_fair@basic-pace-share.html
>
> * igt@gem_exec_fair@basic-pace-solo@rcs0:
> - shard-rkl: [PASS][22] -> [FAIL][23] ([i915#2842]) +3 other tests fail
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
>
> * igt@gem_exec_params@rsvd2-dirt:
> - shard-dg2: NOTRUN -> [SKIP][24] ([i915#5107])
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_params@rsvd2-dirt.html
>
> * igt@gem_exec_reloc@basic-cpu-active:
> - shard-mtlp: NOTRUN -> [SKIP][25] ([i915#3281]) +1 other test skip
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_exec_reloc@basic-cpu-active.html
>
> * igt@gem_exec_reloc@basic-gtt-wc-active:
> - shard-dg2: NOTRUN -> [SKIP][26] ([i915#3281]) +5 other tests skip
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_reloc@basic-gtt-wc-active.html
>
> * igt@gem_exec_reloc@basic-wc-read:
> - shard-dg1: NOTRUN -> [SKIP][27] ([i915#3281])
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@gem_exec_reloc@basic-wc-read.html
>
> * igt@gem_exec_schedule@pi-ringfull@bcs0:
> - shard-glk: NOTRUN -> [FAIL][28] ([i915#12296]) +4 other tests fail
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_exec_schedule@pi-ringfull@bcs0.html
>
> * igt@gem_exec_schedule@pi-ringfull@ccs0:
> - shard-dg2: NOTRUN -> [FAIL][29] ([i915#12296]) +7 other tests fail
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_schedule@pi-ringfull@ccs0.html
>
> * igt@gem_exec_schedule@preempt-queue:
> - shard-dg2: NOTRUN -> [SKIP][30] ([i915#4537] / [i915#4812])
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_exec_schedule@preempt-queue.html
>
> * igt@gem_exec_suspend@basic-s0:
> - shard-dg2: [PASS][31] -> [INCOMPLETE][32] ([i915#11441]) +1 other test incomplete
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-4/igt@gem_exec_suspend@basic-s0.html
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-7/igt@gem_exec_suspend@basic-s0.html
>
> * igt@gem_fence_thrash@bo-copy:
> - shard-dg2: NOTRUN -> [SKIP][33] ([i915#4860]) +1 other test skip
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_fence_thrash@bo-copy.html
>
> * igt@gem_fenced_exec_thrash@no-spare-fences:
> - shard-dg1: NOTRUN -> [SKIP][34] ([i915#4860])
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@gem_fenced_exec_thrash@no-spare-fences.html
>
> * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
> - shard-mtlp: NOTRUN -> [SKIP][35] ([i915#4613]) +1 other test skip
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
>
> * igt@gem_lmem_swapping@parallel-random-verify-ccs:
> - shard-glk: NOTRUN -> [SKIP][36] ([i915#4613])
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
>
> * igt@gem_lmem_swapping@smem-oom:
> - shard-tglu: NOTRUN -> [SKIP][37] ([i915#4613])
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_lmem_swapping@smem-oom.html
>
> * igt@gem_mmap_gtt@basic-small-copy:
> - shard-mtlp: NOTRUN -> [SKIP][38] ([i915#4077])
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@gem_mmap_gtt@basic-small-copy.html
>
> * igt@gem_mmap_wc@write:
> - shard-mtlp: NOTRUN -> [SKIP][39] ([i915#4083]) +1 other test skip
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_mmap_wc@write.html
>
> * igt@gem_partial_pwrite_pread@writes-after-reads-display:
> - shard-mtlp: NOTRUN -> [SKIP][40] ([i915#3282]) +1 other test skip
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_partial_pwrite_pread@writes-after-reads-display.html
>
> * igt@gem_pwrite@basic-exhaustion:
> - shard-glk: NOTRUN -> [WARN][41] ([i915#2658])
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@gem_pwrite@basic-exhaustion.html
> - shard-dg2: NOTRUN -> [SKIP][42] ([i915#3282]) +1 other test skip
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_pwrite@basic-exhaustion.html
>
> * igt@gem_pxp@create-protected-buffer:
> - shard-dg2: NOTRUN -> [SKIP][43] ([i915#4270])
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@gem_pxp@create-protected-buffer.html
>
> * igt@gem_pxp@create-regular-context-2:
> - shard-mtlp: NOTRUN -> [SKIP][44] ([i915#4270]) +1 other test skip
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_pxp@create-regular-context-2.html
>
> * igt@gem_pxp@regular-baseline-src-copy-readible:
> - shard-tglu: NOTRUN -> [SKIP][45] ([i915#4270])
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_pxp@regular-baseline-src-copy-readible.html
>
> * igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
> - shard-dg2: NOTRUN -> [SKIP][46] ([i915#5190] / [i915#8428])
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
>
> * igt@gem_render_copy@yf-tiled-ccs-to-x-tiled:
> - shard-mtlp: NOTRUN -> [SKIP][47] ([i915#8428])
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_render_copy@yf-tiled-ccs-to-x-tiled.html
>
> * igt@gem_set_tiling_vs_gtt:
> - shard-dg2: NOTRUN -> [SKIP][48] ([i915#4079])
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@gem_set_tiling_vs_gtt.html
>
> * igt@gem_userptr_blits@access-control:
> - shard-mtlp: NOTRUN -> [SKIP][49] ([i915#3297])
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_userptr_blits@access-control.html
>
> * igt@gen9_exec_parse@basic-rejected:
> - shard-tglu: NOTRUN -> [SKIP][50] ([i915#2527] / [i915#2856])
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gen9_exec_parse@basic-rejected.html
>
> * igt@gen9_exec_parse@bb-secure:
> - shard-dg2: NOTRUN -> [SKIP][51] ([i915#2856]) +1 other test skip
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@gen9_exec_parse@bb-secure.html
>
> * igt@gen9_exec_parse@cmd-crossing-page:
> - shard-mtlp: NOTRUN -> [SKIP][52] ([i915#2856])
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gen9_exec_parse@cmd-crossing-page.html
>
> * igt@i915_module_load@reload-with-fault-injection:
> - shard-tglu: [PASS][53] -> [ABORT][54] ([i915#9820])
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html
>
> * igt@i915_pm_freq_api@freq-suspend:
> - shard-tglu: NOTRUN -> [SKIP][55] ([i915#8399])
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@i915_pm_freq_api@freq-suspend.html
>
> * igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
> - shard-dg1: [PASS][56] -> [FAIL][57] ([i915#3591]) +2 other tests fail
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
>
> * igt@i915_pm_rps@min-max-config-idle:
> - shard-dg2: NOTRUN -> [SKIP][58] ([i915#11681] / [i915#6621])
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@i915_pm_rps@min-max-config-idle.html
>
> * igt@i915_pm_rps@thresholds-idle:
> - shard-mtlp: NOTRUN -> [SKIP][59] ([i915#11681])
> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@i915_pm_rps@thresholds-idle.html
>
> * igt@i915_selftest@perf:
> - shard-snb: [PASS][60] -> [ABORT][61] ([i915#12450])
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb1/igt@i915_selftest@perf.html
> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb6/igt@i915_selftest@perf.html
>
> * igt@i915_selftest@perf@engine_cs:
> - shard-snb: [PASS][62] -> [ABORT][63] ([i915#11703])
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb1/igt@i915_selftest@perf@engine_cs.html
> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb6/igt@i915_selftest@perf@engine_cs.html
>
> * igt@i915_suspend@fence-restore-tiled2untiled:
> - shard-dg1: NOTRUN -> [SKIP][64] ([i915#4077])
> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@i915_suspend@fence-restore-tiled2untiled.html
>
> * igt@kms_addfb_basic@addfb25-x-tiled-legacy:
> - shard-dg2: NOTRUN -> [SKIP][65] ([i915#4212])
> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html
>
> * igt@kms_addfb_basic@clobberred-modifier:
> - shard-mtlp: NOTRUN -> [SKIP][66] ([i915#4212])
> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_addfb_basic@clobberred-modifier.html
>
> * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
> - shard-rkl: NOTRUN -> [SKIP][67] ([i915#8709]) +3 other tests skip
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html
>
> * igt@kms_atomic_transition@modeset-transition-fencing:
> - shard-glk: [PASS][68] -> [FAIL][69] ([i915#12238])
> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing.html
> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk8/igt@kms_atomic_transition@modeset-transition-fencing.html
>
> * igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs:
> - shard-glk: [PASS][70] -> [FAIL][71] ([i915#11859])
> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
> [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk8/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
>
> * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
> - shard-glk: NOTRUN -> [SKIP][72] ([i915#1769])
> [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk9/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
>
> * igt@kms_big_fb@4-tiled-addfb-size-overflow:
> - shard-tglu: NOTRUN -> [SKIP][73] ([i915#5286]) +1 other test skip
> [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
>
> * igt@kms_big_fb@y-tiled-32bpp-rotate-180:
> - shard-dg2: NOTRUN -> [SKIP][74] ([i915#5190] / [i915#9197])
> [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html
>
> * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
> - shard-dg2: NOTRUN -> [SKIP][75] ([i915#4538] / [i915#5190]) +1 other test skip
> [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html
>
> * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
> - shard-dg1: NOTRUN -> [SKIP][76] ([i915#4538])
> [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
> - shard-mtlp: NOTRUN -> [SKIP][77] +4 other tests skip
> [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
>
> * igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-1:
> - shard-dg2: NOTRUN -> [SKIP][78] ([i915#10307] / [i915#10434] / [i915#6095]) +3 other tests skip
> [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-1.html
>
> * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs@pipe-b-edp-1:
> - shard-mtlp: NOTRUN -> [SKIP][79] ([i915#6095]) +14 other tests skip
> [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs@pipe-b-edp-1.html
>
> * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-a-dp-3:
> - shard-dg2: NOTRUN -> [SKIP][80] ([i915#10307] / [i915#6095]) +157 other tests skip
> [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-a-dp-3.html
>
> * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
> - shard-rkl: NOTRUN -> [SKIP][81] ([i915#6095]) +93 other tests skip
> [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
>
> * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
> - shard-tglu: NOTRUN -> [SKIP][82] ([i915#12313])
> [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
>
> * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4:
> - shard-dg1: NOTRUN -> [SKIP][83] ([i915#6095]) +59 other tests skip
> [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4.html
>
> * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
> - shard-dg2: NOTRUN -> [SKIP][84] ([i915#12313]) +1 other test skip
> [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
>
> * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
> - shard-tglu: NOTRUN -> [SKIP][85] ([i915#6095]) +14 other tests skip
> [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
>
> * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1:
> - shard-glk: NOTRUN -> [SKIP][86] +87 other tests skip
> [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk9/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1.html
>
> * igt@kms_cdclk@mode-transition-all-outputs:
> - shard-mtlp: NOTRUN -> [SKIP][87] ([i915#7213] / [i915#9010])
> [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_cdclk@mode-transition-all-outputs.html
>
> * igt@kms_cdclk@plane-scaling@pipe-c-dp-3:
> - shard-dg2: NOTRUN -> [SKIP][88] ([i915#4087]) +3 other tests skip
> [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-c-dp-3.html
>
> * igt@kms_chamelium_edid@dp-mode-timings:
> - shard-mtlp: NOTRUN -> [SKIP][89] ([i915#7828]) +1 other test skip
> [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_chamelium_edid@dp-mode-timings.html
>
> * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
> - shard-tglu: NOTRUN -> [SKIP][90] ([i915#7828]) +1 other test skip
> [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
>
> * igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
> - shard-dg2: NOTRUN -> [SKIP][91] ([i915#7828]) +1 other test skip
> [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
>
> * igt@kms_content_protection@lic-type-0@pipe-a-dp-3:
> - shard-dg2: NOTRUN -> [TIMEOUT][92] ([i915#7173])
> [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_content_protection@lic-type-0@pipe-a-dp-3.html
>
> * igt@kms_content_protection@type1:
> - shard-mtlp: NOTRUN -> [SKIP][93] ([i915#3555] / [i915#6944] / [i915#9424])
> [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_content_protection@type1.html
>
> * igt@kms_content_protection@uevent:
> - shard-dg2: NOTRUN -> [SKIP][94] ([i915#7118] / [i915#9424])
> [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_content_protection@uevent.html
>
> * igt@kms_cursor_crc@cursor-offscreen-32x10:
> - shard-mtlp: NOTRUN -> [SKIP][95] ([i915#3555] / [i915#8814])
> [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-8/igt@kms_cursor_crc@cursor-offscreen-32x10.html
>
> * igt@kms_cursor_crc@cursor-random-128x42:
> - shard-mtlp: NOTRUN -> [SKIP][96] ([i915#8814]) +1 other test skip
> [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_cursor_crc@cursor-random-128x42.html
>
> * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
> - shard-dg1: NOTRUN -> [SKIP][97] ([i915#11453])
> [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
> - shard-mtlp: NOTRUN -> [SKIP][98] ([i915#11453])
> [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
>
> * igt@kms_cursor_crc@cursor-suspend:
> - shard-dg2: NOTRUN -> [INCOMPLETE][99] ([i915#12358] / [i915#7882])
> [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cursor_crc@cursor-suspend.html
>
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
> - shard-dg2: NOTRUN -> [SKIP][100] ([i915#4103] / [i915#4213])
> [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
>
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
> - shard-tglu: NOTRUN -> [SKIP][101] ([i915#4103])
> [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
>
> * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
> - shard-mtlp: NOTRUN -> [SKIP][102] ([i915#9809])
> [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
>
> * igt@kms_dsc@dsc-basic:
> - shard-mtlp: NOTRUN -> [SKIP][103] ([i915#3555] / [i915#3840] / [i915#9159])
> [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_dsc@dsc-basic.html
>
> * igt@kms_feature_discovery@psr1:
> - shard-dg2: NOTRUN -> [SKIP][104] ([i915#658])
> [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_feature_discovery@psr1.html
>
> * igt@kms_flip@2x-flip-vs-expired-vblank:
> - shard-dg2: NOTRUN -> [SKIP][105] +2 other tests skip
> [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_flip@2x-flip-vs-expired-vblank.html
>
> * igt@kms_flip@2x-flip-vs-rmfb:
> - shard-mtlp: NOTRUN -> [SKIP][106] ([i915#3637]) +1 other test skip
> [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_flip@2x-flip-vs-rmfb.html
>
> * igt@kms_flip@2x-flip-vs-wf_vblank:
> - shard-tglu: NOTRUN -> [SKIP][107] ([i915#3637])
> [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_flip@2x-flip-vs-wf_vblank.html
>
> * igt@kms_flip@2x-flip-vs-wf_vblank@ab-vga1-hdmi-a1:
> - shard-snb: [PASS][108] -> [FAIL][109] ([i915#10826]) +1 other test fail
> [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb7/igt@kms_flip@2x-flip-vs-wf_vblank@ab-vga1-hdmi-a1.html
> [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb1/igt@kms_flip@2x-flip-vs-wf_vblank@ab-vga1-hdmi-a1.html
>
> * igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2:
> - shard-glk: [PASS][110] -> [FAIL][111] ([i915#2122]) +1 other test fail
> [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk4/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html
> [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk8/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html
>
> * igt@kms_flip@blocking-wf_vblank:
> - shard-mtlp: [PASS][112] -> [FAIL][113] ([i915#2122]) +1 other test fail
> [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@kms_flip@blocking-wf_vblank.html
> [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_flip@blocking-wf_vblank.html
>
> * igt@kms_flip@plain-flip-ts-check-interruptible:
> - shard-tglu: NOTRUN -> [FAIL][114] ([i915#2122])
> [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-3/igt@kms_flip@plain-flip-ts-check-interruptible.html
>
> * igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1:
> - shard-tglu: [PASS][115] -> [FAIL][116] ([i915#2122]) +1 other test fail
> [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-7/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
> [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-3/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
> - shard-tglu: NOTRUN -> [SKIP][117] ([i915#2672] / [i915#3555])
> [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
> - shard-tglu: NOTRUN -> [SKIP][118] ([i915#2587] / [i915#2672])
> [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
> - shard-dg2: NOTRUN -> [SKIP][119] ([i915#2672]) +2 other tests skip
> [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
> - shard-dg2: NOTRUN -> [SKIP][120] ([i915#2672] / [i915#3555] / [i915#5190])
> [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
> - shard-dg2: [PASS][121] -> [SKIP][122] ([i915#3555]) +4 other tests skip
> [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
> [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
> - shard-mtlp: NOTRUN -> [SKIP][123] ([i915#2672] / [i915#3555] / [i915#8813]) +1 other test skip
> [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
> - shard-mtlp: NOTRUN -> [SKIP][124] ([i915#2672] / [i915#8813]) +1 other test skip
> [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt:
> - shard-mtlp: NOTRUN -> [SKIP][125] ([i915#8708])
> [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
> - shard-snb: [PASS][126] -> [SKIP][127]
> [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu.html
> [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
> - shard-dg1: NOTRUN -> [SKIP][128]
> [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
>
> * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
> - shard-dg2: [PASS][129] -> [SKIP][130] ([i915#5354]) +9 other tests skip
> [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
> [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
>
> * igt@kms_frontbuffer_tracking@fbc-stridechange:
> - shard-dg2: [PASS][131] -> [FAIL][132] ([i915#6880])
> [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-stridechange.html
> [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-stridechange.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
> - shard-dg2: NOTRUN -> [SKIP][133] ([i915#8708]) +2 other tests skip
> [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt:
> - shard-mtlp: NOTRUN -> [SKIP][134] ([i915#1825]) +6 other tests skip
> [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render:
> - shard-tglu: NOTRUN -> [SKIP][135] +22 other tests skip
> [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
> - shard-dg2: NOTRUN -> [SKIP][136] ([i915#3458]) +3 other tests skip
> [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
> - shard-dg1: NOTRUN -> [SKIP][137] ([i915#3458])
> [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
>
> * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt:
> - shard-dg2: NOTRUN -> [SKIP][138] ([i915#5354]) +12 other tests skip
> [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt.html
>
> * igt@kms_hdr@invalid-hdr:
> - shard-dg2: NOTRUN -> [SKIP][139] ([i915#3555] / [i915#8228])
> [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_hdr@invalid-hdr.html
>
> * igt@kms_hdr@invalid-metadata-sizes:
> - shard-tglu: NOTRUN -> [SKIP][140] ([i915#3555] / [i915#8228])
> [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_hdr@invalid-metadata-sizes.html
>
> * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1:
> - shard-snb: NOTRUN -> [SKIP][141] +2 other tests skip
> [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1.html
>
> * igt@kms_plane@plane-panning-bottom-right-suspend:
> - shard-dg2: NOTRUN -> [SKIP][142] ([i915#8825])
> [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane@plane-panning-bottom-right-suspend.html
>
> * igt@kms_plane@plane-position-covered:
> - shard-dg2: [PASS][143] -> [SKIP][144] ([i915#8825])
> [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane@plane-position-covered.html
> [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane@plane-position-covered.html
>
> * igt@kms_plane_alpha_blend@alpha-7efc:
> - shard-dg2: [PASS][145] -> [SKIP][146] ([i915#7294])
> [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_alpha_blend@alpha-7efc.html
> [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_alpha_blend@alpha-7efc.html
>
> * igt@kms_plane_multiple@tiling-yf:
> - shard-mtlp: NOTRUN -> [SKIP][147] ([i915#3555] / [i915#8806])
> [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_plane_multiple@tiling-yf.html
>
> * igt@kms_plane_scaling@intel-max-src-size:
> - shard-dg2: [PASS][148] -> [SKIP][149] ([i915#6953] / [i915#9423])
> [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-10/igt@kms_plane_scaling@intel-max-src-size.html
> [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-11/igt@kms_plane_scaling@intel-max-src-size.html
> - shard-rkl: [PASS][150] -> [FAIL][151] ([i915#8292])
> [150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size.html
> [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-5/igt@kms_plane_scaling@intel-max-src-size.html
>
> * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
> - shard-rkl: NOTRUN -> [FAIL][152] ([i915#8292])
> [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-5/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html
>
> * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation:
> - shard-dg2: [PASS][153] -> [SKIP][154] ([i915#12247] / [i915#8152] / [i915#9423]) +2 other tests skip
> [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
> [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
>
> * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-b:
> - shard-dg2: [PASS][155] -> [SKIP][156] ([i915#12247]) +11 other tests skip
> [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-b.html
> [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-b.html
>
> * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d:
> - shard-dg2: [PASS][157] -> [SKIP][158] ([i915#12247] / [i915#8152]) +3 other tests skip
> [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d.html
> [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d.html
>
> * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25:
> - shard-dg2: [PASS][159] -> [SKIP][160] ([i915#6953] / [i915#8152] / [i915#9423])
> [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
> [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
>
> * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
> - shard-mtlp: NOTRUN -> [SKIP][161] ([i915#12247] / [i915#3555])
> [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
>
> * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b:
> - shard-mtlp: NOTRUN -> [SKIP][162] ([i915#12247]) +3 other tests skip
> [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b.html
>
> * igt@kms_pm_backlight@bad-brightness:
> - shard-tglu: NOTRUN -> [SKIP][163] ([i915#9812])
> [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_pm_backlight@bad-brightness.html
>
> * igt@kms_pm_dc@dc5-psr:
> - shard-dg2: NOTRUN -> [SKIP][164] ([i915#9685])
> [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@kms_pm_dc@dc5-psr.html
> - shard-dg1: NOTRUN -> [SKIP][165] ([i915#9685])
> [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_pm_dc@dc5-psr.html
>
> * igt@kms_pm_lpsp@screens-disabled:
> - shard-tglu: NOTRUN -> [SKIP][166] ([i915#8430])
> [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_pm_lpsp@screens-disabled.html
>
> * igt@kms_pm_rpm@dpms-lpsp:
> - shard-rkl: [PASS][167] -> [SKIP][168] ([i915#9519]) +3 other tests skip
> [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-2/igt@kms_pm_rpm@dpms-lpsp.html
> [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-3/igt@kms_pm_rpm@dpms-lpsp.html
>
> * igt@kms_pm_rpm@modeset-non-lpsp-stress:
> - shard-tglu: NOTRUN -> [SKIP][169] ([i915#9519])
> [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
>
> * igt@kms_prime@d3hot:
> - shard-dg2: NOTRUN -> [SKIP][170] ([i915#6524] / [i915#6805])
> [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@kms_prime@d3hot.html
>
> * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
> - shard-mtlp: NOTRUN -> [SKIP][171] ([i915#9808])
> [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html
>
> * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
> - shard-mtlp: NOTRUN -> [SKIP][172] ([i915#12316]) +1 other test skip
> [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html
>
> * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
> - shard-glk: NOTRUN -> [SKIP][173] ([i915#11520])
> [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
> - shard-dg2: NOTRUN -> [SKIP][174] ([i915#11520])
> [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
>
> * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
> - shard-tglu: NOTRUN -> [SKIP][175] ([i915#11520]) +2 other tests skip
> [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html
>
> * igt@kms_psr2_su@page_flip-nv12:
> - shard-dg2: NOTRUN -> [SKIP][176] ([i915#9683])
> [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-3/igt@kms_psr2_su@page_flip-nv12.html
>
> * igt@kms_psr@fbc-pr-primary-blt:
> - shard-mtlp: NOTRUN -> [SKIP][177] ([i915#9688]) +5 other tests skip
> [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_psr@fbc-pr-primary-blt.html
>
> * igt@kms_psr@psr-primary-blt:
> - shard-dg1: NOTRUN -> [SKIP][178] ([i915#1072] / [i915#9732]) +1 other test skip
> [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_psr@psr-primary-blt.html
>
> * igt@kms_psr@psr2-cursor-plane-move:
> - shard-dg2: NOTRUN -> [SKIP][179] ([i915#1072] / [i915#9732]) +5 other tests skip
> [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_psr@psr2-cursor-plane-move.html
>
> * igt@kms_psr@psr2-cursor-plane-onoff:
> - shard-tglu: NOTRUN -> [SKIP][180] ([i915#9732]) +4 other tests skip
> [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_psr@psr2-cursor-plane-onoff.html
>
> * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
> - shard-dg1: NOTRUN -> [SKIP][181] ([i915#5289])
> [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-19/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
>
> * igt@kms_scaling_modes@scaling-mode-full-aspect:
> - shard-dg2: NOTRUN -> [SKIP][182] ([i915#3555]) +1 other test skip
> [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_scaling_modes@scaling-mode-full-aspect.html
>
> * igt@kms_universal_plane@universal-plane-sanity:
> - shard-dg2: [PASS][183] -> [SKIP][184] ([i915#9197]) +20 other tests skip
> [183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_universal_plane@universal-plane-sanity.html
> [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_universal_plane@universal-plane-sanity.html
>
> * igt@kms_vrr@flip-dpms:
> - shard-tglu: NOTRUN -> [SKIP][185] ([i915#3555]) +1 other test skip
> [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@kms_vrr@flip-dpms.html
>
> * igt@kms_vrr@lobf:
> - shard-mtlp: NOTRUN -> [SKIP][186] ([i915#11920])
> [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@kms_vrr@lobf.html
>
> * igt@kms_writeback@writeback-invalid-parameters:
> - shard-glk: NOTRUN -> [SKIP][187] ([i915#2437])
> [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@kms_writeback@writeback-invalid-parameters.html
> - shard-dg2: NOTRUN -> [SKIP][188] ([i915#2437])
> [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_writeback@writeback-invalid-parameters.html
>
> * igt@perf_pmu@all-busy-idle-check-all:
> - shard-dg1: [PASS][189] -> [DMESG-WARN][190] ([i915#4423]) +2 other tests dmesg-warn
> [189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-15/igt@perf_pmu@all-busy-idle-check-all.html
> [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@perf_pmu@all-busy-idle-check-all.html
>
> * igt@prime_vgem@basic-read:
> - shard-dg2: NOTRUN -> [SKIP][191] ([i915#3291] / [i915#3708])
> [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@prime_vgem@basic-read.html
>
>
> #### Possible fixes ####
>
> * igt@gem_ctx_engines@invalid-engines:
> - shard-mtlp: [FAIL][192] ([i915#12027] / [i915#12031]) -> [PASS][193]
> [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@gem_ctx_engines@invalid-engines.html
> [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-5/igt@gem_ctx_engines@invalid-engines.html
>
> * igt@gem_eio@kms:
> - shard-dg2: [FAIL][194] ([i915#5784]) -> [PASS][195]
> [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-3/igt@gem_eio@kms.html
> [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-4/igt@gem_eio@kms.html
>
> * igt@gem_exec_suspend@basic-s4-devices:
> - shard-tglu: [ABORT][196] ([i915#7975] / [i915#8213]) -> [PASS][197] +1 other test pass
> [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices.html
> [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-8/igt@gem_exec_suspend@basic-s4-devices.html
>
> * igt@gem_mmap_offset@clear:
> - shard-mtlp: [ABORT][198] ([i915#10729]) -> [PASS][199]
> [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@gem_mmap_offset@clear.html
> [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_mmap_offset@clear.html
>
> * igt@gem_mmap_offset@clear@smem0:
> - shard-mtlp: [ABORT][200] ([i915#10029] / [i915#10729]) -> [PASS][201]
> [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@gem_mmap_offset@clear@smem0.html
> [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-4/igt@gem_mmap_offset@clear@smem0.html
>
> * igt@i915_module_load@reload-with-fault-injection:
> - shard-glk: [ABORT][202] ([i915#9820]) -> [PASS][203]
> [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk2/igt@i915_module_load@reload-with-fault-injection.html
> [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk7/igt@i915_module_load@reload-with-fault-injection.html
> - shard-dg2: [ABORT][204] ([i915#9820]) -> [PASS][205]
> [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-4/igt@i915_module_load@reload-with-fault-injection.html
> [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@i915_module_load@reload-with-fault-injection.html
>
> * igt@i915_power@sanity:
> - shard-mtlp: [SKIP][206] ([i915#7984]) -> [PASS][207]
> [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-5/igt@i915_power@sanity.html
> [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-5/igt@i915_power@sanity.html
>
> * igt@kms_cursor_crc@cursor-suspend:
> - shard-mtlp: [INCOMPLETE][208] ([i915#12358]) -> [PASS][209] +1 other test pass
> [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-1/igt@kms_cursor_crc@cursor-suspend.html
> [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-8/igt@kms_cursor_crc@cursor-suspend.html
>
> * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
> - shard-glk: [TIMEOUT][210] -> [PASS][211]
> [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
> [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
>
> * igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1:
> - shard-snb: [FAIL][212] ([i915#2122]) -> [PASS][213] +1 other test pass
> [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb7/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html
> [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html
>
> * igt@kms_flip@blocking-wf_vblank:
> - shard-dg2: [FAIL][214] ([i915#2122]) -> [PASS][215]
> [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-10/igt@kms_flip@blocking-wf_vblank.html
> [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-1/igt@kms_flip@blocking-wf_vblank.html
>
> * igt@kms_flip@blocking-wf_vblank@b-hdmi-a1:
> - shard-tglu: [FAIL][216] ([i915#2122]) -> [PASS][217] +2 other tests pass
> [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-tglu-8/igt@kms_flip@blocking-wf_vblank@b-hdmi-a1.html
> [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-tglu-7/igt@kms_flip@blocking-wf_vblank@b-hdmi-a1.html
>
> * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
> - shard-mtlp: [FAIL][218] ([i915#79]) -> [PASS][219] +1 other test pass
> [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-mtlp-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
> [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-mtlp-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
>
> * igt@kms_flip@modeset-vs-vblank-race:
> - shard-dg2: [SKIP][220] ([i915#5354]) -> [PASS][221] +6 other tests pass
> [220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_flip@modeset-vs-vblank-race.html
> [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_flip@modeset-vs-vblank-race.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
> - shard-dg2: [SKIP][222] ([i915#3555]) -> [PASS][223]
> [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
> [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
> - shard-snb: [INCOMPLETE][224] -> [PASS][225]
> [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
> [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
> - shard-snb: [SKIP][226] -> [PASS][227] +1 other test pass
> [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
> [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
>
> * igt@kms_hdr@static-toggle:
> - shard-dg2: [SKIP][228] ([i915#3555] / [i915#8228]) -> [PASS][229]
> [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-11/igt@kms_hdr@static-toggle.html
> [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_hdr@static-toggle.html
>
> * igt@kms_joiner@basic-force-big-joiner:
> - shard-dg2: [SKIP][230] ([i915#12388]) -> [PASS][231]
> [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_joiner@basic-force-big-joiner.html
> [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_joiner@basic-force-big-joiner.html
>
> * igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant:
> - shard-dg2: [SKIP][232] ([i915#7294]) -> [PASS][233] +1 other test pass
> [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant.html
> [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant.html
>
> * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-b:
> - shard-dg2: [SKIP][234] ([i915#12247]) -> [PASS][235] +8 other tests pass
> [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-b.html
> [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-b.html
>
> * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d:
> - shard-dg2: [SKIP][236] ([i915#12247] / [i915#8152]) -> [PASS][237] +2 other tests pass
> [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d.html
> [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d.html
>
> * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation:
> - shard-dg2: [SKIP][238] ([i915#12247] / [i915#8152] / [i915#9423]) -> [PASS][239] +1 other test pass
> [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation.html
> [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation.html
>
> * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
> - shard-dg2: [SKIP][240] ([i915#12247] / [i915#6953] / [i915#8152] / [i915#9423]) -> [PASS][241]
> [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
> [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
>
> * igt@kms_pm_rpm@cursor-dpms:
> - shard-dg2: [SKIP][242] ([i915#1849]) -> [PASS][243]
> [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_pm_rpm@cursor-dpms.html
> [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_pm_rpm@cursor-dpms.html
>
> * igt@kms_pm_rpm@dpms-lpsp:
> - shard-dg2: [SKIP][244] ([i915#9519]) -> [PASS][245] +1 other test pass
> [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-6/igt@kms_pm_rpm@dpms-lpsp.html
> [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-4/igt@kms_pm_rpm@dpms-lpsp.html
>
> * igt@kms_pm_rpm@modeset-lpsp-stress:
> - shard-rkl: [SKIP][246] ([i915#9519]) -> [PASS][247] +1 other test pass
> [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp-stress.html
> [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html
>
> * igt@kms_vblank@ts-continuation-dpms-suspend:
> - shard-dg2: [SKIP][248] ([i915#9197]) -> [PASS][249] +20 other tests pass
> [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
> [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_vblank@ts-continuation-dpms-suspend.html
>
>
> #### Warnings ####
>
> * igt@i915_selftest@mock:
> - shard-glk: [DMESG-WARN][250] ([i915#9311]) -> [DMESG-WARN][251] ([i915#1982] / [i915#9311])
> [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-glk3/igt@i915_selftest@mock.html
> [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-glk3/igt@i915_selftest@mock.html
>
> * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
> - shard-dg2: [SKIP][252] ([i915#9197]) -> [SKIP][253] +2 other tests skip
> [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
> [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
>
> * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
> - shard-dg2: [SKIP][254] ([i915#5190] / [i915#9197]) -> [SKIP][255] ([i915#4538] / [i915#5190]) +4 other tests skip
> [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
> [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
>
> * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
> - shard-dg2: [SKIP][256] ([i915#4538] / [i915#5190]) -> [SKIP][257] ([i915#5190] / [i915#9197]) +4 other tests skip
> [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
> [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
>
> * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc:
> - shard-dg2: [SKIP][258] ([i915#10307] / [i915#6095]) -> [SKIP][259] ([i915#9197]) +5 other tests skip
> [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
> [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
>
> * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc:
> - shard-dg2: [SKIP][260] ([i915#9197]) -> [SKIP][261] ([i915#10307] / [i915#6095]) +6 other tests skip
> [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html
> [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html
>
> * igt@kms_cdclk@plane-scaling:
> - shard-dg2: [SKIP][262] ([i915#9197]) -> [SKIP][263] ([i915#4087])
> [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_cdclk@plane-scaling.html
> [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cdclk@plane-scaling.html
>
> * igt@kms_chamelium_hpd@hdmi-hpd-storm:
> - shard-dg1: [SKIP][264] ([i915#7828]) -> [SKIP][265] ([i915#4423] / [i915#7828])
> [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-15/igt@kms_chamelium_hpd@hdmi-hpd-storm.html
> [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_chamelium_hpd@hdmi-hpd-storm.html
>
> * igt@kms_content_protection@atomic-dpms:
> - shard-dg2: [SKIP][266] ([i915#7118] / [i915#9424]) -> [SKIP][267] ([i915#9197])
> [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_content_protection@atomic-dpms.html
> [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_content_protection@atomic-dpms.html
>
> * igt@kms_content_protection@content-type-change:
> - shard-dg2: [SKIP][268] ([i915#9197]) -> [SKIP][269] ([i915#9424]) +1 other test skip
> [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_content_protection@content-type-change.html
> [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_content_protection@content-type-change.html
>
> * igt@kms_content_protection@dp-mst-type-0:
> - shard-dg2: [SKIP][270] ([i915#3299]) -> [SKIP][271] ([i915#9197])
> [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_content_protection@dp-mst-type-0.html
> [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_content_protection@dp-mst-type-0.html
>
> * igt@kms_content_protection@lic-type-0:
> - shard-dg2: [SKIP][272] ([i915#9197]) -> [TIMEOUT][273] ([i915#7173])
> [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_content_protection@lic-type-0.html
> [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_content_protection@lic-type-0.html
>
> * igt@kms_content_protection@srm:
> - shard-dg2: [TIMEOUT][274] ([i915#7173]) -> [SKIP][275] ([i915#7118])
> [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-10/igt@kms_content_protection@srm.html
> [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-11/igt@kms_content_protection@srm.html
>
> * igt@kms_cursor_crc@cursor-offscreen-max-size:
> - shard-dg2: [SKIP][276] ([i915#3555]) -> [SKIP][277] ([i915#9197])
> [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_cursor_crc@cursor-offscreen-max-size.html
> [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_cursor_crc@cursor-offscreen-max-size.html
>
> * igt@kms_cursor_crc@cursor-random-max-size:
> - shard-dg2: [SKIP][278] ([i915#9197]) -> [SKIP][279] ([i915#3555]) +4 other tests skip
> [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_cursor_crc@cursor-random-max-size.html
> [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_cursor_crc@cursor-random-max-size.html
>
> * igt@kms_cursor_crc@cursor-sliding-512x170:
> - shard-dg2: [SKIP][280] ([i915#11453]) -> [SKIP][281] ([i915#9197]) +1 other test skip
> [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_cursor_crc@cursor-sliding-512x170.html
> [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_cursor_crc@cursor-sliding-512x170.html
>
> * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
> - shard-dg2: [SKIP][282] ([i915#5354]) -> [SKIP][283] ([i915#9197])
> [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
> [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
>
> * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
> - shard-dg2: [SKIP][284] ([i915#9197]) -> [SKIP][285] ([i915#5354])
> [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
> [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
>
> * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
> - shard-dg2: [SKIP][286] ([i915#9197]) -> [SKIP][287] ([i915#9833])
> [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
> [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
>
> * igt@kms_dsc@dsc-fractional-bpp:
> - shard-dg2: [SKIP][288] ([i915#3840] / [i915#9688]) -> [SKIP][289] ([i915#9197])
> [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_dsc@dsc-fractional-bpp.html
> [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_dsc@dsc-fractional-bpp.html
>
> * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
> - shard-dg2: [SKIP][290] ([i915#9197]) -> [SKIP][291] ([i915#3840])
> [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
> [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
>
> * igt@kms_dsc@dsc-with-output-formats-with-bpc:
> - shard-dg2: [SKIP][292] ([i915#9197]) -> [SKIP][293] ([i915#3840] / [i915#9053])
> [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
> [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
> - shard-dg2: [SKIP][294] ([i915#3555] / [i915#5190]) -> [SKIP][295] ([i915#2672] / [i915#3555] / [i915#5190]) +1 other test skip
> [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
> [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt:
> - shard-dg2: [SKIP][296] ([i915#8708]) -> [SKIP][297] ([i915#5354]) +8 other tests skip
> [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
> [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
> - shard-dg2: [SKIP][298] ([i915#5354]) -> [SKIP][299] ([i915#8708]) +5 other tests skip
> [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
> [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
> - shard-dg2: [SKIP][300] ([i915#5354]) -> [SKIP][301] ([i915#3458]) +6 other tests skip
> [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
> [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
> - shard-dg2: [SKIP][302] ([i915#5354]) -> [SKIP][303] ([i915#10055])
> [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
> [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
> - shard-dg2: [SKIP][304] ([i915#3458]) -> [SKIP][305] ([i915#5354]) +6 other tests skip
> [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
> [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
> - shard-dg2: [SKIP][306] ([i915#3458]) -> [SKIP][307] ([i915#10433] / [i915#3458]) +4 other tests skip
> [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
> [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
>
> * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc:
> - shard-dg1: [SKIP][308] ([i915#4423] / [i915#8708]) -> [SKIP][309] ([i915#8708])
> [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
> [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
>
> * igt@kms_hdr@static-toggle-suspend:
> - shard-dg2: [SKIP][310] ([i915#9197]) -> [SKIP][311] ([i915#3555] / [i915#8228])
> [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_hdr@static-toggle-suspend.html
> [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_hdr@static-toggle-suspend.html
>
> * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation:
> - shard-dg2: [SKIP][312] ([i915#12247] / [i915#8152] / [i915#9423]) -> [SKIP][313] ([i915#12247] / [i915#9423])
> [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html
> [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html
>
> * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d:
> - shard-dg2: [SKIP][314] ([i915#12247] / [i915#8152]) -> [SKIP][315] ([i915#12247])
> [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d.html
> [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-d.html
>
> * igt@kms_pm_lpsp@kms-lpsp:
> - shard-rkl: [SKIP][316] ([i915#3828]) -> [SKIP][317] ([i915#9340])
> [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
> [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-rkl-5/igt@kms_pm_lpsp@kms-lpsp.html
>
> * igt@kms_psr@pr-sprite-plane-onoff:
> - shard-dg1: [SKIP][318] ([i915#1072] / [i915#9732]) -> [SKIP][319] ([i915#1072] / [i915#4423] / [i915#9732])
> [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg1-13/igt@kms_psr@pr-sprite-plane-onoff.html
> [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg1-14/igt@kms_psr@pr-sprite-plane-onoff.html
>
> * igt@kms_rotation_crc@primary-rotation-270:
> - shard-dg2: [SKIP][320] ([i915#9197]) -> [SKIP][321] ([i915#11131]) +1 other test skip
> [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_rotation_crc@primary-rotation-270.html
> [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_rotation_crc@primary-rotation-270.html
>
> * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
> - shard-dg2: [SKIP][322] ([i915#5190] / [i915#9197]) -> [SKIP][323] ([i915#11131] / [i915#5190])
> [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
> [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
>
> * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
> - shard-dg2: [SKIP][324] ([i915#8623]) -> [SKIP][325] ([i915#9197])
> [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
> [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
>
> * igt@kms_vrr@seamless-rr-switch-drrs:
> - shard-dg2: [SKIP][326] ([i915#9906]) -> [SKIP][327] ([i915#9197])
> [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15562/shard-dg2-8/igt@kms_vrr@seamless-rr-switch-drrs.html
> [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/shard-dg2-2/igt@kms_vrr@seamless-rr-switch-drrs.html
>
>
> [i915#10029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10029
> [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
> [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
> [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
> [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
> [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
> [i915#10729]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10729
> [i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
> [i915#11131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11131
> [i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
> [i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453
> [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
> [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
> [i915#11703]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11703
> [i915#11859]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11859
> [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
> [i915#12027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12027
> [i915#12031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12031
> [i915#12065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12065
> [i915#12238]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12238
> [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
> [i915#12296]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12296
> [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
> [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
> [i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
> [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
> [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
> [i915#12450]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12450
> [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
> [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
> [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
> [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
> [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
> [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
> [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
> [i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582
> [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
> [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
> [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
> [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
> [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
> [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
> [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
> [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
> [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
> [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
> [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
> [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
> [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
> [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
> [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
> [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
> [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
> [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
> [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
> [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
> [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
> [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
> [i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
> [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
> [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
> [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
> [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
> [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
> [i915#4473]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4473
> [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
> [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
> [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
> [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
> [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
> [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
> [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
> [i915#5107]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5107
> [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
> [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
> [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
> [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
> [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
> [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
> [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
> [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
> [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
> [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
> [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
> [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
> [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
> [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
> [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
> [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
> [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
> [i915#7294]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7294
> [i915#7297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7297
> [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
> [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
> [i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
> [i915#79]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/79
> [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
> [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
> [i915#8152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8152
> [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
> [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
> [i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
> [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
> [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
> [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
> [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
> [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
> [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
> [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
> [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
> [i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
> [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
> [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
> [i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
> [i915#9010]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9010
> [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
> [i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159
> [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
> [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
> [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
> [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
> [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
> [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
> [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
> [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
> [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
> [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
> [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
> [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
> [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
> [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
> [i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833
> [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
>
>
> Build changes
> -------------
>
> * Linux: CI_DRM_15562 -> Patchwork_139731v4
>
> CI-20190529: 20190529
> CI_DRM_15562: fe768c9d3f0cfbe30a1dddf3ae2319d1e04a4403 @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_8080: 20fcbc59241a16c84d12f4f6ba390fb46fd65a36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_139731v4: fe768c9d3f0cfbe30a1dddf3ae2319d1e04a4403 @ git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139731v4/index.html
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-18 20:03 ` [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Matt Atwood
@ 2024-10-23 17:52 ` Matt Roper
2024-10-24 2:52 ` Kandpal, Suraj
0 siblings, 1 reply; 23+ messages in thread
From: Matt Roper @ 2024-10-23 17:52 UTC (permalink / raw)
To: Matt Atwood; +Cc: intel-xe, intel-gfx, Suraj Kandpal
On Fri, Oct 18, 2024 at 01:03:07PM -0700, Matt Atwood wrote:
> From: Suraj Kandpal <suraj.kandpal@intel.com>
>
> We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
> encoder.
This is still missing the "why" for this change. Is there a bspec
reference that gives the details? From the description of the bit
itself, it sounds like the setting here (for both Xe3 and earlier Xe2)
should be based on the HDCP version rather than the platform/stepping.
As mentioned previously, this entire function is labeled as "/* WA:
16022217614 */" If we're now using this function for something other
than that specific workaround, then we need to fix/move that comment.
Matt
>
> v2: add additional definition instead of function, commit message typo
> fix and update.
> v3: restore lost conditional from v2.
> v4: subject line and subject message updated, fix the if ladder order,
> fix the bit definition order.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index ed6aa87403e2..70dfc9d4d6ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -43,14 +43,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
> return;
>
> if (DISPLAY_VER(display) >= 14) {
> - if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0, STEP_FOREVER))
> - intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp->cpu_transcoder),
> - 0, HDCP_LINE_REKEY_DISABLE);
> + if (DISPLAY_VER(display) >= 30)
> + intel_de_rmw(display,
> + TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder),
> + 0, XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0, STEP_FOREVER) ||
> IS_DISPLAY_VER_STEP(display, IP_VER(20, 0), STEP_B0, STEP_FOREVER))
> intel_de_rmw(display,
> TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder),
> 0, TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> + else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0, STEP_FOREVER))
> + intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp->cpu_transcoder),
> + 0, HDCP_LINE_REKEY_DISABLE);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 89e4381f8baa..8d758947f301 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3817,6 +3817,7 @@ enum skl_power_gate {
> #define TRANS_DDI_PVSYNC (1 << 17)
> #define TRANS_DDI_PHSYNC (1 << 16)
> #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
> #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> --
> 2.45.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-23 17:52 ` Matt Roper
@ 2024-10-24 2:52 ` Kandpal, Suraj
2024-10-25 18:58 ` Matt Roper
0 siblings, 1 reply; 23+ messages in thread
From: Kandpal, Suraj @ 2024-10-24 2:52 UTC (permalink / raw)
To: Roper, Matthew D, Atwood, Matthew S
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> Sent: Wednesday, October 23, 2024 11:22 PM
> To: Atwood, Matthew S <matthew.s.atwood@intel.com>
> Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Kandpal,
> Suraj <suraj.kandpal@intel.com>
> Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for
> Xe3
>
> On Fri, Oct 18, 2024 at 01:03:07PM -0700, Matt Atwood wrote:
> > From: Suraj Kandpal <suraj.kandpal@intel.com>
> >
> > We need to disable HDCP Line Rekeying for Xe3 when we are using an
> > HDMI encoder.
>
> This is still missing the "why" for this change. Is there a bspec reference that
> gives the details? From the description of the bit itself, it sounds like the
> setting here (for both Xe3 and earlier Xe2) should be based on the HDCP
> version rather than the platform/stepping.
>
> As mentioned previously, this entire function is labeled as "/* WA:
> 16022217614 */" If we're now using this function for something other than
> that specific workaround, then we need to fix/move that comment.
>
>
Bspec: 68933
> Matt
>
> >
> > v2: add additional definition instead of function, commit message typo
> > fix and update.
> > v3: restore lost conditional from v2.
> > v4: subject line and subject message updated, fix the if ladder order,
> > fix the bit definition order.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > 2 files changed, 8 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index ed6aa87403e2..70dfc9d4d6ac 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -43,14 +43,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct
> intel_encoder *encoder,
> > return;
> >
> > if (DISPLAY_VER(display) >= 14) {
> > - if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> STEP_FOREVER))
> > - intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> >cpu_transcoder),
> > - 0, HDCP_LINE_REKEY_DISABLE);
> > + if (DISPLAY_VER(display) >= 30)
> > + intel_de_rmw(display,
> > + TRANS_DDI_FUNC_CTL(display, hdcp-
> >cpu_transcoder),
> > + 0,
> XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0,
> STEP_FOREVER) ||
> > IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
> STEP_B0, STEP_FOREVER))
> > intel_de_rmw(display,
> > TRANS_DDI_FUNC_CTL(display, hdcp-
> >cpu_transcoder),
> > 0,
> TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > + else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> STEP_FOREVER))
> > + intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> >cpu_transcoder),
> > + 0, HDCP_LINE_REKEY_DISABLE);
> > }
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 89e4381f8baa..8d758947f301
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3817,6 +3817,7 @@ enum skl_power_gate {
> > #define TRANS_DDI_PVSYNC (1 << 17)
> > #define TRANS_DDI_PHSYNC (1 << 16)
> > #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> > +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
> > #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> > #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> > #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> > --
> > 2.45.0
> >
>
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-24 2:52 ` Kandpal, Suraj
@ 2024-10-25 18:58 ` Matt Roper
2024-10-28 4:11 ` Kandpal, Suraj
0 siblings, 1 reply; 23+ messages in thread
From: Matt Roper @ 2024-10-25 18:58 UTC (permalink / raw)
To: Kandpal, Suraj
Cc: Atwood, Matthew S, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
On Thu, Oct 24, 2024 at 02:52:14AM +0000, Kandpal, Suraj wrote:
>
>
> > -----Original Message-----
> > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > Sent: Wednesday, October 23, 2024 11:22 PM
> > To: Atwood, Matthew S <matthew.s.atwood@intel.com>
> > Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Kandpal,
> > Suraj <suraj.kandpal@intel.com>
> > Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for
> > Xe3
> >
> > On Fri, Oct 18, 2024 at 01:03:07PM -0700, Matt Atwood wrote:
> > > From: Suraj Kandpal <suraj.kandpal@intel.com>
> > >
> > > We need to disable HDCP Line Rekeying for Xe3 when we are using an
> > > HDMI encoder.
> >
> > This is still missing the "why" for this change. Is there a bspec reference that
> > gives the details? From the description of the bit itself, it sounds like the
> > setting here (for both Xe3 and earlier Xe2) should be based on the HDCP
> > version rather than the platform/stepping.
> >
> > As mentioned previously, this entire function is labeled as "/* WA:
> > 16022217614 */" If we're now using this function for something other than
> > that specific workaround, then we need to fix/move that comment.
> >
> >
>
> Bspec: 68933
I think you pasted the wrong number here? This is a generic page that
just has links to four transcoder DDI registers and nothing else. It
doesn't have anything to do with HDCP rekeying.
Maybe you meant 69964 (which is one of the four links from the page
above) that gives the register definition of TRANS_DDI_FUNC_CTL? But
the info there implies that we're not really handling this properly
since it says that we need to enable/disable rekeying based on the HDCP
version. We're disabling for HDCP 2.0 and above here (correct), but I
don't see where we're handling the enabling for HDCP 1.4 and earlier?
Unless I'm overlooking something, it seems like the driver always
updates TRANS_DDI_FUNC_CTL with a rmw cycle rather than building a new
value from scratch, so we can't really rely on the bit being 0 by
default for the cases where rekeying should be enabled.
Matt
>
>
> > Matt
> >
> > >
> > > v2: add additional definition instead of function, commit message typo
> > > fix and update.
> > > v3: restore lost conditional from v2.
> > > v4: subject line and subject message updated, fix the if ladder order,
> > > fix the bit definition order.
> > >
> > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
> > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > 2 files changed, 8 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > index ed6aa87403e2..70dfc9d4d6ac 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > @@ -43,14 +43,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct
> > intel_encoder *encoder,
> > > return;
> > >
> > > if (DISPLAY_VER(display) >= 14) {
> > > - if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> > STEP_FOREVER))
> > > - intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> > >cpu_transcoder),
> > > - 0, HDCP_LINE_REKEY_DISABLE);
> > > + if (DISPLAY_VER(display) >= 30)
> > > + intel_de_rmw(display,
> > > + TRANS_DDI_FUNC_CTL(display, hdcp-
> > >cpu_transcoder),
> > > + 0,
> > XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0,
> > STEP_FOREVER) ||
> > > IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
> > STEP_B0, STEP_FOREVER))
> > > intel_de_rmw(display,
> > > TRANS_DDI_FUNC_CTL(display, hdcp-
> > >cpu_transcoder),
> > > 0,
> > TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > + else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> > STEP_FOREVER))
> > > + intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> > >cpu_transcoder),
> > > + 0, HDCP_LINE_REKEY_DISABLE);
> > > }
> > > }
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h index 89e4381f8baa..8d758947f301
> > > 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -3817,6 +3817,7 @@ enum skl_power_gate {
> > > #define TRANS_DDI_PVSYNC (1 << 17)
> > > #define TRANS_DDI_PHSYNC (1 << 16)
> > > #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> > > +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
> > > #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> > > #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> > > #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> > > --
> > > 2.45.0
> > >
> >
> > --
> > Matt Roper
> > Graphics Software Engineer
> > Linux GPU Platform Enablement
> > Intel Corporation
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-25 18:58 ` Matt Roper
@ 2024-10-28 4:11 ` Kandpal, Suraj
2024-10-30 0:02 ` Matt Roper
0 siblings, 1 reply; 23+ messages in thread
From: Kandpal, Suraj @ 2024-10-28 4:11 UTC (permalink / raw)
To: Roper, Matthew D, Nautiyal, Ankit K
Cc: Atwood, Matthew S, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> Sent: Saturday, October 26, 2024 12:28 AM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>
> Cc: Atwood, Matthew S <matthew.s.atwood@intel.com>; intel-
> xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for
> Xe3
>
> On Thu, Oct 24, 2024 at 02:52:14AM +0000, Kandpal, Suraj wrote:
> >
> >
> > > -----Original Message-----
> > > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > > Sent: Wednesday, October 23, 2024 11:22 PM
> > > To: Atwood, Matthew S <matthew.s.atwood@intel.com>
> > > Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
> > > Kandpal, Suraj <suraj.kandpal@intel.com>
> > > Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line
> > > Rekeying for
> > > Xe3
> > >
> > > On Fri, Oct 18, 2024 at 01:03:07PM -0700, Matt Atwood wrote:
> > > > From: Suraj Kandpal <suraj.kandpal@intel.com>
> > > >
> > > > We need to disable HDCP Line Rekeying for Xe3 when we are using an
> > > > HDMI encoder.
> > >
> > > This is still missing the "why" for this change. Is there a bspec
> > > reference that gives the details? From the description of the bit
> > > itself, it sounds like the setting here (for both Xe3 and earlier
> > > Xe2) should be based on the HDCP version rather than the
> platform/stepping.
> > >
> > > As mentioned previously, this entire function is labeled as "/* WA:
> > > 16022217614 */" If we're now using this function for something
> > > other than that specific workaround, then we need to fix/move that
> comment.
> > >
> > >
> >
> > Bspec: 68933
>
> I think you pasted the wrong number here? This is a generic page that just
> has links to four transcoder DDI registers and nothing else. It doesn't have
> anything to do with HDCP rekeying.
>
> Maybe you meant 69964 (which is one of the four links from the page
> above) that gives the register definition of TRANS_DDI_FUNC_CTL? But the
> info there implies that we're not really handling this properly since it says that
> we need to enable/disable rekeying based on the HDCP version. We're
> disabling for HDCP 2.0 and above here (correct), but I don't see where we're
> handling the enabling for HDCP 1.4 and earlier?
> Unless I'm overlooking something, it seems like the driver always updates
> TRANS_DDI_FUNC_CTL with a rmw cycle rather than building a new value
> from scratch, so we can't really rely on the bit being 0 by default for the cases
> where rekeying should be enabled.
From what I can see TRANS_DDI_FUNC_CTL is written via intel_ddi_enable_transcoder_func()
Which fills in the values to be written by intel_ddi_transcoder_func_reg_val_get where the line rekey bit
ends up being 0 by default which make me believe that separate handling for HDCP 1.4 case may not be required.
Regards,
Suraj Kandpal
>
>
> Matt
>
> >
> >
> > > Matt
> > >
> > > >
> > > > v2: add additional definition instead of function, commit message
> > > > typo fix and update.
> > > > v3: restore lost conditional from v2.
> > > > v4: subject line and subject message updated, fix the if ladder
> > > > order, fix the bit definition order.
> > > >
> > > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
> > > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > > 2 files changed, 8 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > index ed6aa87403e2..70dfc9d4d6ac 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > @@ -43,14 +43,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct
> > > intel_encoder *encoder,
> > > > return;
> > > >
> > > > if (DISPLAY_VER(display) >= 14) {
> > > > - if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> > > STEP_FOREVER))
> > > > - intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> > > >cpu_transcoder),
> > > > - 0, HDCP_LINE_REKEY_DISABLE);
> > > > + if (DISPLAY_VER(display) >= 30)
> > > > + intel_de_rmw(display,
> > > > + TRANS_DDI_FUNC_CTL(display, hdcp-
> > > >cpu_transcoder),
> > > > + 0,
> > > XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > > else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0,
> > > STEP_FOREVER) ||
> > > > IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
> > > STEP_B0, STEP_FOREVER))
> > > > intel_de_rmw(display,
> > > > TRANS_DDI_FUNC_CTL(display, hdcp-
> cpu_transcoder),
> > > > 0,
> > > TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > > + else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> > > STEP_FOREVER))
> > > > + intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> > > >cpu_transcoder),
> > > > + 0, HDCP_LINE_REKEY_DISABLE);
> > > > }
> > > > }
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > b/drivers/gpu/drm/i915/i915_reg.h index 89e4381f8baa..8d758947f301
> > > > 100644
> > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > @@ -3817,6 +3817,7 @@ enum skl_power_gate {
> > > > #define TRANS_DDI_PVSYNC (1 << 17)
> > > > #define TRANS_DDI_PHSYNC (1 << 16)
> > > > #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> > > > +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
> > > > #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> > > > #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> > > > #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> > > > --
> > > > 2.45.0
> > > >
> > >
> > > --
> > > Matt Roper
> > > Graphics Software Engineer
> > > Linux GPU Platform Enablement
> > > Intel Corporation
>
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-28 4:11 ` Kandpal, Suraj
@ 2024-10-30 0:02 ` Matt Roper
2024-11-04 3:44 ` Kandpal, Suraj
0 siblings, 1 reply; 23+ messages in thread
From: Matt Roper @ 2024-10-30 0:02 UTC (permalink / raw)
To: Kandpal, Suraj
Cc: Nautiyal, Ankit K, Atwood, Matthew S,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
On Sun, Oct 27, 2024 at 09:11:07PM -0700, Kandpal, Suraj wrote:
>
>
> > -----Original Message-----
> > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > Sent: Saturday, October 26, 2024 12:28 AM
> > To: Kandpal, Suraj <suraj.kandpal@intel.com>
> > Cc: Atwood, Matthew S <matthew.s.atwood@intel.com>; intel-
> > xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for
> > Xe3
> >
> > On Thu, Oct 24, 2024 at 02:52:14AM +0000, Kandpal, Suraj wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > > > Sent: Wednesday, October 23, 2024 11:22 PM
> > > > To: Atwood, Matthew S <matthew.s.atwood@intel.com>
> > > > Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
> > > > Kandpal, Suraj <suraj.kandpal@intel.com>
> > > > Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line
> > > > Rekeying for
> > > > Xe3
> > > >
> > > > On Fri, Oct 18, 2024 at 01:03:07PM -0700, Matt Atwood wrote:
> > > > > From: Suraj Kandpal <suraj.kandpal@intel.com>
> > > > >
> > > > > We need to disable HDCP Line Rekeying for Xe3 when we are using an
> > > > > HDMI encoder.
> > > >
> > > > This is still missing the "why" for this change. Is there a bspec
> > > > reference that gives the details? From the description of the bit
> > > > itself, it sounds like the setting here (for both Xe3 and earlier
> > > > Xe2) should be based on the HDCP version rather than the
> > platform/stepping.
> > > >
> > > > As mentioned previously, this entire function is labeled as "/* WA:
> > > > 16022217614 */" If we're now using this function for something
> > > > other than that specific workaround, then we need to fix/move that
> > comment.
> > > >
> > > >
> > >
> > > Bspec: 68933
> >
> > I think you pasted the wrong number here? This is a generic page that just
> > has links to four transcoder DDI registers and nothing else. It doesn't have
> > anything to do with HDCP rekeying.
> >
> > Maybe you meant 69964 (which is one of the four links from the page
> > above) that gives the register definition of TRANS_DDI_FUNC_CTL? But the
> > info there implies that we're not really handling this properly since it says that
> > we need to enable/disable rekeying based on the HDCP version. We're
> > disabling for HDCP 2.0 and above here (correct), but I don't see where we're
> > handling the enabling for HDCP 1.4 and earlier?
> > Unless I'm overlooking something, it seems like the driver always updates
> > TRANS_DDI_FUNC_CTL with a rmw cycle rather than building a new value
> > from scratch, so we can't really rely on the bit being 0 by default for the cases
> > where rekeying should be enabled.
>
> From what I can see TRANS_DDI_FUNC_CTL is written via intel_ddi_enable_transcoder_func()
> Which fills in the values to be written by intel_ddi_transcoder_func_reg_val_get where the line rekey bit
> ends up being 0 by default which make me believe that separate handling for HDCP 1.4 case may not be required.
Can HDCP only be enabled/disabled during a full modeset or can it be
changed on a non-modeset pipe update? If it only changes on full
modesets, then I agree that the initialization in
intel_ddi_enable_transcoder_func() probably covers it (although I'm not
sure why we've been using RMW cycles everywhere in that case rather than
just setting the proper value during the initial register write).
It sounds like nothing has truly changed logic-wise here in Xe3 compared
to MTL or Xe2; the only real change is that the register bit has
switched to a new location again.
Matt
>
> Regards,
> Suraj Kandpal
>
> >
> >
> > Matt
> >
> > >
> > >
> > > > Matt
> > > >
> > > > >
> > > > > v2: add additional definition instead of function, commit message
> > > > > typo fix and update.
> > > > > v3: restore lost conditional from v2.
> > > > > v4: subject line and subject message updated, fix the if ladder
> > > > > order, fix the bit definition order.
> > > > >
> > > > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > > > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
> > > > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > > > 2 files changed, 8 insertions(+), 3 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > index ed6aa87403e2..70dfc9d4d6ac 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > @@ -43,14 +43,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct
> > > > intel_encoder *encoder,
> > > > > return;
> > > > >
> > > > > if (DISPLAY_VER(display) >= 14) {
> > > > > - if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> > > > STEP_FOREVER))
> > > > > - intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> > > > >cpu_transcoder),
> > > > > - 0, HDCP_LINE_REKEY_DISABLE);
> > > > > + if (DISPLAY_VER(display) >= 30)
> > > > > + intel_de_rmw(display,
> > > > > + TRANS_DDI_FUNC_CTL(display, hdcp-
> > > > >cpu_transcoder),
> > > > > + 0,
> > > > XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > > > else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0,
> > > > STEP_FOREVER) ||
> > > > > IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
> > > > STEP_B0, STEP_FOREVER))
> > > > > intel_de_rmw(display,
> > > > > TRANS_DDI_FUNC_CTL(display, hdcp-
> > cpu_transcoder),
> > > > > 0,
> > > > TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > > > + else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0,
> > > > STEP_FOREVER))
> > > > > + intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
> > > > >cpu_transcoder),
> > > > > + 0, HDCP_LINE_REKEY_DISABLE);
> > > > > }
> > > > > }
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > > b/drivers/gpu/drm/i915/i915_reg.h index 89e4381f8baa..8d758947f301
> > > > > 100644
> > > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > > @@ -3817,6 +3817,7 @@ enum skl_power_gate {
> > > > > #define TRANS_DDI_PVSYNC (1 << 17)
> > > > > #define TRANS_DDI_PHSYNC (1 << 16)
> > > > > #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> > > > > +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(15)
> > > > > #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> > > > > #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> > > > > #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> > > > > --
> > > > > 2.45.0
> > > > >
> > > >
> > > > --
> > > > Matt Roper
> > > > Graphics Software Engineer
> > > > Linux GPU Platform Enablement
> > > > Intel Corporation
> >
> > --
> > Matt Roper
> > Graphics Software Engineer
> > Linux GPU Platform Enablement
> > Intel Corporation
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
2024-10-30 0:02 ` Matt Roper
@ 2024-11-04 3:44 ` Kandpal, Suraj
0 siblings, 0 replies; 23+ messages in thread
From: Kandpal, Suraj @ 2024-11-04 3:44 UTC (permalink / raw)
To: Roper, Matthew D
Cc: Nautiyal, Ankit K, Atwood, Matthew S,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> Sent: Wednesday, October 30, 2024 5:33 AM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Atwood, Matthew S
> <matthew.s.atwood@intel.com>; intel-xe@lists.freedesktop.org; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for
> Xe3
>
> On Sun, Oct 27, 2024 at 09:11:07PM -0700, Kandpal, Suraj wrote:
> >
> >
> > > -----Original Message-----
> > > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > > Sent: Saturday, October 26, 2024 12:28 AM
> > > To: Kandpal, Suraj <suraj.kandpal@intel.com>
> > > Cc: Atwood, Matthew S <matthew.s.atwood@intel.com>; intel-
> > > xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > > Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line
> > > Rekeying for
> > > Xe3
> > >
> > > On Thu, Oct 24, 2024 at 02:52:14AM +0000, Kandpal, Suraj wrote:
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > > > > Sent: Wednesday, October 23, 2024 11:22 PM
> > > > > To: Atwood, Matthew S <matthew.s.atwood@intel.com>
> > > > > Cc: intel-xe@lists.freedesktop.org;
> > > > > intel-gfx@lists.freedesktop.org; Kandpal, Suraj
> > > > > <suraj.kandpal@intel.com>
> > > > > Subject: Re: [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line
> > > > > Rekeying for
> > > > > Xe3
> > > > >
> > > > > On Fri, Oct 18, 2024 at 01:03:07PM -0700, Matt Atwood wrote:
> > > > > > From: Suraj Kandpal <suraj.kandpal@intel.com>
> > > > > >
> > > > > > We need to disable HDCP Line Rekeying for Xe3 when we are
> > > > > > using an HDMI encoder.
> > > > >
> > > > > This is still missing the "why" for this change. Is there a
> > > > > bspec reference that gives the details? From the description of
> > > > > the bit itself, it sounds like the setting here (for both Xe3
> > > > > and earlier
> > > > > Xe2) should be based on the HDCP version rather than the
> > > platform/stepping.
> > > > >
> > > > > As mentioned previously, this entire function is labeled as "/* WA:
> > > > > 16022217614 */" If we're now using this function for something
> > > > > other than that specific workaround, then we need to fix/move
> > > > > that
> > > comment.
> > > > >
> > > > >
> > > >
> > > > Bspec: 68933
> > >
> > > I think you pasted the wrong number here? This is a generic page
> > > that just has links to four transcoder DDI registers and nothing
> > > else. It doesn't have anything to do with HDCP rekeying.
> > >
> > > Maybe you meant 69964 (which is one of the four links from the page
> > > above) that gives the register definition of TRANS_DDI_FUNC_CTL?
> > > But the info there implies that we're not really handling this
> > > properly since it says that we need to enable/disable rekeying based
> > > on the HDCP version. We're disabling for HDCP 2.0 and above here
> > > (correct), but I don't see where we're handling the enabling for HDCP 1.4
> and earlier?
> > > Unless I'm overlooking something, it seems like the driver always
> > > updates TRANS_DDI_FUNC_CTL with a rmw cycle rather than building a
> > > new value from scratch, so we can't really rely on the bit being 0
> > > by default for the cases where rekeying should be enabled.
> >
> > From what I can see TRANS_DDI_FUNC_CTL is written via
> > intel_ddi_enable_transcoder_func()
> > Which fills in the values to be written by
> > intel_ddi_transcoder_func_reg_val_get where the line rekey bit ends up
> being 0 by default which make me believe that separate handling for HDCP
> 1.4 case may not be required.
>
I think I get your point ill float a separate patch that takes care of enabling HDCP line rekeying for HDCP 1.4
In the meantime can you review this patch which is just a modification due to the register bit change I have
Sent a new patch in this link
https://patchwork.freedesktop.org/series/140625/
> Can HDCP only be enabled/disabled during a full modeset or can it be
> changed on a non-modeset pipe update? If it only changes on full modesets,
> then I agree that the initialization in
> intel_ddi_enable_transcoder_func() probably covers it (although I'm not sure
> why we've been using RMW cycles everywhere in that case rather than just
> setting the proper value during the initial register write).
>
> It sounds like nothing has truly changed logic-wise here in Xe3 compared to
> MTL or Xe2; the only real change is that the register bit has switched to a new
> location again.
Yes that's true
Regards,
Suraj Kandpal
>
>
> Matt
>
> >
> > Regards,
> > Suraj Kandpal
> >
> > >
> > >
> > > Matt
> > >
> > > >
> > > >
> > > > > Matt
> > > > >
> > > > > >
> > > > > > v2: add additional definition instead of function, commit
> > > > > > message typo fix and update.
> > > > > > v3: restore lost conditional from v2.
> > > > > > v4: subject line and subject message updated, fix the if
> > > > > > ladder order, fix the bit definition order.
> > > > > >
> > > > > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > > > > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/i915/display/intel_hdcp.c | 10 +++++++---
> > > > > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > > > > 2 files changed, 8 insertions(+), 3 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > > index ed6aa87403e2..70dfc9d4d6ac 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > > @@ -43,14 +43,18 @@
> > > > > > intel_hdcp_disable_hdcp_line_rekeying(struct
> > > > > intel_encoder *encoder,
> > > > > > return;
> > > > > >
> > > > > > if (DISPLAY_VER(display) >= 14) {
> > > > > > - if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0),
> STEP_D0,
> > > > > STEP_FOREVER))
> > > > > > - intel_de_rmw(display,
> MTL_CHICKEN_TRANS(hdcp-
> > > > > >cpu_transcoder),
> > > > > > - 0, HDCP_LINE_REKEY_DISABLE);
> > > > > > + if (DISPLAY_VER(display) >= 30)
> > > > > > + intel_de_rmw(display,
> > > > > > + TRANS_DDI_FUNC_CTL(display,
> hdcp-
> > > > > >cpu_transcoder),
> > > > > > + 0,
> > > > > XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > > > > else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1),
> > > > > > STEP_B0,
> > > > > STEP_FOREVER) ||
> > > > > > IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
> > > > > STEP_B0, STEP_FOREVER))
> > > > > > intel_de_rmw(display,
> > > > > > TRANS_DDI_FUNC_CTL(display,
> hdcp-
> > > cpu_transcoder),
> > > > > > 0,
> > > > > TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
> > > > > > + else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0),
> > > > > > +STEP_D0,
> > > > > STEP_FOREVER))
> > > > > > + intel_de_rmw(display,
> MTL_CHICKEN_TRANS(hdcp-
> > > > > >cpu_transcoder),
> > > > > > + 0, HDCP_LINE_REKEY_DISABLE);
> > > > > > }
> > > > > > }
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > > > b/drivers/gpu/drm/i915/i915_reg.h index
> > > > > > 89e4381f8baa..8d758947f301
> > > > > > 100644
> > > > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > > > @@ -3817,6 +3817,7 @@ enum skl_power_gate {
> > > > > > #define TRANS_DDI_PVSYNC (1 << 17)
> > > > > > #define TRANS_DDI_PHSYNC (1 << 16)
> > > > > > #define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15)
> > > > > > +#define XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE
> REG_BIT(15)
> > > > > > #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> > > > > > #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> > > > > > #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> > > > > > --
> > > > > > 2.45.0
> > > > > >
> > > > >
> > > > > --
> > > > > Matt Roper
> > > > > Graphics Software Engineer
> > > > > Linux GPU Platform Enablement
> > > > > Intel Corporation
> > >
> > > --
> > > Matt Roper
> > > Graphics Software Engineer
> > > Linux GPU Platform Enablement
> > > Intel Corporation
>
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2024-11-04 3:45 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-10-18 20:03 [PATCH v4 0/7] Add xe3lpd edp enabling Matt Atwood
2024-10-18 20:03 ` [PATCH v4 1/7] drm/i915/xe3lpd: Update pmdemand programming Matt Atwood
2024-10-21 12:41 ` Gustavo Sousa
2024-10-18 20:03 ` [PATCH v4 2/7] drm/i915/xe3lpd: Add cdclk changes Matt Atwood
2024-10-21 12:49 ` Gustavo Sousa
2024-10-18 20:03 ` [PATCH v4 3/7] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Matt Atwood
2024-10-23 17:52 ` Matt Roper
2024-10-24 2:52 ` Kandpal, Suraj
2024-10-25 18:58 ` Matt Roper
2024-10-28 4:11 ` Kandpal, Suraj
2024-10-30 0:02 ` Matt Roper
2024-11-04 3:44 ` Kandpal, Suraj
2024-10-18 20:03 ` [PATCH v4 4/7] drm/i915/xe3lpd: Add C20 Phy consolidated programming table Matt Atwood
2024-10-18 20:03 ` [PATCH v4 5/7] drm/i915/xe3lpd: Add new bit range of MAX swing setup Matt Atwood
2024-10-18 23:38 ` Matt Roper
2024-10-18 20:03 ` [PATCH v4 6/7] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Matt Atwood
2024-10-21 12:22 ` Jani Nikula
2024-10-18 20:03 ` [PATCH v4 7/7] drm/i915/xe3lpd: Add condition for EDP to powerdown P2.PG Matt Atwood
2024-10-18 21:18 ` ✗ Fi.CI.CHECKPATCH: warning for Add xe3lpd edp enabling (rev4) Patchwork
2024-10-18 21:18 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-18 21:26 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-18 22:25 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-10-23 17:17 ` Matt Roper
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