From: Jani Nikula <jani.nikula@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 16/16] drm/i915: pass dev_priv explicitly to PIPEGCMAX
Date: Thu, 23 May 2024 16:18:55 +0300 [thread overview]
Message-ID: <875xv4psxs.fsf@intel.com> (raw)
In-Reply-To: <Zk9BNS0B7FiVrCw3@intel.com>
On Thu, 23 May 2024, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Thu, May 23, 2024 at 03:59:44PM +0300, Jani Nikula wrote:
>> Avoid the implicit dev_priv local variable use, and pass dev_priv
>> explicitly to the PIPEGCMAX register macro.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_color.c | 13 +++++++------
>> drivers/gpu/drm/i915/display/intel_color_regs.h | 6 +++---
>> 2 files changed, 10 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
>> index a83f41ee6834..da56d24eb933 100644
>> --- a/drivers/gpu/drm/i915/display/intel_color.c
>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
>> @@ -1284,9 +1284,10 @@ static void i965_load_lut_10p6(struct intel_crtc *crtc,
>> i965_lut_10p6_udw(&lut[i]));
>> }
>>
>> - intel_de_write_fw(dev_priv, PIPEGCMAX(pipe, 0), lut[i].red);
>> - intel_de_write_fw(dev_priv, PIPEGCMAX(pipe, 1), lut[i].green);
>> - intel_de_write_fw(dev_priv, PIPEGCMAX(pipe, 2), lut[i].blue);
>> + intel_de_write_fw(dev_priv, PIPEGCMAX(dev_priv, pipe, 0), lut[i].red);
>> + intel_de_write_fw(dev_priv, PIPEGCMAX(dev_priv, pipe, 1),
>> + lut[i].green);
>
> nit: the newline breaks the pattern in a somewhat ugly way
It's all cocci's doing... sometimes it's smart, sometimes less so.
> Series is
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Thanks!
>
>> + intel_de_write_fw(dev_priv, PIPEGCMAX(dev_priv, pipe, 2), lut[i].blue);
>> }
>>
>> static void i965_load_luts(const struct intel_crtc_state *crtc_state)
>> @@ -3239,9 +3240,9 @@ static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc)
>> i965_lut_10p6_pack(&lut[i], ldw, udw);
>> }
>>
>> - lut[i].red = i965_lut_11p6_max_pack(intel_de_read_fw(dev_priv, PIPEGCMAX(pipe, 0)));
>> - lut[i].green = i965_lut_11p6_max_pack(intel_de_read_fw(dev_priv, PIPEGCMAX(pipe, 1)));
>> - lut[i].blue = i965_lut_11p6_max_pack(intel_de_read_fw(dev_priv, PIPEGCMAX(pipe, 2)));
>> + lut[i].red = i965_lut_11p6_max_pack(intel_de_read_fw(dev_priv, PIPEGCMAX(dev_priv, pipe, 0)));
>> + lut[i].green = i965_lut_11p6_max_pack(intel_de_read_fw(dev_priv, PIPEGCMAX(dev_priv, pipe, 1)));
>> + lut[i].blue = i965_lut_11p6_max_pack(intel_de_read_fw(dev_priv, PIPEGCMAX(dev_priv, pipe, 2)));
>>
>> return blob;
>> }
>> diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h b/drivers/gpu/drm/i915/display/intel_color_regs.h
>> index 61c18b4a7fa5..8eb643cfead7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_color_regs.h
>> +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h
>> @@ -37,9 +37,9 @@
>> (i) * 4)
>>
>> /* i965/g4x/vlv/chv */
>> -#define _PIPEAGCMAX 0x70010
>> -#define _PIPEBGCMAX 0x71010
>> -#define PIPEGCMAX(pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */
>> +#define _PIPEAGCMAX 0x70010
>> +#define _PIPEBGCMAX 0x71010
>> +#define PIPEGCMAX(dev_priv, pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */
>>
>> /* ilk+ palette */
>> #define _LGC_PALETTE_A 0x4a000
>> --
>> 2.39.2
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-05-23 13:19 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-23 12:59 [PATCH 00/16] drm/i915: dev_priv fixes for i9xx_plane_regs.h/intel_color_regs.h Jani Nikula
2024-05-23 12:59 ` [PATCH 01/16] drm/i915: pass dev_priv explicitly to DSPADDR_VLV Jani Nikula
2024-05-23 12:59 ` [PATCH 02/16] drm/i915: pass dev_priv explicitly to DSPCNTR Jani Nikula
2024-05-23 12:59 ` [PATCH 03/16] drm/i915: pass dev_priv explicitly to DSPADDR Jani Nikula
2024-05-23 12:59 ` [PATCH 04/16] drm/i915: pass dev_priv explicitly to DSPLINOFF Jani Nikula
2024-05-23 12:59 ` [PATCH 05/16] drm/i915: pass dev_priv explicitly to DSPSTRIDE Jani Nikula
2024-05-23 12:59 ` [PATCH 06/16] drm/i915: pass dev_priv explicitly to DSPPOS Jani Nikula
2024-05-23 12:59 ` [PATCH 07/16] drm/i915: pass dev_priv explicitly to DSPSIZE Jani Nikula
2024-05-23 12:59 ` [PATCH 08/16] drm/i915: pass dev_priv explicitly to DSPSURF Jani Nikula
2024-05-23 12:59 ` [PATCH 09/16] drm/i915: pass dev_priv explicitly to DSPTILEOFF Jani Nikula
2024-05-23 12:59 ` [PATCH 10/16] drm/i915: pass dev_priv explicitly to DSPOFFSET Jani Nikula
2024-05-23 12:59 ` [PATCH 11/16] drm/i915: pass dev_priv explicitly to DSPSURFLIVE Jani Nikula
2024-05-23 12:59 ` [PATCH 12/16] drm/i915: pass dev_priv explicitly to DSPGAMC Jani Nikula
2024-05-23 12:59 ` [PATCH 13/16] drm/i915: pass dev_priv explicitly to PRIMPOS Jani Nikula
2024-05-23 12:59 ` [PATCH 14/16] drm/i915: pass dev_priv explicitly to PRIMSIZE Jani Nikula
2024-05-23 12:59 ` [PATCH 15/16] drm/i915: pass dev_priv explicitly to PRIMCNSTALPHA Jani Nikula
2024-05-23 12:59 ` [PATCH 16/16] drm/i915: pass dev_priv explicitly to PIPEGCMAX Jani Nikula
2024-05-23 13:14 ` Ville Syrjälä
2024-05-23 13:18 ` Jani Nikula [this message]
2024-05-24 9:12 ` Jani Nikula
2024-05-23 14:39 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: dev_priv fixes for i9xx_plane_regs.h/intel_color_regs.h Patchwork
2024-05-23 14:39 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-23 14:48 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-24 7:06 ` ✗ Fi.CI.IGT: failure " Patchwork
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