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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915/dsi: Extract port_ctrl_reg()
Date: Thu, 02 Nov 2023 15:32:59 +0200	[thread overview]
Message-ID: <875y2k2sc4.fsf@intel.com> (raw)
In-Reply-To: <20231101114212.9345-6-ville.syrjala@linux.intel.com>

On Wed, 01 Nov 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The code to determine the pre-ICL DSI port control register is
> repeated several times. Consolidate.
>
> vlv_dsi_clear_device_ready() is left with the open-coded version
> due to the weirdness with port A vs. C on VLV/CHV.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/vlv_dsi.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 64023fb8dd74..bda49734ca33 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -561,6 +561,12 @@ static void glk_dsi_clear_device_ready(struct intel_encoder *encoder)
>  	glk_dsi_disable_mipi_io(encoder);
>  }
>  
> +static i915_reg_t port_ctrl_reg(struct drm_i915_private *i915, enum port port)
> +{
> +	return IS_GEMINILAKE(i915) || IS_BROXTON(i915) ?
> +		BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> +}
> +
>  static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> @@ -627,8 +633,7 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder,
>  	}
>  
>  	for_each_dsi_port(port, intel_dsi->ports) {
> -		i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ?
> -			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> +		i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);
>  		u32 temp;
>  
>  		temp = intel_de_read(dev_priv, port_ctrl);
> @@ -664,8 +669,7 @@ static void intel_dsi_port_disable(struct intel_encoder *encoder)
>  	enum port port;
>  
>  	for_each_dsi_port(port, intel_dsi->ports) {
> -		i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ?
> -			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> +		i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);
>  
>  		/* de-assert ip_tg_enable signal */
>  		intel_de_rmw(dev_priv, port_ctrl, DPI_ENABLE, 0);
> @@ -955,9 +959,8 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
>  
>  	/* XXX: this only works for one DSI output */
>  	for_each_dsi_port(port, intel_dsi->ports) {
> -		i915_reg_t ctrl_reg = IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ?
> -			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> -		bool enabled = intel_de_read(dev_priv, ctrl_reg) & DPI_ENABLE;
> +		i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);
> +		bool enabled = intel_de_read(dev_priv, port_ctrl) & DPI_ENABLE;
>  
>  		/*
>  		 * Due to some hardware limitations on VLV/CHV, the DPI enable

-- 
Jani Nikula, Intel

  reply	other threads:[~2023-11-02 13:33 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-01 11:42 [Intel-gfx] [PATCH 0/5] drm/i915: Some register cleanups Ville Syrjala
2023-11-01 11:42 ` [Intel-gfx] [PATCH 1/5] drm/i915: Extract hsw_chicken_trans_reg() Ville Syrjala
2023-11-02 13:29   ` Jani Nikula
2023-11-01 11:42 ` [Intel-gfx] [PATCH 2/5] drm/i915: Stop using a 'reg' variable Ville Syrjala
2023-11-02 13:29   ` Jani Nikula
2023-11-01 11:42 ` [Intel-gfx] [PATCH 3/5] drm/i915: Extract mchbar_reg() Ville Syrjala
2023-11-02 13:31   ` Jani Nikula
2023-11-06  8:07     ` Ville Syrjälä
2023-11-01 11:42 ` [Intel-gfx] [PATCH 4/5] drm/i915/dsi: Remove dead GLK checks Ville Syrjala
2023-11-02 13:32   ` Jani Nikula
2023-11-01 11:42 ` [Intel-gfx] [PATCH 5/5] drm/i915/dsi: Extract port_ctrl_reg() Ville Syrjala
2023-11-02 13:32   ` Jani Nikula [this message]
2023-11-01 14:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some register cleanups Patchwork
2023-11-01 14:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-01 14:50 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-04 16:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some register cleanups (rev2) Patchwork
2023-11-04 16:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-04 17:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-04 17:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some register cleanups (rev3) Patchwork
2023-11-04 17:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-04 18:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-04 19:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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