From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add support for 32 bit OAG formats in MTL
Date: Tue, 29 Nov 2022 17:47:46 -0800 [thread overview]
Message-ID: <875yex43i5.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <877czd44x2.wl-ashutosh.dixit@intel.com>
On Tue, 29 Nov 2022 17:17:13 -0800, Dixit, Ashutosh wrote:
>
> > @@ -4746,6 +4772,7 @@ static void oa_init_supported_formats(struct i915_perf *perf)
> > break;
> >
> > case INTEL_DG2:
> > + case INTEL_METEORLAKE:
> > oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8);
> > oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8);
>
> Do these formats also need to be added?
Sorry!
> oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8);
> oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8);
These two are the same as above.
> oa_format_add(perf, I915_OAR_FORMAT_A36u64_B8_C8);
> oa_format_add(perf, I915_OA_FORMAT_A38u64_R2u64_B8_C8);
And it seems these are not 32 bit (where 32 bit refers to the header
size).
> Or these are not considered OAG formats?
So it's ok, no changes needed here.
>
> > break;
> Thanks.
> --
> Ashutosh
next prev parent reply other threads:[~2022-11-30 1:47 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-29 1:21 [Intel-gfx] [PATCH] drm/i915/mtl: Add support for 32 bit OAG formats in MTL Umesh Nerlige Ramappa
2022-11-29 2:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2022-11-29 2:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-11-29 7:15 ` [Intel-gfx] [PATCH] " Lucas De Marchi
2022-11-29 18:40 ` Umesh Nerlige Ramappa
2022-11-30 1:17 ` Dixit, Ashutosh
2022-11-30 1:47 ` Dixit, Ashutosh [this message]
2022-11-30 1:51 ` Dixit, Ashutosh
2022-11-30 20:00 ` Umesh Nerlige Ramappa
2022-11-30 20:14 ` Dixit, Ashutosh
2022-11-30 23:39 ` Umesh Nerlige Ramappa
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