public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 07/12] drm/i915: Document the sets of bits in the driver features block
Date: Fri, 02 Sep 2022 17:05:30 +0300	[thread overview]
Message-ID: <875yi5eus5.fsf@intel.com> (raw)
In-Reply-To: <20220715202044.11153-8-ville.syrjala@linux.intel.com>

On Fri, 15 Jul 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a few comment documenting the sets of bits in the driver
> features block. Might make it a bit easier to check against
> the spec.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index 8bdb533b5304..c04937aa75b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -542,6 +542,7 @@ struct bdb_psr {
>  #define BDB_DRIVER_FEATURE_INT_SDVO_LVDS	3
>  
>  struct bdb_driver_features {
> +	/* Driver bits */
>  	u8 boot_dev_algorithm:1;
>  	u8 block_display_switch:1;
>  	u8 allow_display_switch:1;
> @@ -556,6 +557,7 @@ struct bdb_driver_features {
>  	u8 boot_mode_bpp;
>  	u8 boot_mode_refresh;
>  
> +	/* Extended Driver Bits 1 */
>  	u16 enable_lfp_primary:1;
>  	u16 selective_mode_pruning:1;
>  	u16 dual_frequency:1;
> @@ -571,6 +573,7 @@ struct bdb_driver_features {
>  	u16 tv_hotplug:1;
>  	u16 hdmi_config:2;
>  
> +	/* Driver Flags 1 */
>  	u8 static_display:1;					/* 163+ */
>  	u8 reserved2:7;
>  
> @@ -578,8 +581,12 @@ struct bdb_driver_features {
>  	u16 legacy_crt_max_y;
>  	u8 legacy_crt_max_refresh;
>  
> +	/* Extended Driver Bits 2 */
>  	u8 hdmi_termination;
> +
>  	u8 custom_vbt_version;					/* 165+ */
> +
> +	/* Driver Feature Flags */
>  	u16 rmpm_enabled:1;					/* 165+ */
>  	u16 s2ddt_enabled:1;					/* 165+ */
>  	u16 dpst_enabled:1;					/* 165-227 */

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-09-02 14:05 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-15 20:20 [Intel-gfx] [PATCH 00/12] drm/i915: More VBT stuff Ville Syrjala
2022-07-15 20:20 ` [Intel-gfx] [PATCH 01/12] drm/i915: Unify VBT version number comments Ville Syrjala
2022-07-19 10:25   ` Rodrigo Vivi
2022-09-01  9:24     ` Ville Syrjälä
2022-07-15 20:20 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add some more " Ville Syrjala
2022-09-02 15:00   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 03/12] drm/i915: Properly define the DP redriver VBT bits Ville Syrjala
2022-09-02 14:45   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 04/12] drm/i915: Define VBT eDP/DP max lane count bits Ville Syrjala
2022-09-02 14:36   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add the VBT LTTPR transparent vs. non-transparent bits Ville Syrjala
2022-09-02 14:47   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 06/12] drm/i915: Define VBT max HDMI FRL rate bits Ville Syrjala
2022-09-02 14:48   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 07/12] drm/i915: Document the sets of bits in the driver features block Ville Syrjala
2022-09-02 14:05   ` Jani Nikula [this message]
2022-07-15 20:20 ` [Intel-gfx] [PATCH 08/12] drm/i915: Define more VBT driver features block bits Ville Syrjala
2022-09-02 14:09   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 09/12] drm/i915: Define all possible VBT device handles Ville Syrjala
2022-09-02 14:13   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 10/12] drm/i915: Rename some VBT bits Ville Syrjala
2022-09-02 14:15   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 11/12] drm/i915: WARN if a port should use VBT provided vswing tables Ville Syrjala
2022-07-19 10:31   ` Rodrigo Vivi
2022-09-01  9:24     ` Ville Syrjälä
2022-09-02 14:01   ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 12/12] drm/i915: Parse DP/eDP max lane count from VBT Ville Syrjala
2022-07-19 10:39   ` Rodrigo Vivi
2022-09-01  9:25     ` Ville Syrjälä
2022-09-02 14:42       ` Jani Nikula
2022-07-16 18:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: More VBT stuff Patchwork
2022-07-16 21:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=875yi5eus5.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox