From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 12/12] drm/i915: Parse DP/eDP max lane count from VBT
Date: Tue, 19 Jul 2022 06:39:29 -0400 [thread overview]
Message-ID: <YtaJ4ThPAKPzBc1a@intel.com> (raw)
In-Reply-To: <20220715202044.11153-13-ville.syrjala@linux.intel.com>
On Fri, Jul 15, 2022 at 11:20:44PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Limit the DP lane count based on the new VBT DP/eDP max
> lane count field.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 16 ++++++++++++++++
> drivers/gpu/drm/i915/display/intel_bios.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 13 ++++++++++++-
> 3 files changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index cd86b65055ef..d8063c329b3a 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2489,6 +2489,14 @@ static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *de
> return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
> }
>
> +static int _intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
> +{
> + if (!devdata || devdata->i915->vbt.version < 244)
> + return 0;
> +
> + return devdata->child.dp_max_lane_count + 1;
> +}
> +
> static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
> enum port port)
> {
> @@ -3674,6 +3682,14 @@ int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
> return _intel_bios_dp_max_link_rate(devdata);
> }
>
> +int intel_bios_dp_max_lane_count(struct intel_encoder *encoder)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
> +
> + return _intel_bios_dp_max_lane_count(devdata);
> +}
do we really need 2 functions here since this one is small and we don't have any
bit switches and all?!
or do you plan to reuse this anywhere else later?
> +
> int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
> index e47582b0de0a..e375405a7828 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -258,6 +258,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
> int intel_bios_max_tmds_clock(struct intel_encoder *encoder);
> int intel_bios_hdmi_level_shift(struct intel_encoder *encoder);
> int intel_bios_dp_max_link_rate(struct intel_encoder *encoder);
> +int intel_bios_dp_max_lane_count(struct intel_encoder *encoder);
> int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder);
> bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, enum port port);
> bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 32292c0be2bd..0370c4c105dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -286,11 +286,22 @@ static int intel_dp_max_common_rate(struct intel_dp *intel_dp)
> return intel_dp_common_rate(intel_dp, intel_dp->num_common_rates - 1);
> }
>
> +static int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
> +{
> + int vbt_max_lanes = intel_bios_dp_max_lane_count(&dig_port->base);
> + int max_lanes = dig_port->max_lanes;
> +
> + if (vbt_max_lanes)
> + max_lanes = min(max_lanes, vbt_max_lanes);
> +
> + return max_lanes;
> +}
> +
> /* Theoretical max between source and sink */
> static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> - int source_max = dig_port->max_lanes;
> + int source_max = intel_dp_max_source_lane_count(dig_port);
> int sink_max = intel_dp->max_sink_lane_count;
> int fia_max = intel_tc_port_fia_max_lane_count(dig_port);
> int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-07-19 10:39 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 20:20 [Intel-gfx] [PATCH 00/12] drm/i915: More VBT stuff Ville Syrjala
2022-07-15 20:20 ` [Intel-gfx] [PATCH 01/12] drm/i915: Unify VBT version number comments Ville Syrjala
2022-07-19 10:25 ` Rodrigo Vivi
2022-09-01 9:24 ` Ville Syrjälä
2022-07-15 20:20 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add some more " Ville Syrjala
2022-09-02 15:00 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 03/12] drm/i915: Properly define the DP redriver VBT bits Ville Syrjala
2022-09-02 14:45 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 04/12] drm/i915: Define VBT eDP/DP max lane count bits Ville Syrjala
2022-09-02 14:36 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add the VBT LTTPR transparent vs. non-transparent bits Ville Syrjala
2022-09-02 14:47 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 06/12] drm/i915: Define VBT max HDMI FRL rate bits Ville Syrjala
2022-09-02 14:48 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 07/12] drm/i915: Document the sets of bits in the driver features block Ville Syrjala
2022-09-02 14:05 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 08/12] drm/i915: Define more VBT driver features block bits Ville Syrjala
2022-09-02 14:09 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 09/12] drm/i915: Define all possible VBT device handles Ville Syrjala
2022-09-02 14:13 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 10/12] drm/i915: Rename some VBT bits Ville Syrjala
2022-09-02 14:15 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 11/12] drm/i915: WARN if a port should use VBT provided vswing tables Ville Syrjala
2022-07-19 10:31 ` Rodrigo Vivi
2022-09-01 9:24 ` Ville Syrjälä
2022-09-02 14:01 ` Jani Nikula
2022-07-15 20:20 ` [Intel-gfx] [PATCH 12/12] drm/i915: Parse DP/eDP max lane count from VBT Ville Syrjala
2022-07-19 10:39 ` Rodrigo Vivi [this message]
2022-09-01 9:25 ` Ville Syrjälä
2022-09-02 14:42 ` Jani Nikula
2022-07-16 18:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: More VBT stuff Patchwork
2022-07-16 21:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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