* [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display.
@ 2022-08-23 9:01 Maarten Lankhorst
2022-08-23 9:01 ` [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de Maarten Lankhorst
` (10 more replies)
0 siblings, 11 replies; 18+ messages in thread
From: Maarten Lankhorst @ 2022-08-23 9:01 UTC (permalink / raw)
To: intel-gfx
Using intel_de instead of calling uncore functions directly allows us to
further isolate display from the core internals. Most places already use
intel_de, convert the remaining users.
Maarten Lankhorst (4):
drm/i915: Move display pcode requests to intel_de
drm/i915: Remove uncore from intel_tc.c
drm/i915: Remove uncore from intel_bios.c
drm/i915: Replace remaining display uncore references to use intel_de
drivers/gpu/drm/i915/display/hsw_ips.c | 7 +-
drivers/gpu/drm/i915/display/intel_bios.c | 25 +++---
drivers/gpu/drm/i915/display/intel_bw.c | 30 ++++----
drivers/gpu/drm/i915/display/intel_cdclk.c | 45 ++++++-----
drivers/gpu/drm/i915/display/intel_crt.c | 33 ++++----
drivers/gpu/drm/i915/display/intel_de.h | 77 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 1 -
.../drm/i915/display/intel_display_power.c | 5 +-
.../i915/display/intel_display_power_well.c | 7 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 6 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 30 ++++----
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 9 +--
drivers/gpu/drm/i915/display/intel_fbc.c | 10 +--
drivers/gpu/drm/i915/display/intel_gmbus.c | 42 +++++-----
drivers/gpu/drm/i915/display/intel_hdcp.c | 9 +--
drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++-
drivers/gpu/drm/i915/display/intel_tc.c | 55 +++++--------
17 files changed, 220 insertions(+), 182 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
@ 2022-08-23 9:01 ` Maarten Lankhorst
2022-08-29 13:38 ` Jani Nikula
2022-08-23 9:01 ` [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c Maarten Lankhorst
` (9 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Maarten Lankhorst @ 2022-08-23 9:01 UTC (permalink / raw)
To: intel-gfx
This will allow us not to use uncore from display code directly any more.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/display/hsw_ips.c | 7 ++-
drivers/gpu/drm/i915/display/intel_bw.c | 22 ++++-----
drivers/gpu/drm/i915/display/intel_cdclk.c | 45 +++++++++----------
drivers/gpu/drm/i915/display/intel_de.h | 30 +++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 1 -
.../drm/i915/display/intel_display_power.c | 3 +-
.../i915/display/intel_display_power_well.c | 7 ++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 3 +-
8 files changed, 71 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
index 861dcd2eb890..ab0032b78d7f 100644
--- a/drivers/gpu/drm/i915/display/hsw_ips.c
+++ b/drivers/gpu/drm/i915/display/hsw_ips.c
@@ -8,7 +8,6 @@
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_types.h"
-#include "intel_pcode.h"
static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
{
@@ -28,8 +27,8 @@ static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
if (IS_BROADWELL(i915)) {
drm_WARN_ON(&i915->drm,
- snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL,
- IPS_ENABLE | IPS_PCODE_CONTROL));
+ intel_de_pcode_write(i915, DISPLAY_IPS_CONTROL,
+ IPS_ENABLE | IPS_PCODE_CONTROL));
/*
* Quoting Art Runyan: "its not safe to expect any particular
* value in IPS_CTL bit 31 after enabling IPS through the
@@ -62,7 +61,7 @@ bool hsw_ips_disable(const struct intel_crtc_state *crtc_state)
if (IS_BROADWELL(i915)) {
drm_WARN_ON(&i915->drm,
- snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL, 0));
+ intel_de_pcode_write(i915, DISPLAY_IPS_CONTROL, 0));
/*
* Wait for PCODE to finish disabling IPS. The BSpec specified
* 42ms timeout value leads to occasional timeouts so use 100ms
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 79269d2c476b..8ecf4e3e2bc6 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -10,9 +10,9 @@
#include "intel_atomic.h"
#include "intel_bw.h"
#include "intel_cdclk.h"
+#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_mchbar_regs.h"
-#include "intel_pcode.h"
#include "intel_pm.h"
/* Parameters for Qclk Geyserville (QGV) */
@@ -78,9 +78,9 @@ static int icl_pcode_read_qgv_point_info(struct drm_i915_private *dev_priv,
u16 dclk;
int ret;
- ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
- ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point),
- &val, &val2);
+ ret = intel_de_pcode_read(dev_priv, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+ ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point),
+ &val, &val2);
if (ret)
return ret;
@@ -104,8 +104,8 @@ static int adls_pcode_read_psf_gv_point_info(struct drm_i915_private *dev_priv,
int ret;
int i;
- ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
- ADL_PCODE_MEM_SS_READ_PSF_GV_INFO, &val, NULL);
+ ret = intel_de_pcode_read(dev_priv, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+ ADL_PCODE_MEM_SS_READ_PSF_GV_INFO, &val, NULL);
if (ret)
return ret;
@@ -123,11 +123,11 @@ int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv,
int ret;
/* bspec says to keep retrying for at least 1 ms */
- ret = skl_pcode_request(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
- points_mask,
- ICL_PCODE_REP_QGV_MASK | ADLS_PCODE_REP_PSF_MASK,
- ICL_PCODE_REP_QGV_SAFE | ADLS_PCODE_REP_PSF_SAFE,
- 1);
+ ret = intel_de_pcode_request(dev_priv, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
+ points_mask,
+ ICL_PCODE_REP_QGV_MASK | ADLS_PCODE_REP_PSF_MASK,
+ ICL_PCODE_REP_QGV_SAFE | ADLS_PCODE_REP_PSF_SAFE,
+ 1);
if (ret < 0) {
drm_err(&dev_priv->drm, "Failed to disable qgv points (%d) points: 0x%x\n", ret, points_mask);
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 86a22c3766e5..15565406679c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -34,7 +34,6 @@
#include "intel_display_types.h"
#include "intel_mchbar_regs.h"
#include "intel_pci_config.h"
-#include "intel_pcode.h"
#include "intel_psr.h"
#include "vlv_sideband.h"
@@ -800,7 +799,7 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
"trying to change cdclk frequency with cdclk not enabled\n"))
return;
- ret = snb_pcode_write(&dev_priv->uncore, BDW_PCODE_DISPLAY_FREQ_CHANGE_REQ, 0x0);
+ ret = intel_de_pcode_write(dev_priv, BDW_PCODE_DISPLAY_FREQ_CHANGE_REQ, 0x0);
if (ret) {
drm_err(&dev_priv->drm,
"failed to inform pcode about cdclk change\n");
@@ -828,8 +827,8 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
drm_err(&dev_priv->drm, "Switching back to LCPLL failed\n");
- snb_pcode_write(&dev_priv->uncore, HSW_PCODE_DE_WRITE_FREQ_REQ,
- cdclk_config->voltage_level);
+ intel_de_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ,
+ cdclk_config->voltage_level);
intel_de_write(dev_priv, CDCLK_FREQ,
DIV_ROUND_CLOSEST(cdclk, 1000) - 1);
@@ -1086,10 +1085,10 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
drm_WARN_ON_ONCE(&dev_priv->drm,
IS_SKYLAKE(dev_priv) && vco == 8640000);
- ret = skl_pcode_request(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
- SKL_CDCLK_PREPARE_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE, 3);
+ ret = intel_de_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
+ SKL_CDCLK_PREPARE_FOR_CHANGE,
+ SKL_CDCLK_READY_FOR_CHANGE,
+ SKL_CDCLK_READY_FOR_CHANGE, 3);
if (ret) {
drm_err(&dev_priv->drm,
"Failed to inform PCU about cdclk change (%d)\n", ret);
@@ -1132,8 +1131,8 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
intel_de_posting_read(dev_priv, CDCLK_CTL);
/* inform PCU of the change */
- snb_pcode_write(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
- cdclk_config->voltage_level);
+ intel_de_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
+ cdclk_config->voltage_level);
intel_update_cdclk(dev_priv);
}
@@ -1702,18 +1701,18 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
/* Inform power controller of upcoming frequency change. */
if (DISPLAY_VER(dev_priv) >= 11)
- ret = skl_pcode_request(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
- SKL_CDCLK_PREPARE_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE, 3);
+ ret = intel_de_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
+ SKL_CDCLK_PREPARE_FOR_CHANGE,
+ SKL_CDCLK_READY_FOR_CHANGE,
+ SKL_CDCLK_READY_FOR_CHANGE, 3);
else
/*
* BSpec requires us to wait up to 150usec, but that leads to
* timeouts; the 2ms used here is based on experiment.
*/
- ret = snb_pcode_write_timeout(&dev_priv->uncore,
- HSW_PCODE_DE_WRITE_FREQ_REQ,
- 0x80000000, 150, 2);
+ ret = intel_de_pcode_write_timeout(dev_priv,
+ HSW_PCODE_DE_WRITE_FREQ_REQ,
+ 0x80000000, 150, 2);
if (ret) {
drm_err(&dev_priv->drm,
"Failed to inform PCU about cdclk change (err %d, freq %d)\n",
@@ -1774,8 +1773,8 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
if (DISPLAY_VER(dev_priv) >= 11) {
- ret = snb_pcode_write(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
- cdclk_config->voltage_level);
+ ret = intel_de_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
+ cdclk_config->voltage_level);
} else {
/*
* The timeout isn't specified, the 2ms used here is based on
@@ -1783,10 +1782,10 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
* FIXME: Waiting for the request completion could be delayed
* until the next PCODE request based on BSpec.
*/
- ret = snb_pcode_write_timeout(&dev_priv->uncore,
- HSW_PCODE_DE_WRITE_FREQ_REQ,
- cdclk_config->voltage_level,
- 150, 2);
+ ret = intel_de_pcode_write_timeout(dev_priv,
+ HSW_PCODE_DE_WRITE_FREQ_REQ,
+ cdclk_config->voltage_level,
+ 150, 2);
}
if (ret) {
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 9c104f65e4c8..d51e83a45dce 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -9,6 +9,7 @@
#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_uncore.h"
+#include "intel_pcode.h"
static inline u32
intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
@@ -81,4 +82,33 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
intel_uncore_write_fw(&i915->uncore, reg, val);
}
+static inline int
+intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
+ int fast_timeout_us, int slow_timeout_ms)
+{
+ return snb_pcode_write_timeout(&i915->uncore, mbox, val,
+ fast_timeout_us, slow_timeout_ms);
+}
+
+static inline int
+intel_de_pcode_write(struct drm_i915_private *i915, u32 mbox, u32 val)
+{
+
+ return snb_pcode_write(&i915->uncore, mbox, val);
+}
+
+static inline int
+intel_de_pcode_read(struct drm_i915_private *i915, u32 mbox, u32 *val, u32 *val1)
+{
+ return snb_pcode_read(&i915->uncore, mbox, val, val1);
+}
+
+static inline int intel_de_pcode_request(struct drm_i915_private *i915, u32 mbox,
+ u32 request, u32 reply_mask, u32 reply,
+ int timeout_base_ms)
+{
+ return skl_pcode_request(&i915->uncore, mbox, request, reply_mask, reply,
+ timeout_base_ms);
+}
+
#endif /* __INTEL_DE_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 533fff79aeda..e8ddbfc1618e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -104,7 +104,6 @@
#include "intel_panel.h"
#include "intel_pch_display.h"
#include "intel_pch_refclk.h"
-#include "intel_pcode.h"
#include "intel_pipe_crc.h"
#include "intel_plane_initial.h"
#include "intel_pm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index f7e8d1ff62cf..3d2ac2c5b0d2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -18,7 +18,6 @@
#include "intel_dmc.h"
#include "intel_mchbar_regs.h"
#include "intel_pch_refclk.h"
-#include "intel_pcode.h"
#include "intel_pm.h"
#include "intel_snps_phy.h"
#include "vlv_sideband.h"
@@ -1197,7 +1196,7 @@ static u32 hsw_read_dcomp(struct drm_i915_private *dev_priv)
static void hsw_write_dcomp(struct drm_i915_private *dev_priv, u32 val)
{
if (IS_HASWELL(dev_priv)) {
- if (snb_pcode_write(&dev_priv->uncore, GEN6_PCODE_WRITE_D_COMP, val))
+ if (intel_de_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val))
drm_dbg_kms(&dev_priv->drm,
"Failed to write to D_COMP\n");
} else {
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 7044016d4d98..eee50b954f83 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -16,7 +16,6 @@
#include "intel_dpio_phy.h"
#include "intel_dpll.h"
#include "intel_hotplug.h"
-#include "intel_pcode.h"
#include "intel_pm.h"
#include "intel_pps.h"
#include "intel_tc.h"
@@ -475,8 +474,8 @@ static void icl_tc_cold_exit(struct drm_i915_private *i915)
int ret, tries = 0;
while (1) {
- ret = snb_pcode_write_timeout(&i915->uncore, ICL_PCODE_EXIT_TCCOLD, 0,
- 250, 1);
+ ret = intel_de_pcode_write_timeout(i915, ICL_PCODE_EXIT_TCCOLD, 0,
+ 250, 1);
if (ret != -EAGAIN || ++tries == 3)
break;
msleep(1);
@@ -1740,7 +1739,7 @@ tgl_tc_cold_request(struct drm_i915_private *i915, bool block)
* Spec states that we should timeout the request after 200us
* but the function below will timeout after 500us
*/
- ret = snb_pcode_read(&i915->uncore, TGL_PCODE_TCCOLD, &low_val, &high_val);
+ ret = intel_de_pcode_read(i915, TGL_PCODE_TCCOLD, &low_val, &high_val);
if (ret == 0) {
if (block &&
(low_val & TGL_PCODE_EXIT_TCCOLD_DATA_L_EXIT_FAILED))
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index c5e9e86bb4cb..f819b29906bd 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -24,7 +24,6 @@
#include "intel_display_types.h"
#include "intel_hdcp.h"
#include "intel_hdcp_regs.h"
-#include "intel_pcode.h"
#define KEY_LOAD_TRIES 5
#define HDCP2_LC_RETRY_CNT 3
@@ -299,7 +298,7 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
* Mailbox interface.
*/
if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv)) {
- ret = snb_pcode_write(&dev_priv->uncore, SKL_PCODE_LOAD_HDCP_KEYS, 1);
+ ret = intel_de_pcode_write(dev_priv, SKL_PCODE_LOAD_HDCP_KEYS, 1);
if (ret) {
drm_err(&dev_priv->drm,
"Failed to initiate HDCP key load (%d)\n",
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
2022-08-23 9:01 ` [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de Maarten Lankhorst
@ 2022-08-23 9:01 ` Maarten Lankhorst
2022-08-29 13:29 ` Jani Nikula
2022-08-23 9:01 ` [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c Maarten Lankhorst
` (8 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Maarten Lankhorst @ 2022-08-23 9:01 UTC (permalink / raw)
To: intel-gfx
Use the intel_de macro's instead of referencing uncore directly.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++-----------------
1 file changed, 18 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 6773840f6cc7..4ee69821728d 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -5,6 +5,7 @@
#include "i915_drv.h"
#include "i915_reg.h"
+#include "intel_de.h"
#include "intel_display.h"
#include "intel_display_power_map.h"
#include "intel_display_types.h"
@@ -119,11 +120,9 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
u32 lane_mask;
- lane_mask = intel_uncore_read(uncore,
- PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
+ lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff);
assert_tc_cold_blocked(dig_port);
@@ -135,11 +134,9 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
u32 pin_mask;
- pin_mask = intel_uncore_read(uncore,
- PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
+ pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff);
assert_tc_cold_blocked(dig_port);
@@ -185,7 +182,6 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
- struct intel_uncore *uncore = &i915->uncore;
u32 val;
drm_WARN_ON(&i915->drm,
@@ -193,8 +189,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
assert_tc_cold_blocked(dig_port);
- val = intel_uncore_read(uncore,
- PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
+ val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
val &= ~DFLEXDPMLE1_DPMLETC_MASK(dig_port->tc_phy_fia_idx);
switch (required_lanes) {
@@ -215,8 +210,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
MISSING_CASE(required_lanes);
}
- intel_uncore_write(uncore,
- PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
+ intel_de_write(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
}
static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
@@ -245,13 +239,11 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
u32 isr_bit = i915->hotplug.pch_hpd[dig_port->base.hpd_pin];
u32 mask = 0;
u32 val;
- val = intel_uncore_read(uncore,
- PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
+ val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
if (val == 0xffffffff) {
drm_dbg_kms(&i915->drm,
@@ -265,7 +257,7 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
mask |= BIT(TC_PORT_DP_ALT);
- if (intel_uncore_read(uncore, SDEISR) & isr_bit)
+ if (intel_de_read(i915, SDEISR) & isr_bit)
mask |= BIT(TC_PORT_LEGACY);
/* The sink can be connected only in a single mode. */
@@ -280,7 +272,6 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
u32 isr_bit = i915->hotplug.pch_hpd[dig_port->base.hpd_pin];
- struct intel_uncore *uncore = &i915->uncore;
u32 val, mask = 0;
/*
@@ -288,13 +279,13 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
* registers in IOM. Note that this doesn't apply to PHY and FIA
* registers.
*/
- val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
+ val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
mask |= BIT(TC_PORT_DP_ALT);
if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
mask |= BIT(TC_PORT_TBT_ALT);
- if (intel_uncore_read(uncore, SDEISR) & isr_bit)
+ if (intel_de_read(i915, SDEISR) & isr_bit)
mask |= BIT(TC_PORT_LEGACY);
/* The sink can be connected only in a single mode. */
@@ -325,11 +316,9 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
u32 val;
- val = intel_uncore_read(uncore,
- PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
+ val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
if (val == 0xffffffff) {
drm_dbg_kms(&i915->drm,
"Port %s: PHY in TCCOLD, assuming not complete\n",
@@ -351,10 +340,9 @@ static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
- struct intel_uncore *uncore = &i915->uncore;
u32 val;
- val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
+ val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
if (val == 0xffffffff) {
drm_dbg_kms(&i915->drm,
"Port %s: PHY in TCCOLD, assuming not complete\n",
@@ -379,11 +367,9 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
bool take)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
u32 val;
- val = intel_uncore_read(uncore,
- PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
+ val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
if (val == 0xffffffff) {
drm_dbg_kms(&i915->drm,
"Port %s: PHY in TCCOLD, can't %s ownership\n",
@@ -396,8 +382,7 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
if (take)
val |= DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
- intel_uncore_write(uncore,
- PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
+ intel_de_write(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
return true;
}
@@ -406,16 +391,15 @@ static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
bool take)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
enum port port = dig_port->base.port;
u32 val;
- val = intel_uncore_read(uncore, DDI_BUF_CTL(port));
+ val = intel_de_read(i915, DDI_BUF_CTL(port));
if (take)
val |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;
else
val &= ~DDI_BUF_CTL_TC_PHY_OWNERSHIP;
- intel_uncore_write(uncore, DDI_BUF_CTL(port), val);
+ intel_de_write(i915, DDI_BUF_CTL(port), val);
return true;
}
@@ -433,11 +417,9 @@ static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take
static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
u32 val;
- val = intel_uncore_read(uncore,
- PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
+ val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
if (val == 0xffffffff) {
drm_dbg_kms(&i915->drm,
"Port %s: PHY in TCCOLD, assume safe mode\n",
@@ -451,11 +433,10 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
enum port port = dig_port->base.port;
u32 val;
- val = intel_uncore_read(uncore, DDI_BUF_CTL(port));
+ val = intel_de_read(i915, DDI_BUF_CTL(port));
return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
}
@@ -877,7 +858,7 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
mutex_lock(&dig_port->tc_lock);
wakeref = tc_cold_block(dig_port, &domain);
- val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
+ val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
tc_cold_unblock(dig_port, domain, wakeref);
mutex_unlock(&dig_port->tc_lock);
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
2022-08-23 9:01 ` [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de Maarten Lankhorst
2022-08-23 9:01 ` [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c Maarten Lankhorst
@ 2022-08-23 9:01 ` Maarten Lankhorst
2022-08-29 13:30 ` Jani Nikula
2022-08-23 9:01 ` [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de Maarten Lankhorst
` (7 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Maarten Lankhorst @ 2022-08-23 9:01 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 25 ++++++++++++-----------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 198a2f4920cc..c209d0b35041 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -29,9 +29,10 @@
#include <drm/display/drm_dp_helper.h>
#include <drm/display/drm_dsc_helper.h>
-#include "display/intel_display.h"
-#include "display/intel_display_types.h"
-#include "display/intel_gmbus.h"
+#include "intel_de.h"
+#include "intel_display.h"
+#include "intel_display_types.h"
+#include "intel_gmbus.h"
#include "i915_drv.h"
#include "i915_reg.h"
@@ -2960,16 +2961,16 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
u16 vbt_size;
u32 *vbt;
- static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
+ static_region = intel_de_read(i915, SPI_STATIC_REGIONS);
static_region &= OPTIONROM_SPI_REGIONID_MASK;
- intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
+ intel_de_write(i915, PRIMARY_SPI_REGIONID, static_region);
- oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
+ oprom_offset = intel_de_read(i915, OROM_OFFSET);
oprom_offset &= OROM_OFFSET_MASK;
for (count = 0; count < oprom_size; count += 4) {
- intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
- data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
+ intel_de_write(i915, PRIMARY_SPI_ADDRESS, oprom_offset + count);
+ data = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
if (data == *((const u32 *)"$VBT")) {
found = oprom_offset + count;
@@ -2981,9 +2982,9 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
goto err_not_found;
/* Get VBT size and allocate space for the VBT */
- intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
+ intel_de_write(i915, PRIMARY_SPI_ADDRESS, found +
offsetof(struct vbt_header, vbt_size));
- vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
+ vbt_size = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
vbt_size &= 0xffff;
vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
@@ -2991,8 +2992,8 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
goto err_not_found;
for (count = 0; count < vbt_size; count += 4) {
- intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
- data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
+ intel_de_write(i915, PRIMARY_SPI_ADDRESS, found + count);
+ data = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
*(vbt + store++) = data;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (2 preceding siblings ...)
2022-08-23 9:01 ` [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c Maarten Lankhorst
@ 2022-08-23 9:01 ` Maarten Lankhorst
2022-08-29 13:34 ` Jani Nikula
2022-08-29 13:51 ` Ville Syrjälä
2022-08-23 10:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de Patchwork
` (6 subsequent siblings)
10 siblings, 2 replies; 18+ messages in thread
From: Maarten Lankhorst @ 2022-08-23 9:01 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 8 ++--
drivers/gpu/drm/i915/display/intel_crt.c | 33 +++++++------
drivers/gpu/drm/i915/display/intel_de.h | 47 +++++++++++++++++++
.../drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 6 +--
drivers/gpu/drm/i915/display/intel_dp_aux.c | 30 ++++++------
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 9 ++--
drivers/gpu/drm/i915/display/intel_fbc.c | 10 +---
drivers/gpu/drm/i915/display/intel_gmbus.c | 42 ++++++++---------
drivers/gpu/drm/i915/display/intel_hdcp.c | 6 +--
drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
11 files changed, 118 insertions(+), 86 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 8ecf4e3e2bc6..1ca588e31dc9 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
u32 dclk_ratio, dclk_reference;
u32 val;
- val = intel_uncore_read(&dev_priv->uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
+ val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
if (val & DG1_QCLK_REFERENCE)
dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
@@ -50,18 +50,18 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 1000);
- val = intel_uncore_read(&dev_priv->uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
+ val = intel_de_read(dev_priv, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
if (val & DG1_GEAR_TYPE)
sp->dclk *= 2;
if (sp->dclk == 0)
return -EINVAL;
- val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
+ val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
- val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
+ val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 6a3893c8ff22..5f64d1d600b7 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -679,7 +679,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
{
struct drm_device *dev = crt->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_uncore *uncore = &dev_priv->uncore;
u32 save_bclrpat;
u32 save_vtotal;
u32 vtotal, vactive;
@@ -700,9 +699,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
pipeconf_reg = PIPECONF(pipe);
pipe_dsl_reg = PIPEDSL(pipe);
- save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
- save_vtotal = intel_uncore_read(uncore, vtotal_reg);
- vblank = intel_uncore_read(uncore, vblank_reg);
+ save_bclrpat = intel_de_read(dev_priv, bclrpat_reg);
+ save_vtotal = intel_de_read(dev_priv, vtotal_reg);
+ vblank = intel_de_read(dev_priv, vblank_reg);
vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
vactive = (save_vtotal & 0x7ff) + 1;
@@ -711,23 +710,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
vblank_end = ((vblank >> 16) & 0xfff) + 1;
/* Set the border color to purple. */
- intel_uncore_write(uncore, bclrpat_reg, 0x500050);
+ intel_de_write(dev_priv, bclrpat_reg, 0x500050);
if (DISPLAY_VER(dev_priv) != 2) {
- u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
- intel_uncore_write(uncore,
+ u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
+ intel_de_write(dev_priv,
pipeconf_reg,
pipeconf | PIPECONF_FORCE_BORDER);
- intel_uncore_posting_read(uncore, pipeconf_reg);
+ intel_de_posting_read(dev_priv, pipeconf_reg);
/* Wait for next Vblank to substitue
* border color for Color info */
intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
- st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
+ st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
status = ((st00 & (1 << 4)) != 0) ?
connector_status_connected :
connector_status_disconnected;
- intel_uncore_write(uncore, pipeconf_reg, pipeconf);
+ intel_de_write(dev_priv, pipeconf_reg, pipeconf);
} else {
bool restore_vblank = false;
int count, detect;
@@ -741,7 +740,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
u32 vsync_start = (vsync & 0xffff) + 1;
vblank_start = vsync_start;
- intel_uncore_write(uncore,
+ intel_de_write(dev_priv,
vblank_reg,
(vblank_start - 1) |
((vblank_end - 1) << 16));
@@ -756,9 +755,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
/*
* Wait for the border to be displayed
*/
- while (intel_uncore_read(uncore, pipe_dsl_reg) >= vactive)
+ while (intel_de_read(dev_priv, pipe_dsl_reg) >= vactive)
;
- while ((dsl = intel_uncore_read(uncore, pipe_dsl_reg)) <=
+ while ((dsl = intel_de_read(dev_priv, pipe_dsl_reg)) <=
vsample)
;
/*
@@ -769,14 +768,14 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
do {
count++;
/* Read the ST00 VGA status register */
- st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
+ st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
if (st00 & (1 << 4))
detect++;
- } while ((intel_uncore_read(uncore, pipe_dsl_reg) == dsl));
+ } while ((intel_de_read(dev_priv, pipe_dsl_reg) == dsl));
/* restore vblank if necessary */
if (restore_vblank)
- intel_uncore_write(uncore, vblank_reg, vblank);
+ intel_de_write(dev_priv, vblank_reg, vblank);
/*
* If more than 3/4 of the scanline detected a monitor,
* then it is assumed to be present. This works even on i830,
@@ -789,7 +788,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
}
/* Restore previous settings */
- intel_uncore_write(uncore, bclrpat_reg, save_bclrpat);
+ intel_de_write(dev_priv, bclrpat_reg, save_bclrpat);
return status;
}
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index d51e83a45dce..648b8778f0dc 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -17,6 +17,12 @@ intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
return intel_uncore_read(&i915->uncore, reg);
}
+static inline u8
+intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
+{
+ return intel_uncore_read8(&i915->uncore, reg);
+}
+
static inline void
intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
{
@@ -42,6 +48,23 @@ intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout);
}
+static inline int
+intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 mask, u32 value, unsigned int timeout)
+{
+ return intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout);
+}
+
+static inline int
+__intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 mask, u32 value,
+ unsigned int fast_timeout_us,
+ unsigned int slow_timeout_ms, u32 *out_value)
+{
+ return __intel_wait_for_register(&i915->uncore, reg, mask, value,
+ fast_timeout_us, slow_timeout_ms, out_value);
+}
+
static inline int
intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg,
u32 mask, unsigned int timeout)
@@ -82,6 +105,30 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
intel_uncore_write_fw(&i915->uncore, reg, val);
}
+static inline void
+intel_de_write_samevalue(struct drm_i915_private *i915, i915_reg_t reg)
+{
+ /*
+ * This is used by FBC to write the same value, protected against
+ * atomic commit using the uncore lock.
+ */
+ spin_lock_irq(&i915->uncore.lock);
+ intel_de_write_fw(i915, reg, intel_de_read_fw(i915, reg));
+ spin_unlock_irq(&i915->uncore.lock);
+}
+
+static inline u32
+intel_de_read_notrace(struct drm_i915_private *i915, i915_reg_t reg)
+{
+ return intel_uncore_read_notrace(&i915->uncore, reg);
+}
+
+static inline void
+intel_de_write_notrace(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
+{
+ intel_uncore_write_notrace(&i915->uncore, reg, val);
+}
+
static inline int
intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
int fast_timeout_us, int slow_timeout_ms)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 3d2ac2c5b0d2..aff5c3ac3a36 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1660,7 +1660,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
if (DISPLAY_VER(dev_priv) >= 12) {
val = DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR;
- intel_uncore_rmw(&dev_priv->uncore, GEN11_CHICKEN_DCPR_2, 0, val);
+ intel_de_rmw(dev_priv, GEN11_CHICKEN_DCPR_2, 0, val);
}
/* Wa_14011503030:xelpd */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 6c35212c3625..da7b67c8a283 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -433,9 +433,9 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
for (id = 0; id < DMC_FW_MAX; id++) {
for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) {
- intel_uncore_write_fw(&dev_priv->uncore,
- DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),
- dmc->dmc_info[id].payload[i]);
+ intel_de_write_fw(dev_priv,
+ DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),
+ dmc->dmc_info[id].payload[i]);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 2bc119374555..db5cc008f78f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -5,6 +5,7 @@
#include "i915_drv.h"
#include "i915_trace.h"
+#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dp_aux.h"
#include "intel_pps.h"
@@ -41,7 +42,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
u32 status;
bool done;
-#define C (((status = intel_uncore_read_notrace(&i915->uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
+#define C (((status = intel_de_read_notrace(i915, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
done = wait_event_timeout(i915->gmbus_wait_queue, C,
msecs_to_jiffies_timeout(timeout_ms));
@@ -182,7 +183,6 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_i915_private *i915 =
to_i915(dig_port->base.base.dev);
- struct intel_uncore *uncore = &i915->uncore;
enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
bool is_tc_port = intel_phy_is_tc(i915, phy);
i915_reg_t ch_ctl, ch_data[5];
@@ -226,7 +226,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
/* Try to wait for any previous AUX channel activity */
for (try = 0; try < 3; try++) {
- status = intel_uncore_read_notrace(uncore, ch_ctl);
+ status = intel_de_read_notrace(i915, ch_ctl);
if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
break;
msleep(1);
@@ -235,7 +235,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true);
if (try == 3) {
- const u32 status = intel_uncore_read(uncore, ch_ctl);
+ const u32 status = intel_de_read(i915, ch_ctl);
if (status != intel_dp->aux_busy_last_status) {
drm_WARN(&i915->drm, 1,
@@ -265,23 +265,21 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
for (try = 0; try < 5; try++) {
/* Load the send data into the aux channel data registers */
for (i = 0; i < send_bytes; i += 4)
- intel_uncore_write(uncore,
- ch_data[i >> 2],
- intel_dp_aux_pack(send + i,
- send_bytes - i));
+ intel_de_write(i915, ch_data[i >> 2],
+ intel_dp_aux_pack(send + i,
+ send_bytes - i));
/* Send the command and wait for it to complete */
- intel_uncore_write(uncore, ch_ctl, send_ctl);
+ intel_de_write(i915, ch_ctl, send_ctl);
status = intel_dp_aux_wait_done(intel_dp);
/* Clear done status and any errors */
- intel_uncore_write(uncore,
- ch_ctl,
- status |
- DP_AUX_CH_CTL_DONE |
- DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR);
+ intel_de_write(i915, ch_ctl,
+ status |
+ DP_AUX_CH_CTL_DONE |
+ DP_AUX_CH_CTL_TIME_OUT_ERROR |
+ DP_AUX_CH_CTL_RECEIVE_ERROR);
/*
* DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
@@ -352,7 +350,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
recv_bytes = recv_size;
for (i = 0; i < recv_bytes; i += 4)
- intel_dp_aux_unpack(intel_uncore_read(uncore, ch_data[i >> 2]),
+ intel_dp_aux_unpack(intel_de_read(i915, ch_data[i >> 2]),
recv + i, recv_bytes - i);
ret = recv_bytes;
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index cc6abe761f5e..220e5795482f 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -400,11 +400,10 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
* The flag should get set in 100us according to the HW team, but
* use 1ms due to occasional timeouts observed with that.
*/
- if (intel_wait_for_register_fw(&dev_priv->uncore,
- BXT_PORT_CL1CM_DW0(phy),
- PHY_RESERVED | PHY_POWER_GOOD,
- PHY_POWER_GOOD,
- 1))
+ if (intel_de_wait_for_register_fw(dev_priv,
+ BXT_PORT_CL1CM_DW0(phy),
+ PHY_RESERVED | PHY_POWER_GOOD,
+ PHY_POWER_GOOD, 1))
drm_err(&dev_priv->drm, "timeout during PHY%d power on\n",
phy);
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 7436b35f7ea0..3b772ebf7e39 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -323,10 +323,7 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
struct drm_i915_private *dev_priv = fbc->i915;
- spin_lock_irq(&dev_priv->uncore.lock);
- intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane),
- intel_de_read_fw(dev_priv, DSPADDR(i9xx_plane)));
- spin_unlock_irq(&dev_priv->uncore.lock);
+ intel_de_write_samevalue(dev_priv, DSPADDR(i9xx_plane));
}
static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
@@ -359,10 +356,7 @@ static void i965_fbc_nuke(struct intel_fbc *fbc)
enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
struct drm_i915_private *dev_priv = fbc->i915;
- spin_lock_irq(&dev_priv->uncore.lock);
- intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
- intel_de_read_fw(dev_priv, DSPSURF(i9xx_plane)));
- spin_unlock_irq(&dev_priv->uncore.lock);
+ intel_de_write_samevalue(dev_priv, DSPSURF(i9xx_plane));
}
static const struct intel_fbc_funcs i965_fbc_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index a6ba7fb72339..cd8eedff97d9 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -219,12 +219,11 @@ static void bxt_gmbus_clock_gating(struct drm_i915_private *dev_priv,
static u32 get_reserved(struct intel_gmbus *bus)
{
struct drm_i915_private *i915 = bus->dev_priv;
- struct intel_uncore *uncore = &i915->uncore;
u32 reserved = 0;
/* On most chips, these bits must be preserved in software. */
if (!IS_I830(i915) && !IS_I845G(i915))
- reserved = intel_uncore_read_notrace(uncore, bus->gpio_reg) &
+ reserved = intel_de_read_notrace(i915, bus->gpio_reg) &
(GPIO_DATA_PULLUP_DISABLE |
GPIO_CLOCK_PULLUP_DISABLE);
@@ -234,37 +233,36 @@ static u32 get_reserved(struct intel_gmbus *bus)
static int get_clock(void *data)
{
struct intel_gmbus *bus = data;
- struct intel_uncore *uncore = &bus->dev_priv->uncore;
+ struct drm_i915_private *i915 = bus->dev_priv;
u32 reserved = get_reserved(bus);
- intel_uncore_write_notrace(uncore,
+ intel_de_write_notrace(i915,
bus->gpio_reg,
reserved | GPIO_CLOCK_DIR_MASK);
- intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
+ intel_de_write_notrace(i915, bus->gpio_reg, reserved);
- return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
+ return (intel_de_read_notrace(i915, bus->gpio_reg) &
GPIO_CLOCK_VAL_IN) != 0;
}
static int get_data(void *data)
{
struct intel_gmbus *bus = data;
- struct intel_uncore *uncore = &bus->dev_priv->uncore;
+ struct drm_i915_private *i915 = bus->dev_priv;
u32 reserved = get_reserved(bus);
- intel_uncore_write_notrace(uncore,
- bus->gpio_reg,
- reserved | GPIO_DATA_DIR_MASK);
- intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
+ intel_de_write_notrace(i915, bus->gpio_reg,
+ reserved | GPIO_DATA_DIR_MASK);
+ intel_de_write_notrace(i915, bus->gpio_reg, reserved);
- return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
+ return (intel_de_read_notrace(i915, bus->gpio_reg) &
GPIO_DATA_VAL_IN) != 0;
}
static void set_clock(void *data, int state_high)
{
struct intel_gmbus *bus = data;
- struct intel_uncore *uncore = &bus->dev_priv->uncore;
+ struct drm_i915_private *i915 = bus->dev_priv;
u32 reserved = get_reserved(bus);
u32 clock_bits;
@@ -274,16 +272,15 @@ static void set_clock(void *data, int state_high)
clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
GPIO_CLOCK_VAL_MASK;
- intel_uncore_write_notrace(uncore,
- bus->gpio_reg,
- reserved | clock_bits);
- intel_uncore_posting_read(uncore, bus->gpio_reg);
+ intel_de_write_notrace(i915, bus->gpio_reg,
+ reserved | clock_bits);
+ intel_de_posting_read(i915, bus->gpio_reg);
}
static void set_data(void *data, int state_high)
{
struct intel_gmbus *bus = data;
- struct intel_uncore *uncore = &bus->dev_priv->uncore;
+ struct drm_i915_private *i915 = bus->dev_priv;
u32 reserved = get_reserved(bus);
u32 data_bits;
@@ -293,8 +290,8 @@ static void set_data(void *data, int state_high)
data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
GPIO_DATA_VAL_MASK;
- intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved | data_bits);
- intel_uncore_posting_read(uncore, bus->gpio_reg);
+ intel_de_write_notrace(i915, bus->gpio_reg, reserved | data_bits);
+ intel_de_posting_read(i915, bus->gpio_reg);
}
static int
@@ -403,9 +400,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
add_wait_queue(&dev_priv->gmbus_wait_queue, &wait);
intel_de_write_fw(dev_priv, GMBUS4, irq_enable);
- ret = intel_wait_for_register_fw(&dev_priv->uncore,
- GMBUS2, GMBUS_ACTIVE, 0,
- 10);
+ ret = intel_de_wait_for_register_fw(dev_priv,
+ GMBUS2, GMBUS_ACTIVE, 0, 10);
intel_de_write_fw(dev_priv, GMBUS4, 0);
remove_wait_queue(&dev_priv->gmbus_wait_queue, &wait);
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index f819b29906bd..691d6d9a6854 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -310,9 +310,9 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
}
/* Wait for the keys to load (500us) */
- ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
- HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
- 10, 1, &val);
+ ret = __intel_de_wait_for_register(dev_priv, HDCP_KEY_STATUS,
+ HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
+ 10, 1, &val);
if (ret)
return ret;
else if (!(val & HDCP_KEY_LOAD_STATUS))
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index 0bdbedc67d7d..ba6a6d607c93 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -53,8 +53,8 @@ void intel_snps_phy_update_psr_power_state(struct drm_i915_private *dev_priv,
val = REG_FIELD_PREP(SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR,
enable ? 2 : 3);
- intel_uncore_rmw(&dev_priv->uncore, SNPS_PHY_TX_REQ(phy),
- SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
+ intel_de_rmw(dev_priv, SNPS_PHY_TX_REQ(phy),
+ SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
}
void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
@@ -668,7 +668,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
*/
/* 5. Software sets DPLL_ENABLE [PLL Enable] to "1". */
- intel_uncore_rmw(&dev_priv->uncore, enable_reg, 0, PLL_ENABLE);
+ intel_de_rmw(dev_priv, enable_reg, 0, PLL_ENABLE);
/*
* 9. Software sets SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "1". This
@@ -713,14 +713,13 @@ void intel_mpllb_disable(struct intel_encoder *encoder)
*/
/* 2. Software programs DPLL_ENABLE [PLL Enable] to "0" */
- intel_uncore_rmw(&i915->uncore, enable_reg, PLL_ENABLE, 0);
+ intel_de_rmw(i915, enable_reg, PLL_ENABLE, 0);
/*
* 4. Software programs SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "0".
* This will allow the PLL to stop running.
*/
- intel_uncore_rmw(&i915->uncore, SNPS_PHY_MPLLB_DIV(phy),
- SNPS_PHY_MPLLB_FORCE_EN, 0);
+ intel_de_rmw(i915, SNPS_PHY_MPLLB_DIV(phy), SNPS_PHY_MPLLB_FORCE_EN, 0);
/*
* 5. Software polls DPLL_ENABLE [PLL Lock] for PHY acknowledgment
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (3 preceding siblings ...)
2022-08-23 9:01 ` [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de Maarten Lankhorst
@ 2022-08-23 10:03 ` Patchwork
2022-08-23 10:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (5 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-23 10:03 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de
URL : https://patchwork.freedesktop.org/series/107610/
State : warning
== Summary ==
Error: dim checkpatch failed
8882eb8fcb3c drm/i915: Move display pcode requests to intel_de
-:226: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#226: FILE: drivers/gpu/drm/i915/display/intel_de.h:87:
+intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
+ int fast_timeout_us, int slow_timeout_ms)
-:235: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#235: FILE: drivers/gpu/drm/i915/display/intel_de.h:96:
+{
+
total: 0 errors, 0 warnings, 2 checks, 273 lines checked
06e3fcc575ae drm/i915: Remove uncore from intel_tc.c
7b3d6b10756e drm/i915: Remove uncore from intel_bios.c
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 55 lines checked
d034732a2176 drm/i915: Replace remaining display uncore references to use intel_de
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:80: WARNING:LINE_SPACING: Missing a blank line after declarations
#80: FILE: drivers/gpu/drm/i915/display/intel_crt.c:717:
+ u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
+ intel_de_write(dev_priv,
-:81: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#81: FILE: drivers/gpu/drm/i915/display/intel_crt.c:718:
+ intel_de_write(dev_priv,
pipeconf_reg,
-:105: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#105: FILE: drivers/gpu/drm/i915/display/intel_crt.c:744:
+ intel_de_write(dev_priv,
vblank_reg,
-:414: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#414: FILE: drivers/gpu/drm/i915/display/intel_gmbus.c:240:
+ intel_de_write_notrace(i915,
bus->gpio_reg,
total: 0 errors, 2 warnings, 3 checks, 468 lines checked
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (4 preceding siblings ...)
2022-08-23 10:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de Patchwork
@ 2022-08-23 10:03 ` Patchwork
2022-08-23 10:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-23 10:03 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de
URL : https://patchwork.freedesktop.org/series/107610/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:223:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:223:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:225:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:225:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:104:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:104:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:106:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:106:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:110:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:110:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:110:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:110:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:110:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:110:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:111:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:120:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:120:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:127:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:127:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:152:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:152:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:154:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:154:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:155:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:155:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:156:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:156:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:158:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:158:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:158:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:158:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:158:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:158:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:27:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:27:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:29:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:29:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:32:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:32:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:32:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:32:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:36:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:36:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:38:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:38:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:41:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:41:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:41:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:41:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:54:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:54:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:56:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:56:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:59:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:59:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:59:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:59:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:72:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:72:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:74:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:74:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:78:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:78:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:78:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:78:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:78:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:78:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:79:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:94:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:94:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:98:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:98:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:98:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:98:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:98:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:98:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:99:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Move display pcode requests to intel_de
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (5 preceding siblings ...)
2022-08-23 10:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-08-23 10:25 ` Patchwork
2022-08-24 7:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-23 10:25 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 18961 bytes --]
== Series Details ==
Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de
URL : https://patchwork.freedesktop.org/series/107610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12014 -> Patchwork_107610v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_107610v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_107610v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/index.html
Participating hosts (30 -> 38)
------------------------------
Additional (8): fi-rkl-11600 bat-dg1-5 bat-dg2-8 bat-adlp-4 bat-jsl-3 bat-rplp-1 bat-rpls-1 bat-dg2-10
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_107610v1:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unbind-rebind:
- fi-elk-e7500: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12014/fi-elk-e7500/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-elk-e7500/igt@core_hotunplug@unbind-rebind.html
#### Warnings ####
* igt@i915_suspend@basic-s3-without-i915:
- fi-glk-j4005: [INCOMPLETE][3] ([i915#6598]) -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12014/fi-glk-j4005/igt@i915_suspend@basic-s3-without-i915.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-glk-j4005/igt@i915_suspend@basic-s3-without-i915.html
Known issues
------------
Here are the changes found in Patchwork_107610v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@info:
- bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#2582]) +4 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@fbdev@info.html
* igt@fbdev@read:
- bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#2582]) +4 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@fbdev@read.html
* igt@gem_huc_copy@huc-copy:
- fi-rkl-11600: NOTRUN -> [SKIP][7] ([i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-rkl-11600: NOTRUN -> [SKIP][8] ([i915#4613]) +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@verify-random:
- bat-adlp-4: NOTRUN -> [SKIP][9] ([i915#4613]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@gem_lmem_swapping@verify-random.html
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#4083])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@gem_mmap@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#4077]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- fi-rkl-11600: NOTRUN -> [SKIP][12] ([i915#3282])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html
- bat-dg1-5: NOTRUN -> [SKIP][13] ([i915#4079]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][14] ([i915#3282])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600: NOTRUN -> [SKIP][15] ([i915#3012])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
- bat-dg1-5: NOTRUN -> [SKIP][16] ([i915#1155])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@i915_pm_backlight@basic-brightness.html
- bat-adlp-4: NOTRUN -> [SKIP][17] ([i915#1155])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_pm_rps@basic-api:
- bat-dg1-5: NOTRUN -> [SKIP][18] ([i915#6621])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@i915_pm_rps@basic-api.html
- bat-adlp-4: NOTRUN -> [SKIP][19] ([i915#6621])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258: [PASS][20] -> [INCOMPLETE][21] ([i915#3303] / [i915#4785])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12014/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
- bat-dg1-5: NOTRUN -> [DMESG-FAIL][22] ([i915#4494] / [i915#4957])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5: NOTRUN -> [INCOMPLETE][23] ([i915#6011])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: NOTRUN -> [INCOMPLETE][24] ([i915#5982])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
- fi-hsw-4770: NOTRUN -> [INCOMPLETE][25] ([i915#4817] / [i915#6598])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-hsw-4770/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][26] ([i915#4212]) +7 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][27] ([i915#4215])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_busy@basic:
- bat-dg1-5: NOTRUN -> [SKIP][28] ([i915#1845] / [i915#4303])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_busy@basic.html
* igt@kms_chamelium@dp-crc-fast:
- bat-adlp-4: NOTRUN -> [SKIP][29] ([fdo#111827]) +8 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-rkl-11600: NOTRUN -> [SKIP][30] ([fdo#111827]) +7 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@kms_chamelium@hdmi-hpd-fast.html
- bat-dg1-5: NOTRUN -> [SKIP][31] ([fdo#111827]) +7 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600: NOTRUN -> [SKIP][32] ([i915#4103])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_flip@basic-plain-flip:
- bat-adlp-4: NOTRUN -> [SKIP][33] ([i915#3637]) +3 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600: NOTRUN -> [SKIP][34] ([fdo#109285] / [i915#4098])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg1-5: NOTRUN -> [SKIP][35] ([fdo#109285])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlp-4: NOTRUN -> [SKIP][36] ([i915#4093]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-4: NOTRUN -> [SKIP][37] ([i915#4342])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-dg1-5: NOTRUN -> [SKIP][38] ([i915#4078]) +13 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_pipe_crc_basic@nonblocking-crc.html
* igt@kms_pipe_crc_basic@read-crc:
- bat-adlp-4: NOTRUN -> [SKIP][39] ([i915#3546]) +10 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_pipe_crc_basic@read-crc.html
* igt@kms_psr@sprite_plane_onoff:
- fi-rkl-11600: NOTRUN -> [SKIP][40] ([i915#1072]) +3 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html
- bat-dg1-5: NOTRUN -> [SKIP][41] ([i915#1072] / [i915#4078]) +3 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_psr@sprite_plane_onoff.html
- bat-adlp-4: NOTRUN -> [SKIP][42] ([i915#1072]) +3 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600: NOTRUN -> [SKIP][43] ([i915#3555] / [i915#4098])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg1-5: NOTRUN -> [SKIP][44] ([i915#3555])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html
- bat-adlp-4: NOTRUN -> [SKIP][45] ([i915#3555] / [i915#4579])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-adlp-4: NOTRUN -> [SKIP][46] ([fdo#109295] / [i915#3546] / [i915#3708])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@prime_vgem@basic-fence-flip.html
- bat-dg1-5: NOTRUN -> [SKIP][47] ([i915#1845] / [i915#3708])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-read:
- bat-dg1-5: NOTRUN -> [SKIP][48] ([i915#3708]) +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-gtt:
- bat-dg1-5: NOTRUN -> [SKIP][49] ([i915#3708] / [i915#4077]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@basic-read:
- fi-rkl-11600: NOTRUN -> [SKIP][50] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- bat-adlp-4: NOTRUN -> [SKIP][51] ([fdo#109295] / [i915#3301] / [i915#3708])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@prime_vgem@basic-userptr.html
- bat-dg1-5: NOTRUN -> [SKIP][52] ([i915#3708] / [i915#4873])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@prime_vgem@basic-userptr.html
- fi-rkl-11600: NOTRUN -> [SKIP][53] ([fdo#109295] / [i915#3301] / [i915#3708])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
* igt@prime_vgem@basic-write:
- bat-adlp-4: NOTRUN -> [SKIP][54] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-adlp-4/igt@prime_vgem@basic-write.html
* igt@runner@aborted:
- bat-dg1-5: NOTRUN -> [FAIL][55] ([i915#4312] / [i915#5257])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/bat-dg1-5/igt@runner@aborted.html
- fi-hsw-g3258: NOTRUN -> [FAIL][56] ([fdo#109271] / [i915#4312] / [i915#6246])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-hsw-g3258/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][57] ([i915#4785]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12014/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
#### Warnings ####
* igt@i915_suspend@basic-s3-without-i915:
- fi-elk-e7500: [INCOMPLETE][59] ([i915#6648]) -> [INCOMPLETE][60] ([i915#6598] / [i915#6601] / [i915#6648])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12014/fi-elk-e7500/igt@i915_suspend@basic-s3-without-i915.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/fi-elk-e7500/igt@i915_suspend@basic-s3-without-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4303]: https://gitlab.freedesktop.org/drm/intel/issues/4303
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
[i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
[i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6565]: https://gitlab.freedesktop.org/drm/intel/issues/6565
[i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
[i915#6601]: https://gitlab.freedesktop.org/drm/intel/issues/6601
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6642]: https://gitlab.freedesktop.org/drm/intel/issues/6642
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6648]: https://gitlab.freedesktop.org/drm/intel/issues/6648
Build changes
-------------
* Linux: CI_DRM_12014 -> Patchwork_107610v1
CI-20190529: 20190529
CI_DRM_12014: 1de33826aa86910c175ca773bc8f92d5948d094e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6634: e01fe99f00692864b709253638c809231d1fb333 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107610v1: 1de33826aa86910c175ca773bc8f92d5948d094e @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
83d246312516 drm/i915: Replace remaining display uncore references to use intel_de
f40e1da9afbf drm/i915: Remove uncore from intel_bios.c
12680508e5a4 drm/i915: Remove uncore from intel_tc.c
e5dbb7525c39 drm/i915: Move display pcode requests to intel_de
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v1/index.html
[-- Attachment #2: Type: text/html, Size: 22335 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2)
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (6 preceding siblings ...)
2022-08-23 10:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-08-24 7:33 ` Patchwork
2022-08-24 7:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-24 7:33 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2)
URL : https://patchwork.freedesktop.org/series/107610/
State : warning
== Summary ==
Error: dim checkpatch failed
65b635139e84 drm/i915: Move display pcode requests to intel_de
-:226: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#226: FILE: drivers/gpu/drm/i915/display/intel_de.h:87:
+intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
+ int fast_timeout_us, int slow_timeout_ms)
-:235: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#235: FILE: drivers/gpu/drm/i915/display/intel_de.h:96:
+{
+
total: 0 errors, 0 warnings, 2 checks, 273 lines checked
44a7584dedad drm/i915: Remove uncore from intel_tc.c
7f461f0feb68 drm/i915: Remove uncore from intel_bios.c
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 55 lines checked
b90cf674f840 drm/i915: Replace remaining display uncore references to use intel_de
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:80: WARNING:LINE_SPACING: Missing a blank line after declarations
#80: FILE: drivers/gpu/drm/i915/display/intel_crt.c:717:
+ u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
+ intel_de_write(dev_priv,
-:81: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#81: FILE: drivers/gpu/drm/i915/display/intel_crt.c:718:
+ intel_de_write(dev_priv,
pipeconf_reg,
-:105: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#105: FILE: drivers/gpu/drm/i915/display/intel_crt.c:744:
+ intel_de_write(dev_priv,
vblank_reg,
-:414: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#414: FILE: drivers/gpu/drm/i915/display/intel_gmbus.c:240:
+ intel_de_write_notrace(i915,
bus->gpio_reg,
total: 0 errors, 2 warnings, 3 checks, 468 lines checked
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2)
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (7 preceding siblings ...)
2022-08-24 7:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2) Patchwork
@ 2022-08-24 7:33 ` Patchwork
2022-08-24 7:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-08-25 9:06 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove references to uncore from display. (rev2) Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-24 7:33 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2)
URL : https://patchwork.freedesktop.org/series/107610/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:223:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:223:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:225:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:225:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:104:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:104:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:106:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:106:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:110:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:110:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:110:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:110:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:110:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:110:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:111:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:120:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:120:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:127:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:127:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:152:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:152:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:154:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:154:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:155:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:155:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:156:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:156:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:158:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:158:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:158:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:158:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:158:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:158:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:27:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:27:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:29:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:29:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:32:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:32:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:32:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:32:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:36:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:36:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:38:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:38:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:41:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:41:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:41:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:41:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:54:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:54:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:56:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:56:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:59:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:59:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:59:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:59:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:72:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:72:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:74:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:74:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:78:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:78:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:78:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:78:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:78:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:78:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:79:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:94:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:94:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:98:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:98:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:98:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:98:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:98:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:98:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:99:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2)
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (8 preceding siblings ...)
2022-08-24 7:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-08-24 7:54 ` Patchwork
2022-08-25 9:06 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove references to uncore from display. (rev2) Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-24 7:54 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5130 bytes --]
== Series Details ==
Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2)
URL : https://patchwork.freedesktop.org/series/107610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12018 -> Patchwork_107610v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/index.html
Participating hosts (38 -> 34)
------------------------------
Missing (4): bat-rplp-1 bat-rpls-1 bat-rpls-2 bat-adlp-4
Known issues
------------
Here are the changes found in Patchwork_107610v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@busy:
- bat-dg1-6: NOTRUN -> [FAIL][1] ([i915#6011])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/bat-dg1-6/igt@gem_busy@busy.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-hsw-g3258: NOTRUN -> [INCOMPLETE][2] ([i915#6598])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/fi-hsw-g3258/igt@i915_suspend@basic-s3-without-i915.html
#### Possible fixes ####
* igt@i915_module_load@reload:
- {bat-dg2-10}: [DMESG-WARN][3] ([i915#6530]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/bat-dg2-10/igt@i915_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/bat-dg2-10/igt@i915_module_load@reload.html
* igt@i915_selftest@live@gt_lrc:
- {bat-dg2-8}: [INCOMPLETE][5] ([i915#6670]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258: [INCOMPLETE][7] ([i915#3303] / [i915#4785]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka: [FAIL][9] ([i915#6298]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
#### Warnings ####
* igt@i915_suspend@basic-s3-without-i915:
- fi-elk-e7500: [INCOMPLETE][11] ([i915#6598] / [i915#6648]) -> [INCOMPLETE][12] ([i915#6598] / [i915#6601] / [i915#6648])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/fi-elk-e7500/igt@i915_suspend@basic-s3-without-i915.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/fi-elk-e7500/igt@i915_suspend@basic-s3-without-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
[i915#6530]: https://gitlab.freedesktop.org/drm/intel/issues/6530
[i915#6565]: https://gitlab.freedesktop.org/drm/intel/issues/6565
[i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
[i915#6601]: https://gitlab.freedesktop.org/drm/intel/issues/6601
[i915#6642]: https://gitlab.freedesktop.org/drm/intel/issues/6642
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6648]: https://gitlab.freedesktop.org/drm/intel/issues/6648
[i915#6670]: https://gitlab.freedesktop.org/drm/intel/issues/6670
Build changes
-------------
* Linux: CI_DRM_12018 -> Patchwork_107610v2
CI-20190529: 20190529
CI_DRM_12018: b50fa415e25e27958bf55e048d44dad0b2f6a03f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6634: e01fe99f00692864b709253638c809231d1fb333 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107610v2: b50fa415e25e27958bf55e048d44dad0b2f6a03f @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
a16038aeb786 drm/i915: Replace remaining display uncore references to use intel_de
a12425b21b2a drm/i915: Remove uncore from intel_bios.c
58e2428b8cf7 drm/i915: Remove uncore from intel_tc.c
5f318771d6c8 drm/i915: Move display pcode requests to intel_de
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/index.html
[-- Attachment #2: Type: text/html, Size: 5644 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove references to uncore from display. (rev2)
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
` (9 preceding siblings ...)
2022-08-24 7:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-08-25 9:06 ` Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-08-25 9:06 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 23978 bytes --]
== Series Details ==
Series: drm/i915: Remove references to uncore from display. (rev2)
URL : https://patchwork.freedesktop.org/series/107610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12018_full -> Patchwork_107610v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
Additional (1): shard-dg1
Missing (1): shard-rkl
Known issues
------------
Here are the changes found in Patchwork_107610v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-apl: NOTRUN -> [INCOMPLETE][1] ([i915#6598])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl2/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_eio@in-flight-contexts-10ms:
- shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#3063])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-tglb5/igt@gem_eio@in-flight-contexts-10ms.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-tglb5/igt@gem_eio@in-flight-contexts-10ms.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [PASS][4] -> [SKIP][5] ([i915#4525]) +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb1/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb3/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-glk: [PASS][8] -> [FAIL][9] ([i915#2876])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-glk8/igt@gem_exec_fair@basic-pace@vcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-glk1/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-iclb: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb2/igt@gem_exec_fair@basic-pace@vecs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb3/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][12] -> [FAIL][13] ([i915#454])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb1/igt@i915_pm_dc@dc6-psr.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb3/igt@i915_pm_dc@dc6-psr.html
* igt@kms_ccs@pipe-c-crc-primary-basic-4_tiled_dg2_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][14] ([fdo#109271]) +42 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-glk7/igt@kms_ccs@pipe-c-crc-primary-basic-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3886])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl2/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@hdmi-edid-read:
- shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827]) +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl2/igt@kms_chamelium@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-for-each-pipe:
- shard-glk: NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-glk7/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [PASS][18] -> [DMESG-WARN][19] ([i915#180]) +5 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][20] ([i915#2672]) +3 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
- shard-iclb: [PASS][21] -> [SKIP][22] ([i915#3555]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][23] ([i915#2672] / [i915#3555])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271]) +53 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_hdr@bpc-switch@pipe-a-dp-1:
- shard-kbl: [PASS][25] -> [FAIL][26] ([i915#1188])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl4/igt@kms_hdr@bpc-switch@pipe-a-dp-1.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@kms_hdr@bpc-switch@pipe-a-dp-1.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109642] / [fdo#111068] / [i915#658])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb2/igt@kms_psr2_su@page_flip-xrgb8888.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb6/igt@kms_psr2_su@page_flip-xrgb8888.html
- shard-apl: NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#658])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl6/igt@kms_psr2_su@page_flip-xrgb8888.html
- shard-glk: NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#658])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-glk7/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb2/igt@kms_psr@psr2_dpms.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb3/igt@kms_psr@psr2_dpms.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-kbl: [PASS][33] -> [INCOMPLETE][34] ([i915#3614] / [i915#4939] / [i915#6598])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@sysfs_clients@fair-7:
- shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#2994])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl2/igt@sysfs_clients@fair-7.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [FAIL][36] ([i915#2846]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl: [FAIL][38] ([i915#2842]) -> [PASS][39] +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl7/igt@gem_exec_fair@basic-none@vcs1.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][40] ([i915#2842]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [FAIL][42] ([i915#2842]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [FAIL][44] ([i915#2842]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-glk8/igt@gem_exec_fair@basic-pace@rcs0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-glk1/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [DMESG-WARN][46] ([i915#5566] / [i915#716]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl6/igt@gen9_exec_parse@allowed-single.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl6/igt@gen9_exec_parse@allowed-single.html
- shard-glk: [DMESG-WARN][48] ([i915#5566] / [i915#716]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-glk3/igt@gen9_exec_parse@allowed-single.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-glk7/igt@gen9_exec_parse@allowed-single.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: [DMESG-WARN][50] ([i915#180]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl6/igt@i915_suspend@debugfs-reader.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl2/igt@i915_suspend@debugfs-reader.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode:
- shard-iclb: [SKIP][52] ([i915#3555]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb3/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode.html
#### Warnings ####
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][54] ([i915#2920]) -> [SKIP][55] ([i915#658])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb6/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-iclb: [SKIP][56] ([i915#658]) -> [SKIP][57] ([i915#2920])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-iclb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@runner@aborted:
- shard-apl: ([FAIL][58], [FAIL][59], [FAIL][60], [FAIL][61]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][62], [FAIL][63]) ([i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl6/igt@runner@aborted.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl6/igt@runner@aborted.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl8/igt@runner@aborted.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-apl3/igt@runner@aborted.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl3/igt@runner@aborted.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-apl2/igt@runner@aborted.html
- shard-kbl: ([FAIL][64], [FAIL][65]) ([i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][66], [FAIL][67], [FAIL][68], [FAIL][69], [FAIL][70], [FAIL][71]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl4/igt@runner@aborted.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12018/shard-kbl7/igt@runner@aborted.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@runner@aborted.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@runner@aborted.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl7/igt@runner@aborted.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl7/igt@runner@aborted.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@runner@aborted.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/shard-kbl4/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3614]: https://gitlab.freedesktop.org/drm/intel/issues/3614
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4853]: https://gitlab.freedesktop.org/drm/intel/issues/4853
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4883]: https://gitlab.freedesktop.org/drm/intel/issues/4883
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4893]: https://gitlab.freedesktop.org/drm/intel/issues/4893
[i915#4939]: https://gitlab.freedesktop.org/drm/intel/issues/4939
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5852]: https://gitlab.freedesktop.org/drm/intel/issues/5852
[i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6331]: https://gitlab.freedesktop.org/drm/intel/issues/6331
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6448]: https://gitlab.freedesktop.org/drm/intel/issues/6448
[i915#6458]: https://gitlab.freedesktop.org/drm/intel/issues/6458
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
[i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
Build changes
-------------
* Linux: CI_DRM_12018 -> Patchwork_107610v2
CI-20190529: 20190529
CI_DRM_12018: b50fa415e25e27958bf55e048d44dad0b2f6a03f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6634: e01fe99f00692864b709253638c809231d1fb333 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107610v2: b50fa415e25e27958bf55e048d44dad0b2f6a03f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107610v2/index.html
[-- Attachment #2: Type: text/html, Size: 21063 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c
2022-08-23 9:01 ` [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c Maarten Lankhorst
@ 2022-08-29 13:29 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2022-08-29 13:29 UTC (permalink / raw)
To: Maarten Lankhorst, intel-gfx
On Tue, 23 Aug 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
> Use the intel_de macro's instead of referencing uncore directly.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++-----------------
> 1 file changed, 18 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 6773840f6cc7..4ee69821728d 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -5,6 +5,7 @@
>
> #include "i915_drv.h"
> #include "i915_reg.h"
> +#include "intel_de.h"
> #include "intel_display.h"
> #include "intel_display_power_map.h"
> #include "intel_display_types.h"
> @@ -119,11 +120,9 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 lane_mask;
>
> - lane_mask = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> + lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>
> drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff);
> assert_tc_cold_blocked(dig_port);
> @@ -135,11 +134,9 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 pin_mask;
>
> - pin_mask = intel_uncore_read(uncore,
> - PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
> + pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
>
> drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff);
> assert_tc_cold_blocked(dig_port);
> @@ -185,7 +182,6 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> drm_WARN_ON(&i915->drm,
> @@ -193,8 +189,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
>
> assert_tc_cold_blocked(dig_port);
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
> val &= ~DFLEXDPMLE1_DPMLETC_MASK(dig_port->tc_phy_fia_idx);
>
> switch (required_lanes) {
> @@ -215,8 +210,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> MISSING_CASE(required_lanes);
> }
>
> - intel_uncore_write(uncore,
> - PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
> + intel_de_write(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
> }
>
> static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> @@ -245,13 +239,11 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 isr_bit = i915->hotplug.pch_hpd[dig_port->base.hpd_pin];
> u32 mask = 0;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> @@ -265,7 +257,7 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
> mask |= BIT(TC_PORT_DP_ALT);
>
> - if (intel_uncore_read(uncore, SDEISR) & isr_bit)
> + if (intel_de_read(i915, SDEISR) & isr_bit)
> mask |= BIT(TC_PORT_LEGACY);
>
> /* The sink can be connected only in a single mode. */
> @@ -280,7 +272,6 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> u32 isr_bit = i915->hotplug.pch_hpd[dig_port->base.hpd_pin];
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val, mask = 0;
>
> /*
> @@ -288,13 +279,13 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> * registers in IOM. Note that this doesn't apply to PHY and FIA
> * registers.
> */
> - val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
> + val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> mask |= BIT(TC_PORT_DP_ALT);
> if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> mask |= BIT(TC_PORT_TBT_ALT);
>
> - if (intel_uncore_read(uncore, SDEISR) & isr_bit)
> + if (intel_de_read(i915, SDEISR) & isr_bit)
> mask |= BIT(TC_PORT_LEGACY);
>
> /* The sink can be connected only in a single mode. */
> @@ -325,11 +316,9 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
> static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, assuming not complete\n",
> @@ -351,10 +340,9 @@ static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
> + val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, assuming not complete\n",
> @@ -379,11 +367,9 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> bool take)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, can't %s ownership\n",
> @@ -396,8 +382,7 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> if (take)
> val |= DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
>
> - intel_uncore_write(uncore,
> - PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
> + intel_de_write(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
>
> return true;
> }
> @@ -406,16 +391,15 @@ static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> bool take)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> enum port port = dig_port->base.port;
> u32 val;
>
> - val = intel_uncore_read(uncore, DDI_BUF_CTL(port));
> + val = intel_de_read(i915, DDI_BUF_CTL(port));
> if (take)
> val |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> else
> val &= ~DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> - intel_uncore_write(uncore, DDI_BUF_CTL(port), val);
> + intel_de_write(i915, DDI_BUF_CTL(port), val);
>
> return true;
> }
> @@ -433,11 +417,9 @@ static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take
> static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, assume safe mode\n",
> @@ -451,11 +433,10 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> enum port port = dig_port->base.port;
> u32 val;
>
> - val = intel_uncore_read(uncore, DDI_BUF_CTL(port));
> + val = intel_de_read(i915, DDI_BUF_CTL(port));
> return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> }
>
> @@ -877,7 +858,7 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
>
> mutex_lock(&dig_port->tc_lock);
> wakeref = tc_cold_block(dig_port, &domain);
> - val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
> tc_cold_unblock(dig_port, domain, wakeref);
> mutex_unlock(&dig_port->tc_lock);
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c
2022-08-23 9:01 ` [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c Maarten Lankhorst
@ 2022-08-29 13:30 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2022-08-29 13:30 UTC (permalink / raw)
To: Maarten Lankhorst, intel-gfx
On Tue, 23 Aug 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
Commit message!
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 25 ++++++++++++-----------
> 1 file changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 198a2f4920cc..c209d0b35041 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -29,9 +29,10 @@
> #include <drm/display/drm_dp_helper.h>
> #include <drm/display/drm_dsc_helper.h>
>
> -#include "display/intel_display.h"
> -#include "display/intel_display_types.h"
> -#include "display/intel_gmbus.h"
> +#include "intel_de.h"
> +#include "intel_display.h"
> +#include "intel_display_types.h"
> +#include "intel_gmbus.h"
>
> #include "i915_drv.h"
> #include "i915_reg.h"
> @@ -2960,16 +2961,16 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
> u16 vbt_size;
> u32 *vbt;
>
> - static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
> + static_region = intel_de_read(i915, SPI_STATIC_REGIONS);
> static_region &= OPTIONROM_SPI_REGIONID_MASK;
> - intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
> + intel_de_write(i915, PRIMARY_SPI_REGIONID, static_region);
>
> - oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
> + oprom_offset = intel_de_read(i915, OROM_OFFSET);
> oprom_offset &= OROM_OFFSET_MASK;
>
> for (count = 0; count < oprom_size; count += 4) {
> - intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
> - data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
> + intel_de_write(i915, PRIMARY_SPI_ADDRESS, oprom_offset + count);
> + data = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
>
> if (data == *((const u32 *)"$VBT")) {
> found = oprom_offset + count;
> @@ -2981,9 +2982,9 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
> goto err_not_found;
>
> /* Get VBT size and allocate space for the VBT */
> - intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
> + intel_de_write(i915, PRIMARY_SPI_ADDRESS, found +
> offsetof(struct vbt_header, vbt_size));
> - vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
> + vbt_size = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
> vbt_size &= 0xffff;
>
> vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
> @@ -2991,8 +2992,8 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
> goto err_not_found;
>
> for (count = 0; count < vbt_size; count += 4) {
> - intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
> - data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
> + intel_de_write(i915, PRIMARY_SPI_ADDRESS, found + count);
> + data = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
> *(vbt + store++) = data;
> }
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de
2022-08-23 9:01 ` [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de Maarten Lankhorst
@ 2022-08-29 13:34 ` Jani Nikula
2022-08-29 13:42 ` Jani Nikula
2022-08-29 13:51 ` Ville Syrjälä
1 sibling, 1 reply; 18+ messages in thread
From: Jani Nikula @ 2022-08-29 13:34 UTC (permalink / raw)
To: Maarten Lankhorst, intel-gfx
On Tue, 23 Aug 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
Commit message!
I think this is doing a bit too much at once. The straightforward
conversions are fine I think, but adding new de helpers and using them
here along with everything else is a bit much.
BR,
Jani.
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bw.c | 8 ++--
> drivers/gpu/drm/i915/display/intel_crt.c | 33 +++++++------
> drivers/gpu/drm/i915/display/intel_de.h | 47 +++++++++++++++++++
> .../drm/i915/display/intel_display_power.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dmc.c | 6 +--
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 30 ++++++------
> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 9 ++--
> drivers/gpu/drm/i915/display/intel_fbc.c | 10 +---
> drivers/gpu/drm/i915/display/intel_gmbus.c | 42 ++++++++---------
> drivers/gpu/drm/i915/display/intel_hdcp.c | 6 +--
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
> 11 files changed, 118 insertions(+), 86 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 8ecf4e3e2bc6..1ca588e31dc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
> u32 dclk_ratio, dclk_reference;
> u32 val;
>
> - val = intel_uncore_read(&dev_priv->uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
> + val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
> dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
> if (val & DG1_QCLK_REFERENCE)
> dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
> @@ -50,18 +50,18 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
> dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
> sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 1000);
>
> - val = intel_uncore_read(&dev_priv->uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
> + val = intel_de_read(dev_priv, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
> if (val & DG1_GEAR_TYPE)
> sp->dclk *= 2;
>
> if (sp->dclk == 0)
> return -EINVAL;
>
> - val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
> + val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
> sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
> sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
>
> - val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
> + val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
> sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
> sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 6a3893c8ff22..5f64d1d600b7 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -679,7 +679,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> {
> struct drm_device *dev = crt->base.base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> - struct intel_uncore *uncore = &dev_priv->uncore;
> u32 save_bclrpat;
> u32 save_vtotal;
> u32 vtotal, vactive;
> @@ -700,9 +699,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> pipeconf_reg = PIPECONF(pipe);
> pipe_dsl_reg = PIPEDSL(pipe);
>
> - save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
> - save_vtotal = intel_uncore_read(uncore, vtotal_reg);
> - vblank = intel_uncore_read(uncore, vblank_reg);
> + save_bclrpat = intel_de_read(dev_priv, bclrpat_reg);
> + save_vtotal = intel_de_read(dev_priv, vtotal_reg);
> + vblank = intel_de_read(dev_priv, vblank_reg);
>
> vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
> vactive = (save_vtotal & 0x7ff) + 1;
> @@ -711,23 +710,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> vblank_end = ((vblank >> 16) & 0xfff) + 1;
>
> /* Set the border color to purple. */
> - intel_uncore_write(uncore, bclrpat_reg, 0x500050);
> + intel_de_write(dev_priv, bclrpat_reg, 0x500050);
>
> if (DISPLAY_VER(dev_priv) != 2) {
> - u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
> - intel_uncore_write(uncore,
> + u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
> + intel_de_write(dev_priv,
> pipeconf_reg,
> pipeconf | PIPECONF_FORCE_BORDER);
> - intel_uncore_posting_read(uncore, pipeconf_reg);
> + intel_de_posting_read(dev_priv, pipeconf_reg);
> /* Wait for next Vblank to substitue
> * border color for Color info */
> intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
> - st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
> + st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
> status = ((st00 & (1 << 4)) != 0) ?
> connector_status_connected :
> connector_status_disconnected;
>
> - intel_uncore_write(uncore, pipeconf_reg, pipeconf);
> + intel_de_write(dev_priv, pipeconf_reg, pipeconf);
> } else {
> bool restore_vblank = false;
> int count, detect;
> @@ -741,7 +740,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> u32 vsync_start = (vsync & 0xffff) + 1;
>
> vblank_start = vsync_start;
> - intel_uncore_write(uncore,
> + intel_de_write(dev_priv,
> vblank_reg,
> (vblank_start - 1) |
> ((vblank_end - 1) << 16));
> @@ -756,9 +755,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> /*
> * Wait for the border to be displayed
> */
> - while (intel_uncore_read(uncore, pipe_dsl_reg) >= vactive)
> + while (intel_de_read(dev_priv, pipe_dsl_reg) >= vactive)
> ;
> - while ((dsl = intel_uncore_read(uncore, pipe_dsl_reg)) <=
> + while ((dsl = intel_de_read(dev_priv, pipe_dsl_reg)) <=
> vsample)
> ;
> /*
> @@ -769,14 +768,14 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> do {
> count++;
> /* Read the ST00 VGA status register */
> - st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
> + st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
> if (st00 & (1 << 4))
> detect++;
> - } while ((intel_uncore_read(uncore, pipe_dsl_reg) == dsl));
> + } while ((intel_de_read(dev_priv, pipe_dsl_reg) == dsl));
>
> /* restore vblank if necessary */
> if (restore_vblank)
> - intel_uncore_write(uncore, vblank_reg, vblank);
> + intel_de_write(dev_priv, vblank_reg, vblank);
> /*
> * If more than 3/4 of the scanline detected a monitor,
> * then it is assumed to be present. This works even on i830,
> @@ -789,7 +788,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
> }
>
> /* Restore previous settings */
> - intel_uncore_write(uncore, bclrpat_reg, save_bclrpat);
> + intel_de_write(dev_priv, bclrpat_reg, save_bclrpat);
>
> return status;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
> index d51e83a45dce..648b8778f0dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -17,6 +17,12 @@ intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
> return intel_uncore_read(&i915->uncore, reg);
> }
>
> +static inline u8
> +intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
> +{
> + return intel_uncore_read8(&i915->uncore, reg);
> +}
> +
> static inline void
> intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
> {
> @@ -42,6 +48,23 @@ intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
> return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout);
> }
>
> +static inline int
> +intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg,
> + u32 mask, u32 value, unsigned int timeout)
> +{
> + return intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout);
> +}
> +
> +static inline int
> +__intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
> + u32 mask, u32 value,
> + unsigned int fast_timeout_us,
> + unsigned int slow_timeout_ms, u32 *out_value)
> +{
> + return __intel_wait_for_register(&i915->uncore, reg, mask, value,
> + fast_timeout_us, slow_timeout_ms, out_value);
> +}
> +
> static inline int
> intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg,
> u32 mask, unsigned int timeout)
> @@ -82,6 +105,30 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
> intel_uncore_write_fw(&i915->uncore, reg, val);
> }
>
> +static inline void
> +intel_de_write_samevalue(struct drm_i915_private *i915, i915_reg_t reg)
> +{
> + /*
> + * This is used by FBC to write the same value, protected against
> + * atomic commit using the uncore lock.
> + */
> + spin_lock_irq(&i915->uncore.lock);
> + intel_de_write_fw(i915, reg, intel_de_read_fw(i915, reg));
> + spin_unlock_irq(&i915->uncore.lock);
> +}
> +
> +static inline u32
> +intel_de_read_notrace(struct drm_i915_private *i915, i915_reg_t reg)
> +{
> + return intel_uncore_read_notrace(&i915->uncore, reg);
> +}
> +
> +static inline void
> +intel_de_write_notrace(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
> +{
> + intel_uncore_write_notrace(&i915->uncore, reg, val);
> +}
> +
> static inline int
> intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
> int fast_timeout_us, int slow_timeout_ms)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 3d2ac2c5b0d2..aff5c3ac3a36 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1660,7 +1660,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
> if (DISPLAY_VER(dev_priv) >= 12) {
> val = DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
> DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR;
> - intel_uncore_rmw(&dev_priv->uncore, GEN11_CHICKEN_DCPR_2, 0, val);
> + intel_de_rmw(dev_priv, GEN11_CHICKEN_DCPR_2, 0, val);
> }
>
> /* Wa_14011503030:xelpd */
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 6c35212c3625..da7b67c8a283 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -433,9 +433,9 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
>
> for (id = 0; id < DMC_FW_MAX; id++) {
> for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) {
> - intel_uncore_write_fw(&dev_priv->uncore,
> - DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),
> - dmc->dmc_info[id].payload[i]);
> + intel_de_write_fw(dev_priv,
> + DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),
> + dmc->dmc_info[id].payload[i]);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 2bc119374555..db5cc008f78f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -5,6 +5,7 @@
>
> #include "i915_drv.h"
> #include "i915_trace.h"
> +#include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_dp_aux.h"
> #include "intel_pps.h"
> @@ -41,7 +42,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
> u32 status;
> bool done;
>
> -#define C (((status = intel_uncore_read_notrace(&i915->uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
> +#define C (((status = intel_de_read_notrace(i915, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
> done = wait_event_timeout(i915->gmbus_wait_queue, C,
> msecs_to_jiffies_timeout(timeout_ms));
>
> @@ -182,7 +183,6 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> struct drm_i915_private *i915 =
> to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
> bool is_tc_port = intel_phy_is_tc(i915, phy);
> i915_reg_t ch_ctl, ch_data[5];
> @@ -226,7 +226,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>
> /* Try to wait for any previous AUX channel activity */
> for (try = 0; try < 3; try++) {
> - status = intel_uncore_read_notrace(uncore, ch_ctl);
> + status = intel_de_read_notrace(i915, ch_ctl);
> if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
> break;
> msleep(1);
> @@ -235,7 +235,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true);
>
> if (try == 3) {
> - const u32 status = intel_uncore_read(uncore, ch_ctl);
> + const u32 status = intel_de_read(i915, ch_ctl);
>
> if (status != intel_dp->aux_busy_last_status) {
> drm_WARN(&i915->drm, 1,
> @@ -265,23 +265,21 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> for (try = 0; try < 5; try++) {
> /* Load the send data into the aux channel data registers */
> for (i = 0; i < send_bytes; i += 4)
> - intel_uncore_write(uncore,
> - ch_data[i >> 2],
> - intel_dp_aux_pack(send + i,
> - send_bytes - i));
> + intel_de_write(i915, ch_data[i >> 2],
> + intel_dp_aux_pack(send + i,
> + send_bytes - i));
>
> /* Send the command and wait for it to complete */
> - intel_uncore_write(uncore, ch_ctl, send_ctl);
> + intel_de_write(i915, ch_ctl, send_ctl);
>
> status = intel_dp_aux_wait_done(intel_dp);
>
> /* Clear done status and any errors */
> - intel_uncore_write(uncore,
> - ch_ctl,
> - status |
> - DP_AUX_CH_CTL_DONE |
> - DP_AUX_CH_CTL_TIME_OUT_ERROR |
> - DP_AUX_CH_CTL_RECEIVE_ERROR);
> + intel_de_write(i915, ch_ctl,
> + status |
> + DP_AUX_CH_CTL_DONE |
> + DP_AUX_CH_CTL_TIME_OUT_ERROR |
> + DP_AUX_CH_CTL_RECEIVE_ERROR);
>
> /*
> * DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
> @@ -352,7 +350,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> recv_bytes = recv_size;
>
> for (i = 0; i < recv_bytes; i += 4)
> - intel_dp_aux_unpack(intel_uncore_read(uncore, ch_data[i >> 2]),
> + intel_dp_aux_unpack(intel_de_read(i915, ch_data[i >> 2]),
> recv + i, recv_bytes - i);
>
> ret = recv_bytes;
> diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> index cc6abe761f5e..220e5795482f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> @@ -400,11 +400,10 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
> * The flag should get set in 100us according to the HW team, but
> * use 1ms due to occasional timeouts observed with that.
> */
> - if (intel_wait_for_register_fw(&dev_priv->uncore,
> - BXT_PORT_CL1CM_DW0(phy),
> - PHY_RESERVED | PHY_POWER_GOOD,
> - PHY_POWER_GOOD,
> - 1))
> + if (intel_de_wait_for_register_fw(dev_priv,
> + BXT_PORT_CL1CM_DW0(phy),
> + PHY_RESERVED | PHY_POWER_GOOD,
> + PHY_POWER_GOOD, 1))
> drm_err(&dev_priv->drm, "timeout during PHY%d power on\n",
> phy);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 7436b35f7ea0..3b772ebf7e39 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -323,10 +323,7 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
> enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
> struct drm_i915_private *dev_priv = fbc->i915;
>
> - spin_lock_irq(&dev_priv->uncore.lock);
> - intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane),
> - intel_de_read_fw(dev_priv, DSPADDR(i9xx_plane)));
> - spin_unlock_irq(&dev_priv->uncore.lock);
> + intel_de_write_samevalue(dev_priv, DSPADDR(i9xx_plane));
> }
>
> static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
> @@ -359,10 +356,7 @@ static void i965_fbc_nuke(struct intel_fbc *fbc)
> enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
> struct drm_i915_private *dev_priv = fbc->i915;
>
> - spin_lock_irq(&dev_priv->uncore.lock);
> - intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
> - intel_de_read_fw(dev_priv, DSPSURF(i9xx_plane)));
> - spin_unlock_irq(&dev_priv->uncore.lock);
> + intel_de_write_samevalue(dev_priv, DSPSURF(i9xx_plane));
> }
>
> static const struct intel_fbc_funcs i965_fbc_funcs = {
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index a6ba7fb72339..cd8eedff97d9 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -219,12 +219,11 @@ static void bxt_gmbus_clock_gating(struct drm_i915_private *dev_priv,
> static u32 get_reserved(struct intel_gmbus *bus)
> {
> struct drm_i915_private *i915 = bus->dev_priv;
> - struct intel_uncore *uncore = &i915->uncore;
> u32 reserved = 0;
>
> /* On most chips, these bits must be preserved in software. */
> if (!IS_I830(i915) && !IS_I845G(i915))
> - reserved = intel_uncore_read_notrace(uncore, bus->gpio_reg) &
> + reserved = intel_de_read_notrace(i915, bus->gpio_reg) &
> (GPIO_DATA_PULLUP_DISABLE |
> GPIO_CLOCK_PULLUP_DISABLE);
>
> @@ -234,37 +233,36 @@ static u32 get_reserved(struct intel_gmbus *bus)
> static int get_clock(void *data)
> {
> struct intel_gmbus *bus = data;
> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
> + struct drm_i915_private *i915 = bus->dev_priv;
> u32 reserved = get_reserved(bus);
>
> - intel_uncore_write_notrace(uncore,
> + intel_de_write_notrace(i915,
> bus->gpio_reg,
> reserved | GPIO_CLOCK_DIR_MASK);
> - intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
> + intel_de_write_notrace(i915, bus->gpio_reg, reserved);
>
> - return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
> + return (intel_de_read_notrace(i915, bus->gpio_reg) &
> GPIO_CLOCK_VAL_IN) != 0;
> }
>
> static int get_data(void *data)
> {
> struct intel_gmbus *bus = data;
> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
> + struct drm_i915_private *i915 = bus->dev_priv;
> u32 reserved = get_reserved(bus);
>
> - intel_uncore_write_notrace(uncore,
> - bus->gpio_reg,
> - reserved | GPIO_DATA_DIR_MASK);
> - intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
> + intel_de_write_notrace(i915, bus->gpio_reg,
> + reserved | GPIO_DATA_DIR_MASK);
> + intel_de_write_notrace(i915, bus->gpio_reg, reserved);
>
> - return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
> + return (intel_de_read_notrace(i915, bus->gpio_reg) &
> GPIO_DATA_VAL_IN) != 0;
> }
>
> static void set_clock(void *data, int state_high)
> {
> struct intel_gmbus *bus = data;
> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
> + struct drm_i915_private *i915 = bus->dev_priv;
> u32 reserved = get_reserved(bus);
> u32 clock_bits;
>
> @@ -274,16 +272,15 @@ static void set_clock(void *data, int state_high)
> clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
> GPIO_CLOCK_VAL_MASK;
>
> - intel_uncore_write_notrace(uncore,
> - bus->gpio_reg,
> - reserved | clock_bits);
> - intel_uncore_posting_read(uncore, bus->gpio_reg);
> + intel_de_write_notrace(i915, bus->gpio_reg,
> + reserved | clock_bits);
> + intel_de_posting_read(i915, bus->gpio_reg);
> }
>
> static void set_data(void *data, int state_high)
> {
> struct intel_gmbus *bus = data;
> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
> + struct drm_i915_private *i915 = bus->dev_priv;
> u32 reserved = get_reserved(bus);
> u32 data_bits;
>
> @@ -293,8 +290,8 @@ static void set_data(void *data, int state_high)
> data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
> GPIO_DATA_VAL_MASK;
>
> - intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved | data_bits);
> - intel_uncore_posting_read(uncore, bus->gpio_reg);
> + intel_de_write_notrace(i915, bus->gpio_reg, reserved | data_bits);
> + intel_de_posting_read(i915, bus->gpio_reg);
> }
>
> static int
> @@ -403,9 +400,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
> add_wait_queue(&dev_priv->gmbus_wait_queue, &wait);
> intel_de_write_fw(dev_priv, GMBUS4, irq_enable);
>
> - ret = intel_wait_for_register_fw(&dev_priv->uncore,
> - GMBUS2, GMBUS_ACTIVE, 0,
> - 10);
> + ret = intel_de_wait_for_register_fw(dev_priv,
> + GMBUS2, GMBUS_ACTIVE, 0, 10);
>
> intel_de_write_fw(dev_priv, GMBUS4, 0);
> remove_wait_queue(&dev_priv->gmbus_wait_queue, &wait);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index f819b29906bd..691d6d9a6854 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -310,9 +310,9 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
> }
>
> /* Wait for the keys to load (500us) */
> - ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
> - HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
> - 10, 1, &val);
> + ret = __intel_de_wait_for_register(dev_priv, HDCP_KEY_STATUS,
> + HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
> + 10, 1, &val);
> if (ret)
> return ret;
> else if (!(val & HDCP_KEY_LOAD_STATUS))
> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> index 0bdbedc67d7d..ba6a6d607c93 100644
> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> @@ -53,8 +53,8 @@ void intel_snps_phy_update_psr_power_state(struct drm_i915_private *dev_priv,
>
> val = REG_FIELD_PREP(SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR,
> enable ? 2 : 3);
> - intel_uncore_rmw(&dev_priv->uncore, SNPS_PHY_TX_REQ(phy),
> - SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
> + intel_de_rmw(dev_priv, SNPS_PHY_TX_REQ(phy),
> + SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
> }
>
> void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
> @@ -668,7 +668,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
> */
>
> /* 5. Software sets DPLL_ENABLE [PLL Enable] to "1". */
> - intel_uncore_rmw(&dev_priv->uncore, enable_reg, 0, PLL_ENABLE);
> + intel_de_rmw(dev_priv, enable_reg, 0, PLL_ENABLE);
>
> /*
> * 9. Software sets SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "1". This
> @@ -713,14 +713,13 @@ void intel_mpllb_disable(struct intel_encoder *encoder)
> */
>
> /* 2. Software programs DPLL_ENABLE [PLL Enable] to "0" */
> - intel_uncore_rmw(&i915->uncore, enable_reg, PLL_ENABLE, 0);
> + intel_de_rmw(i915, enable_reg, PLL_ENABLE, 0);
>
> /*
> * 4. Software programs SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "0".
> * This will allow the PLL to stop running.
> */
> - intel_uncore_rmw(&i915->uncore, SNPS_PHY_MPLLB_DIV(phy),
> - SNPS_PHY_MPLLB_FORCE_EN, 0);
> + intel_de_rmw(i915, SNPS_PHY_MPLLB_DIV(phy), SNPS_PHY_MPLLB_FORCE_EN, 0);
>
> /*
> * 5. Software polls DPLL_ENABLE [PLL Lock] for PHY acknowledgment
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de
2022-08-23 9:01 ` [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de Maarten Lankhorst
@ 2022-08-29 13:38 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2022-08-29 13:38 UTC (permalink / raw)
To: Maarten Lankhorst, intel-gfx
On Tue, 23 Aug 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
> This will allow us not to use uncore from display code directly any more.
Mmh, a bit tedious but I guess this is what we'll need to do. See also
ee421bb4cb95 ("drm/i915/pcode: Extend pcode functions for multiple
gt's").
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
BR,
Jain.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 7 ++-
> drivers/gpu/drm/i915/display/intel_bw.c | 22 ++++-----
> drivers/gpu/drm/i915/display/intel_cdclk.c | 45 +++++++++----------
> drivers/gpu/drm/i915/display/intel_de.h | 30 +++++++++++++
> drivers/gpu/drm/i915/display/intel_display.c | 1 -
> .../drm/i915/display/intel_display_power.c | 3 +-
> .../i915/display/intel_display_power_well.c | 7 ++-
> drivers/gpu/drm/i915/display/intel_hdcp.c | 3 +-
> 8 files changed, 71 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 861dcd2eb890..ab0032b78d7f 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -8,7 +8,6 @@
> #include "i915_reg.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
> -#include "intel_pcode.h"
>
> static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
> {
> @@ -28,8 +27,8 @@ static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
>
> if (IS_BROADWELL(i915)) {
> drm_WARN_ON(&i915->drm,
> - snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL,
> - IPS_ENABLE | IPS_PCODE_CONTROL));
> + intel_de_pcode_write(i915, DISPLAY_IPS_CONTROL,
> + IPS_ENABLE | IPS_PCODE_CONTROL));
> /*
> * Quoting Art Runyan: "its not safe to expect any particular
> * value in IPS_CTL bit 31 after enabling IPS through the
> @@ -62,7 +61,7 @@ bool hsw_ips_disable(const struct intel_crtc_state *crtc_state)
>
> if (IS_BROADWELL(i915)) {
> drm_WARN_ON(&i915->drm,
> - snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL, 0));
> + intel_de_pcode_write(i915, DISPLAY_IPS_CONTROL, 0));
> /*
> * Wait for PCODE to finish disabling IPS. The BSpec specified
> * 42ms timeout value leads to occasional timeouts so use 100ms
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 79269d2c476b..8ecf4e3e2bc6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -10,9 +10,9 @@
> #include "intel_atomic.h"
> #include "intel_bw.h"
> #include "intel_cdclk.h"
> +#include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_mchbar_regs.h"
> -#include "intel_pcode.h"
> #include "intel_pm.h"
>
> /* Parameters for Qclk Geyserville (QGV) */
> @@ -78,9 +78,9 @@ static int icl_pcode_read_qgv_point_info(struct drm_i915_private *dev_priv,
> u16 dclk;
> int ret;
>
> - ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> - ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point),
> - &val, &val2);
> + ret = intel_de_pcode_read(dev_priv, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> + ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point),
> + &val, &val2);
> if (ret)
> return ret;
>
> @@ -104,8 +104,8 @@ static int adls_pcode_read_psf_gv_point_info(struct drm_i915_private *dev_priv,
> int ret;
> int i;
>
> - ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> - ADL_PCODE_MEM_SS_READ_PSF_GV_INFO, &val, NULL);
> + ret = intel_de_pcode_read(dev_priv, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> + ADL_PCODE_MEM_SS_READ_PSF_GV_INFO, &val, NULL);
> if (ret)
> return ret;
>
> @@ -123,11 +123,11 @@ int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv,
> int ret;
>
> /* bspec says to keep retrying for at least 1 ms */
> - ret = skl_pcode_request(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
> - points_mask,
> - ICL_PCODE_REP_QGV_MASK | ADLS_PCODE_REP_PSF_MASK,
> - ICL_PCODE_REP_QGV_SAFE | ADLS_PCODE_REP_PSF_SAFE,
> - 1);
> + ret = intel_de_pcode_request(dev_priv, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
> + points_mask,
> + ICL_PCODE_REP_QGV_MASK | ADLS_PCODE_REP_PSF_MASK,
> + ICL_PCODE_REP_QGV_SAFE | ADLS_PCODE_REP_PSF_SAFE,
> + 1);
>
> if (ret < 0) {
> drm_err(&dev_priv->drm, "Failed to disable qgv points (%d) points: 0x%x\n", ret, points_mask);
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 86a22c3766e5..15565406679c 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -34,7 +34,6 @@
> #include "intel_display_types.h"
> #include "intel_mchbar_regs.h"
> #include "intel_pci_config.h"
> -#include "intel_pcode.h"
> #include "intel_psr.h"
> #include "vlv_sideband.h"
>
> @@ -800,7 +799,7 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
> "trying to change cdclk frequency with cdclk not enabled\n"))
> return;
>
> - ret = snb_pcode_write(&dev_priv->uncore, BDW_PCODE_DISPLAY_FREQ_CHANGE_REQ, 0x0);
> + ret = intel_de_pcode_write(dev_priv, BDW_PCODE_DISPLAY_FREQ_CHANGE_REQ, 0x0);
> if (ret) {
> drm_err(&dev_priv->drm,
> "failed to inform pcode about cdclk change\n");
> @@ -828,8 +827,8 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
> LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
> drm_err(&dev_priv->drm, "Switching back to LCPLL failed\n");
>
> - snb_pcode_write(&dev_priv->uncore, HSW_PCODE_DE_WRITE_FREQ_REQ,
> - cdclk_config->voltage_level);
> + intel_de_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ,
> + cdclk_config->voltage_level);
>
> intel_de_write(dev_priv, CDCLK_FREQ,
> DIV_ROUND_CLOSEST(cdclk, 1000) - 1);
> @@ -1086,10 +1085,10 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
> drm_WARN_ON_ONCE(&dev_priv->drm,
> IS_SKYLAKE(dev_priv) && vco == 8640000);
>
> - ret = skl_pcode_request(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
> - SKL_CDCLK_PREPARE_FOR_CHANGE,
> - SKL_CDCLK_READY_FOR_CHANGE,
> - SKL_CDCLK_READY_FOR_CHANGE, 3);
> + ret = intel_de_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> + SKL_CDCLK_PREPARE_FOR_CHANGE,
> + SKL_CDCLK_READY_FOR_CHANGE,
> + SKL_CDCLK_READY_FOR_CHANGE, 3);
> if (ret) {
> drm_err(&dev_priv->drm,
> "Failed to inform PCU about cdclk change (%d)\n", ret);
> @@ -1132,8 +1131,8 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
> intel_de_posting_read(dev_priv, CDCLK_CTL);
>
> /* inform PCU of the change */
> - snb_pcode_write(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
> - cdclk_config->voltage_level);
> + intel_de_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> + cdclk_config->voltage_level);
>
> intel_update_cdclk(dev_priv);
> }
> @@ -1702,18 +1701,18 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
>
> /* Inform power controller of upcoming frequency change. */
> if (DISPLAY_VER(dev_priv) >= 11)
> - ret = skl_pcode_request(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
> - SKL_CDCLK_PREPARE_FOR_CHANGE,
> - SKL_CDCLK_READY_FOR_CHANGE,
> - SKL_CDCLK_READY_FOR_CHANGE, 3);
> + ret = intel_de_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> + SKL_CDCLK_PREPARE_FOR_CHANGE,
> + SKL_CDCLK_READY_FOR_CHANGE,
> + SKL_CDCLK_READY_FOR_CHANGE, 3);
> else
> /*
> * BSpec requires us to wait up to 150usec, but that leads to
> * timeouts; the 2ms used here is based on experiment.
> */
> - ret = snb_pcode_write_timeout(&dev_priv->uncore,
> - HSW_PCODE_DE_WRITE_FREQ_REQ,
> - 0x80000000, 150, 2);
> + ret = intel_de_pcode_write_timeout(dev_priv,
> + HSW_PCODE_DE_WRITE_FREQ_REQ,
> + 0x80000000, 150, 2);
> if (ret) {
> drm_err(&dev_priv->drm,
> "Failed to inform PCU about cdclk change (err %d, freq %d)\n",
> @@ -1774,8 +1773,8 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
>
> if (DISPLAY_VER(dev_priv) >= 11) {
> - ret = snb_pcode_write(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
> - cdclk_config->voltage_level);
> + ret = intel_de_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> + cdclk_config->voltage_level);
> } else {
> /*
> * The timeout isn't specified, the 2ms used here is based on
> @@ -1783,10 +1782,10 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> * FIXME: Waiting for the request completion could be delayed
> * until the next PCODE request based on BSpec.
> */
> - ret = snb_pcode_write_timeout(&dev_priv->uncore,
> - HSW_PCODE_DE_WRITE_FREQ_REQ,
> - cdclk_config->voltage_level,
> - 150, 2);
> + ret = intel_de_pcode_write_timeout(dev_priv,
> + HSW_PCODE_DE_WRITE_FREQ_REQ,
> + cdclk_config->voltage_level,
> + 150, 2);
> }
>
> if (ret) {
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
> index 9c104f65e4c8..d51e83a45dce 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -9,6 +9,7 @@
> #include "i915_drv.h"
> #include "i915_trace.h"
> #include "intel_uncore.h"
> +#include "intel_pcode.h"
>
> static inline u32
> intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
> @@ -81,4 +82,33 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
> intel_uncore_write_fw(&i915->uncore, reg, val);
> }
>
> +static inline int
> +intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
> + int fast_timeout_us, int slow_timeout_ms)
> +{
> + return snb_pcode_write_timeout(&i915->uncore, mbox, val,
> + fast_timeout_us, slow_timeout_ms);
> +}
> +
> +static inline int
> +intel_de_pcode_write(struct drm_i915_private *i915, u32 mbox, u32 val)
> +{
> +
> + return snb_pcode_write(&i915->uncore, mbox, val);
> +}
> +
> +static inline int
> +intel_de_pcode_read(struct drm_i915_private *i915, u32 mbox, u32 *val, u32 *val1)
> +{
> + return snb_pcode_read(&i915->uncore, mbox, val, val1);
> +}
> +
> +static inline int intel_de_pcode_request(struct drm_i915_private *i915, u32 mbox,
> + u32 request, u32 reply_mask, u32 reply,
> + int timeout_base_ms)
> +{
> + return skl_pcode_request(&i915->uncore, mbox, request, reply_mask, reply,
> + timeout_base_ms);
> +}
> +
> #endif /* __INTEL_DE_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 533fff79aeda..e8ddbfc1618e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -104,7 +104,6 @@
> #include "intel_panel.h"
> #include "intel_pch_display.h"
> #include "intel_pch_refclk.h"
> -#include "intel_pcode.h"
> #include "intel_pipe_crc.h"
> #include "intel_plane_initial.h"
> #include "intel_pm.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index f7e8d1ff62cf..3d2ac2c5b0d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -18,7 +18,6 @@
> #include "intel_dmc.h"
> #include "intel_mchbar_regs.h"
> #include "intel_pch_refclk.h"
> -#include "intel_pcode.h"
> #include "intel_pm.h"
> #include "intel_snps_phy.h"
> #include "vlv_sideband.h"
> @@ -1197,7 +1196,7 @@ static u32 hsw_read_dcomp(struct drm_i915_private *dev_priv)
> static void hsw_write_dcomp(struct drm_i915_private *dev_priv, u32 val)
> {
> if (IS_HASWELL(dev_priv)) {
> - if (snb_pcode_write(&dev_priv->uncore, GEN6_PCODE_WRITE_D_COMP, val))
> + if (intel_de_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val))
> drm_dbg_kms(&dev_priv->drm,
> "Failed to write to D_COMP\n");
> } else {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 7044016d4d98..eee50b954f83 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -16,7 +16,6 @@
> #include "intel_dpio_phy.h"
> #include "intel_dpll.h"
> #include "intel_hotplug.h"
> -#include "intel_pcode.h"
> #include "intel_pm.h"
> #include "intel_pps.h"
> #include "intel_tc.h"
> @@ -475,8 +474,8 @@ static void icl_tc_cold_exit(struct drm_i915_private *i915)
> int ret, tries = 0;
>
> while (1) {
> - ret = snb_pcode_write_timeout(&i915->uncore, ICL_PCODE_EXIT_TCCOLD, 0,
> - 250, 1);
> + ret = intel_de_pcode_write_timeout(i915, ICL_PCODE_EXIT_TCCOLD, 0,
> + 250, 1);
> if (ret != -EAGAIN || ++tries == 3)
> break;
> msleep(1);
> @@ -1740,7 +1739,7 @@ tgl_tc_cold_request(struct drm_i915_private *i915, bool block)
> * Spec states that we should timeout the request after 200us
> * but the function below will timeout after 500us
> */
> - ret = snb_pcode_read(&i915->uncore, TGL_PCODE_TCCOLD, &low_val, &high_val);
> + ret = intel_de_pcode_read(i915, TGL_PCODE_TCCOLD, &low_val, &high_val);
> if (ret == 0) {
> if (block &&
> (low_val & TGL_PCODE_EXIT_TCCOLD_DATA_L_EXIT_FAILED))
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index c5e9e86bb4cb..f819b29906bd 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -24,7 +24,6 @@
> #include "intel_display_types.h"
> #include "intel_hdcp.h"
> #include "intel_hdcp_regs.h"
> -#include "intel_pcode.h"
>
> #define KEY_LOAD_TRIES 5
> #define HDCP2_LC_RETRY_CNT 3
> @@ -299,7 +298,7 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
> * Mailbox interface.
> */
> if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv)) {
> - ret = snb_pcode_write(&dev_priv->uncore, SKL_PCODE_LOAD_HDCP_KEYS, 1);
> + ret = intel_de_pcode_write(dev_priv, SKL_PCODE_LOAD_HDCP_KEYS, 1);
> if (ret) {
> drm_err(&dev_priv->drm,
> "Failed to initiate HDCP key load (%d)\n",
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de
2022-08-29 13:34 ` Jani Nikula
@ 2022-08-29 13:42 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2022-08-29 13:42 UTC (permalink / raw)
To: Maarten Lankhorst, intel-gfx
On Mon, 29 Aug 2022, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Tue, 23 Aug 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
>
> Commit message!
>
> I think this is doing a bit too much at once. The straightforward
> conversions are fine I think, but adding new de helpers and using them
> here along with everything else is a bit much.
Also, nitpick, there were a bunch of places where the following lines
need to be reindented.
>
> BR,
> Jani.
>
>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_bw.c | 8 ++--
>> drivers/gpu/drm/i915/display/intel_crt.c | 33 +++++++------
>> drivers/gpu/drm/i915/display/intel_de.h | 47 +++++++++++++++++++
>> .../drm/i915/display/intel_display_power.c | 2 +-
>> drivers/gpu/drm/i915/display/intel_dmc.c | 6 +--
>> drivers/gpu/drm/i915/display/intel_dp_aux.c | 30 ++++++------
>> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 9 ++--
>> drivers/gpu/drm/i915/display/intel_fbc.c | 10 +---
>> drivers/gpu/drm/i915/display/intel_gmbus.c | 42 ++++++++---------
>> drivers/gpu/drm/i915/display/intel_hdcp.c | 6 +--
>> drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
>> 11 files changed, 118 insertions(+), 86 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
>> index 8ecf4e3e2bc6..1ca588e31dc9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bw.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
>> @@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
>> u32 dclk_ratio, dclk_reference;
>> u32 val;
>>
>> - val = intel_uncore_read(&dev_priv->uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
>> + val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
>> dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
>> if (val & DG1_QCLK_REFERENCE)
>> dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
>> @@ -50,18 +50,18 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
>> dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
>> sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 1000);
>>
>> - val = intel_uncore_read(&dev_priv->uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
>> + val = intel_de_read(dev_priv, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
>> if (val & DG1_GEAR_TYPE)
>> sp->dclk *= 2;
>>
>> if (sp->dclk == 0)
>> return -EINVAL;
>>
>> - val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
>> + val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
>> sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
>> sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
>>
>> - val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
>> + val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
>> sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
>> sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
>> index 6a3893c8ff22..5f64d1d600b7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_crt.c
>> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
>> @@ -679,7 +679,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> {
>> struct drm_device *dev = crt->base.base.dev;
>> struct drm_i915_private *dev_priv = to_i915(dev);
>> - struct intel_uncore *uncore = &dev_priv->uncore;
>> u32 save_bclrpat;
>> u32 save_vtotal;
>> u32 vtotal, vactive;
>> @@ -700,9 +699,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> pipeconf_reg = PIPECONF(pipe);
>> pipe_dsl_reg = PIPEDSL(pipe);
>>
>> - save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
>> - save_vtotal = intel_uncore_read(uncore, vtotal_reg);
>> - vblank = intel_uncore_read(uncore, vblank_reg);
>> + save_bclrpat = intel_de_read(dev_priv, bclrpat_reg);
>> + save_vtotal = intel_de_read(dev_priv, vtotal_reg);
>> + vblank = intel_de_read(dev_priv, vblank_reg);
>>
>> vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
>> vactive = (save_vtotal & 0x7ff) + 1;
>> @@ -711,23 +710,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> vblank_end = ((vblank >> 16) & 0xfff) + 1;
>>
>> /* Set the border color to purple. */
>> - intel_uncore_write(uncore, bclrpat_reg, 0x500050);
>> + intel_de_write(dev_priv, bclrpat_reg, 0x500050);
>>
>> if (DISPLAY_VER(dev_priv) != 2) {
>> - u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
>> - intel_uncore_write(uncore,
>> + u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
>> + intel_de_write(dev_priv,
>> pipeconf_reg,
>> pipeconf | PIPECONF_FORCE_BORDER);
>> - intel_uncore_posting_read(uncore, pipeconf_reg);
>> + intel_de_posting_read(dev_priv, pipeconf_reg);
>> /* Wait for next Vblank to substitue
>> * border color for Color info */
>> intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
>> - st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
>> + st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
>> status = ((st00 & (1 << 4)) != 0) ?
>> connector_status_connected :
>> connector_status_disconnected;
>>
>> - intel_uncore_write(uncore, pipeconf_reg, pipeconf);
>> + intel_de_write(dev_priv, pipeconf_reg, pipeconf);
>> } else {
>> bool restore_vblank = false;
>> int count, detect;
>> @@ -741,7 +740,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> u32 vsync_start = (vsync & 0xffff) + 1;
>>
>> vblank_start = vsync_start;
>> - intel_uncore_write(uncore,
>> + intel_de_write(dev_priv,
>> vblank_reg,
>> (vblank_start - 1) |
>> ((vblank_end - 1) << 16));
>> @@ -756,9 +755,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> /*
>> * Wait for the border to be displayed
>> */
>> - while (intel_uncore_read(uncore, pipe_dsl_reg) >= vactive)
>> + while (intel_de_read(dev_priv, pipe_dsl_reg) >= vactive)
>> ;
>> - while ((dsl = intel_uncore_read(uncore, pipe_dsl_reg)) <=
>> + while ((dsl = intel_de_read(dev_priv, pipe_dsl_reg)) <=
>> vsample)
>> ;
>> /*
>> @@ -769,14 +768,14 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> do {
>> count++;
>> /* Read the ST00 VGA status register */
>> - st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
>> + st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
>> if (st00 & (1 << 4))
>> detect++;
>> - } while ((intel_uncore_read(uncore, pipe_dsl_reg) == dsl));
>> + } while ((intel_de_read(dev_priv, pipe_dsl_reg) == dsl));
>>
>> /* restore vblank if necessary */
>> if (restore_vblank)
>> - intel_uncore_write(uncore, vblank_reg, vblank);
>> + intel_de_write(dev_priv, vblank_reg, vblank);
>> /*
>> * If more than 3/4 of the scanline detected a monitor,
>> * then it is assumed to be present. This works even on i830,
>> @@ -789,7 +788,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>> }
>>
>> /* Restore previous settings */
>> - intel_uncore_write(uncore, bclrpat_reg, save_bclrpat);
>> + intel_de_write(dev_priv, bclrpat_reg, save_bclrpat);
>>
>> return status;
>> }
>> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
>> index d51e83a45dce..648b8778f0dc 100644
>> --- a/drivers/gpu/drm/i915/display/intel_de.h
>> +++ b/drivers/gpu/drm/i915/display/intel_de.h
>> @@ -17,6 +17,12 @@ intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
>> return intel_uncore_read(&i915->uncore, reg);
>> }
>>
>> +static inline u8
>> +intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
>> +{
>> + return intel_uncore_read8(&i915->uncore, reg);
>> +}
>> +
>> static inline void
>> intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
>> {
>> @@ -42,6 +48,23 @@ intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
>> return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout);
>> }
>>
>> +static inline int
>> +intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg,
>> + u32 mask, u32 value, unsigned int timeout)
>> +{
>> + return intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout);
>> +}
>> +
>> +static inline int
>> +__intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
>> + u32 mask, u32 value,
>> + unsigned int fast_timeout_us,
>> + unsigned int slow_timeout_ms, u32 *out_value)
>> +{
>> + return __intel_wait_for_register(&i915->uncore, reg, mask, value,
>> + fast_timeout_us, slow_timeout_ms, out_value);
>> +}
>> +
>> static inline int
>> intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg,
>> u32 mask, unsigned int timeout)
>> @@ -82,6 +105,30 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
>> intel_uncore_write_fw(&i915->uncore, reg, val);
>> }
>>
>> +static inline void
>> +intel_de_write_samevalue(struct drm_i915_private *i915, i915_reg_t reg)
>> +{
>> + /*
>> + * This is used by FBC to write the same value, protected against
>> + * atomic commit using the uncore lock.
>> + */
>> + spin_lock_irq(&i915->uncore.lock);
>> + intel_de_write_fw(i915, reg, intel_de_read_fw(i915, reg));
>> + spin_unlock_irq(&i915->uncore.lock);
>> +}
>> +
>> +static inline u32
>> +intel_de_read_notrace(struct drm_i915_private *i915, i915_reg_t reg)
>> +{
>> + return intel_uncore_read_notrace(&i915->uncore, reg);
>> +}
>> +
>> +static inline void
>> +intel_de_write_notrace(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
>> +{
>> + intel_uncore_write_notrace(&i915->uncore, reg, val);
>> +}
>> +
>> static inline int
>> intel_de_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
>> int fast_timeout_us, int slow_timeout_ms)
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>> index 3d2ac2c5b0d2..aff5c3ac3a36 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>> @@ -1660,7 +1660,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
>> if (DISPLAY_VER(dev_priv) >= 12) {
>> val = DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
>> DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR;
>> - intel_uncore_rmw(&dev_priv->uncore, GEN11_CHICKEN_DCPR_2, 0, val);
>> + intel_de_rmw(dev_priv, GEN11_CHICKEN_DCPR_2, 0, val);
>> }
>>
>> /* Wa_14011503030:xelpd */
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> index 6c35212c3625..da7b67c8a283 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> @@ -433,9 +433,9 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
>>
>> for (id = 0; id < DMC_FW_MAX; id++) {
>> for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) {
>> - intel_uncore_write_fw(&dev_priv->uncore,
>> - DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),
>> - dmc->dmc_info[id].payload[i]);
>> + intel_de_write_fw(dev_priv,
>> + DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i),
>> + dmc->dmc_info[id].payload[i]);
>> }
>> }
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
>> index 2bc119374555..db5cc008f78f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
>> @@ -5,6 +5,7 @@
>>
>> #include "i915_drv.h"
>> #include "i915_trace.h"
>> +#include "intel_de.h"
>> #include "intel_display_types.h"
>> #include "intel_dp_aux.h"
>> #include "intel_pps.h"
>> @@ -41,7 +42,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
>> u32 status;
>> bool done;
>>
>> -#define C (((status = intel_uncore_read_notrace(&i915->uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
>> +#define C (((status = intel_de_read_notrace(i915, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
>> done = wait_event_timeout(i915->gmbus_wait_queue, C,
>> msecs_to_jiffies_timeout(timeout_ms));
>>
>> @@ -182,7 +183,6 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>> struct drm_i915_private *i915 =
>> to_i915(dig_port->base.base.dev);
>> - struct intel_uncore *uncore = &i915->uncore;
>> enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
>> bool is_tc_port = intel_phy_is_tc(i915, phy);
>> i915_reg_t ch_ctl, ch_data[5];
>> @@ -226,7 +226,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>>
>> /* Try to wait for any previous AUX channel activity */
>> for (try = 0; try < 3; try++) {
>> - status = intel_uncore_read_notrace(uncore, ch_ctl);
>> + status = intel_de_read_notrace(i915, ch_ctl);
>> if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
>> break;
>> msleep(1);
>> @@ -235,7 +235,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>> trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true);
>>
>> if (try == 3) {
>> - const u32 status = intel_uncore_read(uncore, ch_ctl);
>> + const u32 status = intel_de_read(i915, ch_ctl);
>>
>> if (status != intel_dp->aux_busy_last_status) {
>> drm_WARN(&i915->drm, 1,
>> @@ -265,23 +265,21 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>> for (try = 0; try < 5; try++) {
>> /* Load the send data into the aux channel data registers */
>> for (i = 0; i < send_bytes; i += 4)
>> - intel_uncore_write(uncore,
>> - ch_data[i >> 2],
>> - intel_dp_aux_pack(send + i,
>> - send_bytes - i));
>> + intel_de_write(i915, ch_data[i >> 2],
>> + intel_dp_aux_pack(send + i,
>> + send_bytes - i));
>>
>> /* Send the command and wait for it to complete */
>> - intel_uncore_write(uncore, ch_ctl, send_ctl);
>> + intel_de_write(i915, ch_ctl, send_ctl);
>>
>> status = intel_dp_aux_wait_done(intel_dp);
>>
>> /* Clear done status and any errors */
>> - intel_uncore_write(uncore,
>> - ch_ctl,
>> - status |
>> - DP_AUX_CH_CTL_DONE |
>> - DP_AUX_CH_CTL_TIME_OUT_ERROR |
>> - DP_AUX_CH_CTL_RECEIVE_ERROR);
>> + intel_de_write(i915, ch_ctl,
>> + status |
>> + DP_AUX_CH_CTL_DONE |
>> + DP_AUX_CH_CTL_TIME_OUT_ERROR |
>> + DP_AUX_CH_CTL_RECEIVE_ERROR);
>>
>> /*
>> * DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
>> @@ -352,7 +350,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>> recv_bytes = recv_size;
>>
>> for (i = 0; i < recv_bytes; i += 4)
>> - intel_dp_aux_unpack(intel_uncore_read(uncore, ch_data[i >> 2]),
>> + intel_dp_aux_unpack(intel_de_read(i915, ch_data[i >> 2]),
>> recv + i, recv_bytes - i);
>>
>> ret = recv_bytes;
>> diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
>> index cc6abe761f5e..220e5795482f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
>> @@ -400,11 +400,10 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
>> * The flag should get set in 100us according to the HW team, but
>> * use 1ms due to occasional timeouts observed with that.
>> */
>> - if (intel_wait_for_register_fw(&dev_priv->uncore,
>> - BXT_PORT_CL1CM_DW0(phy),
>> - PHY_RESERVED | PHY_POWER_GOOD,
>> - PHY_POWER_GOOD,
>> - 1))
>> + if (intel_de_wait_for_register_fw(dev_priv,
>> + BXT_PORT_CL1CM_DW0(phy),
>> + PHY_RESERVED | PHY_POWER_GOOD,
>> + PHY_POWER_GOOD, 1))
>> drm_err(&dev_priv->drm, "timeout during PHY%d power on\n",
>> phy);
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
>> index 7436b35f7ea0..3b772ebf7e39 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
>> @@ -323,10 +323,7 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
>> enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
>> struct drm_i915_private *dev_priv = fbc->i915;
>>
>> - spin_lock_irq(&dev_priv->uncore.lock);
>> - intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane),
>> - intel_de_read_fw(dev_priv, DSPADDR(i9xx_plane)));
>> - spin_unlock_irq(&dev_priv->uncore.lock);
>> + intel_de_write_samevalue(dev_priv, DSPADDR(i9xx_plane));
>> }
>>
>> static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
>> @@ -359,10 +356,7 @@ static void i965_fbc_nuke(struct intel_fbc *fbc)
>> enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
>> struct drm_i915_private *dev_priv = fbc->i915;
>>
>> - spin_lock_irq(&dev_priv->uncore.lock);
>> - intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
>> - intel_de_read_fw(dev_priv, DSPSURF(i9xx_plane)));
>> - spin_unlock_irq(&dev_priv->uncore.lock);
>> + intel_de_write_samevalue(dev_priv, DSPSURF(i9xx_plane));
>> }
>>
>> static const struct intel_fbc_funcs i965_fbc_funcs = {
>> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> index a6ba7fb72339..cd8eedff97d9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
>> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> @@ -219,12 +219,11 @@ static void bxt_gmbus_clock_gating(struct drm_i915_private *dev_priv,
>> static u32 get_reserved(struct intel_gmbus *bus)
>> {
>> struct drm_i915_private *i915 = bus->dev_priv;
>> - struct intel_uncore *uncore = &i915->uncore;
>> u32 reserved = 0;
>>
>> /* On most chips, these bits must be preserved in software. */
>> if (!IS_I830(i915) && !IS_I845G(i915))
>> - reserved = intel_uncore_read_notrace(uncore, bus->gpio_reg) &
>> + reserved = intel_de_read_notrace(i915, bus->gpio_reg) &
>> (GPIO_DATA_PULLUP_DISABLE |
>> GPIO_CLOCK_PULLUP_DISABLE);
>>
>> @@ -234,37 +233,36 @@ static u32 get_reserved(struct intel_gmbus *bus)
>> static int get_clock(void *data)
>> {
>> struct intel_gmbus *bus = data;
>> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
>> + struct drm_i915_private *i915 = bus->dev_priv;
>> u32 reserved = get_reserved(bus);
>>
>> - intel_uncore_write_notrace(uncore,
>> + intel_de_write_notrace(i915,
>> bus->gpio_reg,
>> reserved | GPIO_CLOCK_DIR_MASK);
>> - intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
>> + intel_de_write_notrace(i915, bus->gpio_reg, reserved);
>>
>> - return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
>> + return (intel_de_read_notrace(i915, bus->gpio_reg) &
>> GPIO_CLOCK_VAL_IN) != 0;
>> }
>>
>> static int get_data(void *data)
>> {
>> struct intel_gmbus *bus = data;
>> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
>> + struct drm_i915_private *i915 = bus->dev_priv;
>> u32 reserved = get_reserved(bus);
>>
>> - intel_uncore_write_notrace(uncore,
>> - bus->gpio_reg,
>> - reserved | GPIO_DATA_DIR_MASK);
>> - intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
>> + intel_de_write_notrace(i915, bus->gpio_reg,
>> + reserved | GPIO_DATA_DIR_MASK);
>> + intel_de_write_notrace(i915, bus->gpio_reg, reserved);
>>
>> - return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
>> + return (intel_de_read_notrace(i915, bus->gpio_reg) &
>> GPIO_DATA_VAL_IN) != 0;
>> }
>>
>> static void set_clock(void *data, int state_high)
>> {
>> struct intel_gmbus *bus = data;
>> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
>> + struct drm_i915_private *i915 = bus->dev_priv;
>> u32 reserved = get_reserved(bus);
>> u32 clock_bits;
>>
>> @@ -274,16 +272,15 @@ static void set_clock(void *data, int state_high)
>> clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
>> GPIO_CLOCK_VAL_MASK;
>>
>> - intel_uncore_write_notrace(uncore,
>> - bus->gpio_reg,
>> - reserved | clock_bits);
>> - intel_uncore_posting_read(uncore, bus->gpio_reg);
>> + intel_de_write_notrace(i915, bus->gpio_reg,
>> + reserved | clock_bits);
>> + intel_de_posting_read(i915, bus->gpio_reg);
>> }
>>
>> static void set_data(void *data, int state_high)
>> {
>> struct intel_gmbus *bus = data;
>> - struct intel_uncore *uncore = &bus->dev_priv->uncore;
>> + struct drm_i915_private *i915 = bus->dev_priv;
>> u32 reserved = get_reserved(bus);
>> u32 data_bits;
>>
>> @@ -293,8 +290,8 @@ static void set_data(void *data, int state_high)
>> data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
>> GPIO_DATA_VAL_MASK;
>>
>> - intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved | data_bits);
>> - intel_uncore_posting_read(uncore, bus->gpio_reg);
>> + intel_de_write_notrace(i915, bus->gpio_reg, reserved | data_bits);
>> + intel_de_posting_read(i915, bus->gpio_reg);
>> }
>>
>> static int
>> @@ -403,9 +400,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
>> add_wait_queue(&dev_priv->gmbus_wait_queue, &wait);
>> intel_de_write_fw(dev_priv, GMBUS4, irq_enable);
>>
>> - ret = intel_wait_for_register_fw(&dev_priv->uncore,
>> - GMBUS2, GMBUS_ACTIVE, 0,
>> - 10);
>> + ret = intel_de_wait_for_register_fw(dev_priv,
>> + GMBUS2, GMBUS_ACTIVE, 0, 10);
>>
>> intel_de_write_fw(dev_priv, GMBUS4, 0);
>> remove_wait_queue(&dev_priv->gmbus_wait_queue, &wait);
>> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
>> index f819b29906bd..691d6d9a6854 100644
>> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
>> @@ -310,9 +310,9 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
>> }
>>
>> /* Wait for the keys to load (500us) */
>> - ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
>> - HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
>> - 10, 1, &val);
>> + ret = __intel_de_wait_for_register(dev_priv, HDCP_KEY_STATUS,
>> + HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
>> + 10, 1, &val);
>> if (ret)
>> return ret;
>> else if (!(val & HDCP_KEY_LOAD_STATUS))
>> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> index 0bdbedc67d7d..ba6a6d607c93 100644
>> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> @@ -53,8 +53,8 @@ void intel_snps_phy_update_psr_power_state(struct drm_i915_private *dev_priv,
>>
>> val = REG_FIELD_PREP(SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR,
>> enable ? 2 : 3);
>> - intel_uncore_rmw(&dev_priv->uncore, SNPS_PHY_TX_REQ(phy),
>> - SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
>> + intel_de_rmw(dev_priv, SNPS_PHY_TX_REQ(phy),
>> + SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
>> }
>>
>> void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
>> @@ -668,7 +668,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
>> */
>>
>> /* 5. Software sets DPLL_ENABLE [PLL Enable] to "1". */
>> - intel_uncore_rmw(&dev_priv->uncore, enable_reg, 0, PLL_ENABLE);
>> + intel_de_rmw(dev_priv, enable_reg, 0, PLL_ENABLE);
>>
>> /*
>> * 9. Software sets SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "1". This
>> @@ -713,14 +713,13 @@ void intel_mpllb_disable(struct intel_encoder *encoder)
>> */
>>
>> /* 2. Software programs DPLL_ENABLE [PLL Enable] to "0" */
>> - intel_uncore_rmw(&i915->uncore, enable_reg, PLL_ENABLE, 0);
>> + intel_de_rmw(i915, enable_reg, PLL_ENABLE, 0);
>>
>> /*
>> * 4. Software programs SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "0".
>> * This will allow the PLL to stop running.
>> */
>> - intel_uncore_rmw(&i915->uncore, SNPS_PHY_MPLLB_DIV(phy),
>> - SNPS_PHY_MPLLB_FORCE_EN, 0);
>> + intel_de_rmw(i915, SNPS_PHY_MPLLB_DIV(phy), SNPS_PHY_MPLLB_FORCE_EN, 0);
>>
>> /*
>> * 5. Software polls DPLL_ENABLE [PLL Lock] for PHY acknowledgment
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de
2022-08-23 9:01 ` [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de Maarten Lankhorst
2022-08-29 13:34 ` Jani Nikula
@ 2022-08-29 13:51 ` Ville Syrjälä
1 sibling, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2022-08-29 13:51 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
On Tue, Aug 23, 2022 at 11:01:28AM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bw.c | 8 ++--
> drivers/gpu/drm/i915/display/intel_crt.c | 33 +++++++------
> drivers/gpu/drm/i915/display/intel_de.h | 47 +++++++++++++++++++
> .../drm/i915/display/intel_display_power.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dmc.c | 6 +--
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 30 ++++++------
> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 9 ++--
> drivers/gpu/drm/i915/display/intel_fbc.c | 10 +---
> drivers/gpu/drm/i915/display/intel_gmbus.c | 42 ++++++++---------
> drivers/gpu/drm/i915/display/intel_hdcp.c | 6 +--
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
> 11 files changed, 118 insertions(+), 86 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 8ecf4e3e2bc6..1ca588e31dc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv,
> u32 dclk_ratio, dclk_reference;
> u32 val;
>
> - val = intel_uncore_read(&dev_priv->uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
> + val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
Surely these aren't display engine registers? If we start (ab)using
intel_de_*() for everything we may end up in a bigger mess for the
upcoming forcewake thing...
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2022-08-29 13:51 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-08-23 9:01 [Intel-gfx] [PATCH 0/4] drm/i915: Remove references to uncore from display Maarten Lankhorst
2022-08-23 9:01 ` [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de Maarten Lankhorst
2022-08-29 13:38 ` Jani Nikula
2022-08-23 9:01 ` [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c Maarten Lankhorst
2022-08-29 13:29 ` Jani Nikula
2022-08-23 9:01 ` [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c Maarten Lankhorst
2022-08-29 13:30 ` Jani Nikula
2022-08-23 9:01 ` [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de Maarten Lankhorst
2022-08-29 13:34 ` Jani Nikula
2022-08-29 13:42 ` Jani Nikula
2022-08-29 13:51 ` Ville Syrjälä
2022-08-23 10:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de Patchwork
2022-08-23 10:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-08-23 10:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-08-24 7:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de (rev2) Patchwork
2022-08-24 7:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-08-24 7:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-08-25 9:06 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove references to uncore from display. (rev2) Patchwork
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