Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/selftests: Flush interrupts before disabling tasklets
Date: Thu, 24 Oct 2019 10:21:14 +0300	[thread overview]
Message-ID: <875zke8v85.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20191023232443.17450-1-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> When setting up the system to perform the atomic reset, we need to
> serialise with any ongoing interrupt tasklet or else:
>
> <0> [472.951428] i915_sel-4442    0d..1 466527056us : __i915_request_submit: rcs0 fence 11659:2, current 0
> <0> [472.951554] i915_sel-4442    0d..1 466527059us : __execlists_submission_tasklet: rcs0: queue_priority_hint:-2147483648, submit:yes
> <0> [472.951681] i915_sel-4442    0d..1 466527061us : trace_ports: rcs0: submit { 11659:2, 0:0 }
> <0> [472.951805] i915_sel-4442    0.... 466527114us : __igt_atomic_reset_engine: i915_reset_engine(rcs0:active) under hardirq
> <0> [472.951932] i915_sel-4442    0d... 466527115us : intel_engine_reset: rcs0 flags=11d
> <0> [472.952056] i915_sel-4442    0d... 466527117us : execlists_reset_prepare: rcs0: depth<-1
> <0> [472.952179] i915_sel-4442    0d... 466527119us : intel_engine_stop_cs: rcs0
> <0> [472.952305]   <idle>-0       1..s1 466527119us : process_csb: rcs0 cs-irq head=3, tail=4

Racing and this shows from old world?
-Mika

> <0> [472.952431] i915_sel-4442    0d... 466527122us : __intel_gt_reset: engine_mask=1
> <0> [472.952557]   <idle>-0       1..s1 466527124us : process_csb: rcs0 csb[4]: status=0x00000001:0x00000000
> <0> [472.952683]   <idle>-0       1..s1 466527130us : trace_ports: rcs0: promote { 11659:2*, 0:0 }
> <0> [472.952808] i915_sel-4442    0d... 466527131us : execlists_reset: rcs0
> <0> [472.952933] i915_sel-4442    0d..1 466527133us : process_csb: rcs0 cs-irq head=3, tail=4
> <0> [472.953059] i915_sel-4442    0d..1 466527134us : process_csb: rcs0 csb[4]: status=0x00000001:0x00000000
> <0> [472.953185] i915_sel-4442    0d..1 466527136us : trace_ports: rcs0: preempted { 11659:2*, 0:0 }
> <0> [472.953310] i915_sel-4442    0d..1 466527150us : assert_pending_valid: Nothing pending for promotion!
> <0> [472.953436] i915_sel-4442    0d..1 466527158us : process_csb: process_csb:1930 GEM_BUG_ON(!assert_pending_valid(execlists, "promote"))
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112069
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
G>  drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +-
>  drivers/gpu/drm/i915/gt/selftest_reset.c     | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> index b892b47348ab..ba761fcf397b 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> @@ -1563,7 +1563,7 @@ static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
>  	GEM_TRACE("i915_reset_engine(%s:%s) under %s\n",
>  		  engine->name, mode, p->name);
>  
> -	tasklet_disable_nosync(t);
> +	tasklet_disable(t);
>  	p->critical_section_begin();
>  
>  	err = intel_engine_reset(engine, NULL);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
> index 6efb9221b7fa..6ad6aca315f6 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
> @@ -126,7 +126,7 @@ static int igt_atomic_engine_reset(void *arg)
>  		goto out_unlock;
>  
>  	for_each_engine(engine, gt, id) {
> -		tasklet_disable_nosync(&engine->execlists.tasklet);
> +		tasklet_disable(&engine->execlists.tasklet);
>  		intel_engine_pm_get(engine);
>  
>  		for (p = igt_atomic_phases; p->name; p++) {
> -- 
> 2.24.0.rc0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/selftests: Flush interrupts before disabling tasklets
Date: Thu, 24 Oct 2019 10:21:14 +0300	[thread overview]
Message-ID: <875zke8v85.fsf@gaia.fi.intel.com> (raw)
Message-ID: <20191024072114.NCB3zw9x-uH8-CLZE3tX5ehc-VXnUpnZHiIyoWUAqO0@z> (raw)
In-Reply-To: <20191023232443.17450-1-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> When setting up the system to perform the atomic reset, we need to
> serialise with any ongoing interrupt tasklet or else:
>
> <0> [472.951428] i915_sel-4442    0d..1 466527056us : __i915_request_submit: rcs0 fence 11659:2, current 0
> <0> [472.951554] i915_sel-4442    0d..1 466527059us : __execlists_submission_tasklet: rcs0: queue_priority_hint:-2147483648, submit:yes
> <0> [472.951681] i915_sel-4442    0d..1 466527061us : trace_ports: rcs0: submit { 11659:2, 0:0 }
> <0> [472.951805] i915_sel-4442    0.... 466527114us : __igt_atomic_reset_engine: i915_reset_engine(rcs0:active) under hardirq
> <0> [472.951932] i915_sel-4442    0d... 466527115us : intel_engine_reset: rcs0 flags=11d
> <0> [472.952056] i915_sel-4442    0d... 466527117us : execlists_reset_prepare: rcs0: depth<-1
> <0> [472.952179] i915_sel-4442    0d... 466527119us : intel_engine_stop_cs: rcs0
> <0> [472.952305]   <idle>-0       1..s1 466527119us : process_csb: rcs0 cs-irq head=3, tail=4

Racing and this shows from old world?
-Mika

> <0> [472.952431] i915_sel-4442    0d... 466527122us : __intel_gt_reset: engine_mask=1
> <0> [472.952557]   <idle>-0       1..s1 466527124us : process_csb: rcs0 csb[4]: status=0x00000001:0x00000000
> <0> [472.952683]   <idle>-0       1..s1 466527130us : trace_ports: rcs0: promote { 11659:2*, 0:0 }
> <0> [472.952808] i915_sel-4442    0d... 466527131us : execlists_reset: rcs0
> <0> [472.952933] i915_sel-4442    0d..1 466527133us : process_csb: rcs0 cs-irq head=3, tail=4
> <0> [472.953059] i915_sel-4442    0d..1 466527134us : process_csb: rcs0 csb[4]: status=0x00000001:0x00000000
> <0> [472.953185] i915_sel-4442    0d..1 466527136us : trace_ports: rcs0: preempted { 11659:2*, 0:0 }
> <0> [472.953310] i915_sel-4442    0d..1 466527150us : assert_pending_valid: Nothing pending for promotion!
> <0> [472.953436] i915_sel-4442    0d..1 466527158us : process_csb: process_csb:1930 GEM_BUG_ON(!assert_pending_valid(execlists, "promote"))
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112069
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
G>  drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +-
>  drivers/gpu/drm/i915/gt/selftest_reset.c     | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> index b892b47348ab..ba761fcf397b 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> @@ -1563,7 +1563,7 @@ static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
>  	GEM_TRACE("i915_reset_engine(%s:%s) under %s\n",
>  		  engine->name, mode, p->name);
>  
> -	tasklet_disable_nosync(t);
> +	tasklet_disable(t);
>  	p->critical_section_begin();
>  
>  	err = intel_engine_reset(engine, NULL);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
> index 6efb9221b7fa..6ad6aca315f6 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
> @@ -126,7 +126,7 @@ static int igt_atomic_engine_reset(void *arg)
>  		goto out_unlock;
>  
>  	for_each_engine(engine, gt, id) {
> -		tasklet_disable_nosync(&engine->execlists.tasklet);
> +		tasklet_disable(&engine->execlists.tasklet);
>  		intel_engine_pm_get(engine);
>  
>  		for (p = igt_atomic_phases; p->name; p++) {
> -- 
> 2.24.0.rc0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-10-24  7:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-23 23:24 [PATCH] drm/i915/selftests: Flush interrupts before disabling tasklets Chris Wilson
2019-10-23 23:24 ` [Intel-gfx] " Chris Wilson
2019-10-24  2:27 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-10-24  2:27   ` [Intel-gfx] " Patchwork
2019-10-24  2:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-24  2:55   ` [Intel-gfx] " Patchwork
2019-10-24  7:21 ` Mika Kuoppala [this message]
2019-10-24  7:21   ` [Intel-gfx] [PATCH] " Mika Kuoppala
2019-10-24  7:28   ` Chris Wilson
2019-10-24  7:28     ` [Intel-gfx] " Chris Wilson
2019-10-24  8:06     ` Mika Kuoppala
2019-10-24  8:06       ` [Intel-gfx] " Mika Kuoppala
2019-10-24  8:17       ` Chris Wilson
2019-10-24  8:17         ` [Intel-gfx] " Chris Wilson
2019-10-25  1:42 ` ✗ Fi.CI.IGT: failure for " Patchwork
2019-10-25  1:42   ` [Intel-gfx] " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=875zke8v85.fsf@gaia.fi.intel.com \
    --to=mika.kuoppala@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox