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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>, <andi.shyti@kernel.org>
Subject: Re: [PATCH] drm/i915: Fix conversion between clock ticks and nanoseconds
Date: Thu, 16 Oct 2025 13:07:17 -0700	[thread overview]
Message-ID: <87bjm6ipai.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20251016000350.1152382-2-umesh.nerlige.ramappa@intel.com>

On Wed, 15 Oct 2025 17:03:51 -0700, Umesh Nerlige Ramappa wrote:
>
> When tick values are large, the multiplication by NSEC_PER_SEC is larger
> than 64 bits and results in bad conversions.
>
> The issue is seen in PMU busyness counters that look like they have
> wrapped around due to bad conversion. i915 PMU implementation returns
> monotonically increasing counters. If a count is lesser than previous
> one, it will only return the larger value until the smaller value
> catches up. The user will see this as zero delta between two
> measurements even though the engines are busy.
>
> Fix it by using mul_u64_u32_div()

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14955
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> v2:
> - Fix divide by zero for Gen11 (Andi)
> - Update commit message
>
> v3:
> - Drop GCD and use mul_u64_u32_div() instead (Ashutosh)
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
> index 88b147fa5cb1..c90b35881a26 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
> @@ -205,7 +205,7 @@ static u64 div_u64_roundup(u64 nom, u32 den)
>
>  u64 intel_gt_clock_interval_to_ns(const struct intel_gt *gt, u64 count)
>  {
> -	return div_u64_roundup(count * NSEC_PER_SEC, gt->clock_frequency);
> +	return mul_u64_u32_div(count, NSEC_PER_SEC, gt->clock_frequency);
>  }
>
>  u64 intel_gt_pm_interval_to_ns(const struct intel_gt *gt, u64 count)
> @@ -215,7 +215,7 @@ u64 intel_gt_pm_interval_to_ns(const struct intel_gt *gt, u64 count)
>
>  u64 intel_gt_ns_to_clock_interval(const struct intel_gt *gt, u64 ns)
>  {
> -	return div_u64_roundup(gt->clock_frequency * ns, NSEC_PER_SEC);
> +	return mul_u64_u32_div(ns, gt->clock_frequency, NSEC_PER_SEC);
>  }
>
>  u64 intel_gt_ns_to_pm_interval(const struct intel_gt *gt, u64 ns)
> --
> 2.43.0
>

  parent reply	other threads:[~2025-10-16 20:07 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16  0:03 [PATCH] drm/i915: Fix conversion between clock ticks and nanoseconds Umesh Nerlige Ramappa
2025-10-16  1:17 ` ✓ i915.CI.BAT: success for drm/i915: Fix conversion between clock ticks and nanoseconds (rev3) Patchwork
2025-10-16 10:18 ` ✓ i915.CI.Full: " Patchwork
2025-10-16 20:07 ` Dixit, Ashutosh [this message]
2025-10-16 23:36   ` [PATCH] drm/i915: Fix conversion between clock ticks and nanoseconds Umesh Nerlige Ramappa
2025-10-17  2:01     ` Rodrigo Vivi
2025-10-29 11:33 ` Tvrtko Ursulin
2025-10-29 22:01   ` Umesh Nerlige Ramappa
2025-10-31  8:40     ` Tvrtko Ursulin
2025-11-05 19:38       ` Rodrigo Vivi
  -- strict thread matches above, loose matches on Subject: below --
2025-10-09 19:16 Umesh Nerlige Ramappa
2025-10-07 23:35 Umesh Nerlige Ramappa
2025-10-09 12:24 ` Andi Shyti
2025-10-10 17:45   ` Umesh Nerlige Ramappa
2025-10-14  8:58     ` Andi Shyti
2025-10-14  1:19 ` Dixit, Ashutosh
2025-10-14 20:31   ` Umesh Nerlige Ramappa
2025-10-14 21:43     ` Dixit, Ashutosh

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