* [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence
@ 2019-06-14 6:09 Lee, Shawn C
2019-06-14 5:50 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Lee, Shawn C @ 2019-06-14 6:09 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Lee, Jani Nikula
Modify aux backlight enable/disable sequence just like what we
did for genernal eDP panel.
1. Setup PWM freq and brightness level before enable display backlight.
2. Set PWM to 0 after backlight enable was off.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
index 7ded95a334db..98210ae17285 100644
--- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
@@ -216,13 +216,14 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
}
}
- set_aux_backlight_enable(intel_dp, true);
intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level);
+ set_aux_backlight_enable(intel_dp, true);
}
static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state)
{
set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder), false);
+ intel_dp_aux_set_backlight(old_conn_state, 0);
}
static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread* ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence 2019-06-14 6:09 [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Lee, Shawn C @ 2019-06-14 5:50 ` Patchwork 2019-06-14 6:09 ` [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control Lee, Shawn C ` (3 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-06-14 5:50 UTC (permalink / raw) To: Lee, Shawn C; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence URL : https://patchwork.freedesktop.org/series/62081/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Refine eDP aux backlight enable/disable sequence Okay! Commit: drm/i915: Add backlight enable on/off delay for DP aux backlight control +drivers/gpu/drm/i915/i915_utils.h:220:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:220:16: warning: expression using sizeof(void) _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control 2019-06-14 6:09 [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Lee, Shawn C 2019-06-14 5:50 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork @ 2019-06-14 6:09 ` Lee, Shawn C 2019-06-14 8:09 ` Jani Nikula 2019-06-14 18:09 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Patchwork ` (2 subsequent siblings) 4 siblings, 1 reply; 9+ messages in thread From: Lee, Shawn C @ 2019-06-14 6:09 UTC (permalink / raw) To: intel-gfx; +Cc: Cooper Chiou, Lee, Jani Nikula Follow generla eDP backlight enable control sequence. Add T8 (valid video data to backlight enable) delay before turn backlight_enable on. And T9 (backlight disable to end of valida video data) delay after backlight_enable off. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Jose Roberto de Souza <jose.souza@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com> --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index 98210ae17285..b008e887f4e9 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -217,12 +217,25 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st } intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level); + + wait_remaining_ms_from_jiffies(intel_dp->last_power_on, + intel_dp->backlight_on_delay); + set_aux_backlight_enable(intel_dp, true); } static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state) { + struct intel_connector *connector = to_intel_connector(old_conn_state->connector); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + + intel_dp->last_backlight_off = jiffies; + set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder), false); + + wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, + intel_dp->backlight_off_delay); + intel_dp_aux_set_backlight(old_conn_state, 0); } -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control 2019-06-14 6:09 ` [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control Lee, Shawn C @ 2019-06-14 8:09 ` Jani Nikula 2019-06-14 8:38 ` Lee, Shawn C 0 siblings, 1 reply; 9+ messages in thread From: Jani Nikula @ 2019-06-14 8:09 UTC (permalink / raw) To: Lee, Shawn C, intel-gfx; +Cc: Cooper Chiou, Lee On Thu, 13 Jun 2019, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote: > Follow generla eDP backlight enable control sequence. Add T8 (valid video > data to backlight enable) delay before turn backlight_enable on. > And T9 (backlight disable to end of valida video data) delay after > backlight_enable off. There are two things that are wrong here: First, you're adding *two* waits on the DP AUX backlight enable and disable paths. IIUC there is no reason to wait between setting the level and enabling here. The waits have already been done on intel_dp.c level. Second, the last_power_on, backlight_on_delay, last_backlight_off, and backlight_off_delay members of intel_dp should all be private to intel_dp.c. Indeed these waits even have wrappers *within* intel_dp.c so that only very specific functions in intel_dp.c ever look at these members. This is a huge red flag. What's the problem you're trying to solve? Does this fix something *actual* that you're seeing? BR, Jani. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Jose Roberto de Souza <jose.souza@intel.com> > Cc: Cooper Chiou <cooper.chiou@intel.com> > > Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com> > --- > drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > index 98210ae17285..b008e887f4e9 100644 > --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > @@ -217,12 +217,25 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st > } > > intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level); > + > + wait_remaining_ms_from_jiffies(intel_dp->last_power_on, > + intel_dp->backlight_on_delay); > + > set_aux_backlight_enable(intel_dp, true); > } > > static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state) > { > + struct intel_connector *connector = to_intel_connector(old_conn_state->connector); > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + > + intel_dp->last_backlight_off = jiffies; > + > set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder), false); > + > + wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, > + intel_dp->backlight_off_delay); > + > intel_dp_aux_set_backlight(old_conn_state, 0); > } -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control 2019-06-14 8:09 ` Jani Nikula @ 2019-06-14 8:38 ` Lee, Shawn C 0 siblings, 0 replies; 9+ messages in thread From: Lee, Shawn C @ 2019-06-14 8:38 UTC (permalink / raw) To: Nikula, Jani, intel-gfx@lists.freedesktop.org; +Cc: Chiou, Cooper On Fri, 14 Jun 2019, Jani Nikula <jani.nikula@intel.com> wrote: >On Thu, 13 Jun 2019, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote: >> Follow generla eDP backlight enable control sequence. Add T8 (valid >> video data to backlight enable) delay before turn backlight_enable on. >> And T9 (backlight disable to end of valida video data) delay after >> backlight_enable off. > >There are two things that are wrong here: > >First, you're adding *two* waits on the DP AUX backlight enable and disable paths. IIUC there is no reason to wait between setting the level and enabling here. The waits have already been done on intel_dp.c level. > >Second, the last_power_on, backlight_on_delay, last_backlight_off, and backlight_off_delay members of intel_dp should all be private to intel_dp.c. Indeed these waits even have wrappers *within* intel_dp.c so that only very specific functions in intel_dp.c ever look at these members. This is a huge red flag. > >What's the problem you're trying to solve? Does this fix something >*actual* that you're seeing? > >BR, >Jani. This change will call on/off delay twice. It is a mistake. I check the driver again. To use the original on/off delay in _intel_edp_backlight_on() and _intel_edp_backlight_off() are enough. And we should bypass backlight_enable on/off control by soc if aux backlight control active. Right? One more question about the off flow. In this case, backlight_enable will be off at backlight.disable() function. But wait delay was executed at _intel_edp_backlight_off() before backlight.disable(). We are trying to enable a panel with DP aux backlight control. The modification in patch #1 to correct the sequence and make it works. But seems we should modify the delay time to fit panel's spec just like what we did for general eDP panel. Best regards, Shawn > >> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Cc: Jani Nikula <jani.nikula@intel.com> >> Cc: Jose Roberto de Souza <jose.souza@intel.com> >> Cc: Cooper Chiou <cooper.chiou@intel.com> >> >> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com> >> --- >> drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c >> b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c >> index 98210ae17285..b008e887f4e9 100644 >> --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c >> +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c >> @@ -217,12 +217,25 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st >> } >> >> intel_dp_aux_set_backlight(conn_state, >> connector->panel.backlight.level); >> + >> + wait_remaining_ms_from_jiffies(intel_dp->last_power_on, >> + intel_dp->backlight_on_delay); >> + >> set_aux_backlight_enable(intel_dp, true); } >> >> static void intel_dp_aux_disable_backlight(const struct >> drm_connector_state *old_conn_state) { >> + struct intel_connector *connector = to_intel_connector(old_conn_state->connector); >> + struct intel_dp *intel_dp = >> +enc_to_intel_dp(&connector->encoder->base); >> + >> + intel_dp->last_backlight_off = jiffies; >> + >> >> set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder) >> , false); >> + >> + wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, >> + intel_dp->backlight_off_delay); >> + >> intel_dp_aux_set_backlight(old_conn_state, 0); } > >-- >Jani Nikula, Intel Open Source Graphics Center > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence 2019-06-14 6:09 [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Lee, Shawn C 2019-06-14 5:50 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork 2019-06-14 6:09 ` [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control Lee, Shawn C @ 2019-06-14 18:09 ` Patchwork 2019-06-15 10:59 ` ✓ Fi.CI.IGT: " Patchwork 2019-06-21 3:02 ` [PATCH v2] " Lee Shawn C 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-06-14 18:09 UTC (permalink / raw) To: Lee, Shawn C; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence URL : https://patchwork.freedesktop.org/series/62081/ State : success == Summary == CI Bug Log - changes from CI_DRM_6265 -> Patchwork_13281 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/ Known issues ------------ Here are the changes found in Patchwork_13281 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-bsw-kefka: [PASS][1] -> [FAIL][2] ([fdo#100368]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-bsw-kefka/igt@kms_flip@basic-flip-vs-wf_vblank.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/fi-bsw-kefka/igt@kms_flip@basic-flip-vs-wf_vblank.html #### Possible fixes #### * igt@i915_selftest@live_hangcheck: - fi-icl-y: [DMESG-FAIL][3] ([fdo#110917]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-icl-y/igt@i915_selftest@live_hangcheck.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/fi-icl-y/igt@i915_selftest@live_hangcheck.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][5] ([fdo#109485]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u2: [FAIL][7] ([fdo#103167]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html * igt@vgem_basic@unload: - fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-icl-u3/igt@vgem_basic@unload.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/fi-icl-u3/igt@vgem_basic@unload.html [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 [fdo#110917]: https://bugs.freedesktop.org/show_bug.cgi?id=110917 Participating hosts (53 -> 46) ------------------------------ Additional (1): fi-byt-j1900 Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-dsi fi-bdw-samus Build changes ------------- * Linux: CI_DRM_6265 -> Patchwork_13281 CI_DRM_6265: 657b9f601946cab518d8911ea92dc0f437a1f4b4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5055: 495287320225e7f180d384cad7b207b77154438f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13281: 5e5823df5be2eeddcadf01996d3f7e7d65c77ef0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5e5823df5be2 drm/i915: Add backlight enable on/off delay for DP aux backlight control 80f54069be26 drm/i915: Refine eDP aux backlight enable/disable sequence == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence 2019-06-14 6:09 [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Lee, Shawn C ` (2 preceding siblings ...) 2019-06-14 18:09 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Patchwork @ 2019-06-15 10:59 ` Patchwork 2019-06-21 3:02 ` [PATCH v2] " Lee Shawn C 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-06-15 10:59 UTC (permalink / raw) To: Lee, Shawn C; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence URL : https://patchwork.freedesktop.org/series/62081/ State : success == Summary == CI Bug Log - changes from CI_DRM_6265_full -> Patchwork_13281_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_13281_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_eio@in-flight-internal-immediate: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#110913 ]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl7/igt@gem_eio@in-flight-internal-immediate.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl2/igt@gem_eio@in-flight-internal-immediate.html * igt@gem_eio@wait-wedge-1us: - shard-iclb: [PASS][3] -> [DMESG-WARN][4] ([fdo#110913 ]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb1/igt@gem_eio@wait-wedge-1us.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb5/igt@gem_eio@wait-wedge-1us.html - shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([fdo#110913 ]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl3/igt@gem_eio@wait-wedge-1us.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-kbl2/igt@gem_eio@wait-wedge-1us.html * igt@gem_mmap_gtt@hang: - shard-snb: ([PASS][7], [PASS][8]) -> [INCOMPLETE][9] ([fdo#105411]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb6/igt@gem_mmap_gtt@hang.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb2/igt@gem_mmap_gtt@hang.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-snb6/igt@gem_mmap_gtt@hang.html * igt@gem_persistent_relocs@forked-interruptible-thrashing: - shard-skl: ([PASS][10], [PASS][11]) -> [DMESG-WARN][12] ([fdo#110913 ]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-skl4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html * igt@gem_persistent_relocs@forked-thrashing: - shard-hsw: ([PASS][13], [PASS][14]) -> [DMESG-WARN][15] ([fdo#110789] / [fdo#110913 ]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw6/igt@gem_persistent_relocs@forked-thrashing.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@gem_persistent_relocs@forked-thrashing.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw4/igt@gem_persistent_relocs@forked-thrashing.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy: - shard-apl: ([PASS][16], [PASS][17]) -> [DMESG-WARN][18] ([fdo#110913 ]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl3/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html * igt@i915_selftest@mock_fence: - shard-iclb: [PASS][19] -> [INCOMPLETE][20] ([fdo#107713]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb5/igt@i915_selftest@mock_fence.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb1/igt@i915_selftest@mock_fence.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: ([PASS][21], [PASS][22]) -> [DMESG-WARN][23] ([fdo#108566]) +3 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl5/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-glk: ([PASS][24], [PASS][25]) -> [FAIL][26] ([fdo#104873]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled: - shard-skl: ([PASS][27], [PASS][28]) -> [FAIL][29] ([fdo#103184] / [fdo#103232]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl5/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-kbl: ([PASS][30], [PASS][31]) -> [DMESG-WARN][32] ([fdo#108566]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt: - shard-hsw: [PASS][33] -> [SKIP][34] ([fdo#109271]) +2 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move: - shard-hsw: ([PASS][35], [PASS][36]) -> [SKIP][37] ([fdo#109271]) +7 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render: - shard-iclb: [PASS][38] -> [FAIL][39] ([fdo#103167]) +2 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render.html * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: - shard-skl: ([PASS][40], [PASS][41]) -> [FAIL][42] ([fdo#103166]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl5/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl4/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-skl2/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [PASS][43] -> [SKIP][44] ([fdo#109441]) +2 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html #### Possible fixes #### * igt@gem_eio@in-flight-10ms: - shard-skl: ([PASS][45], [DMESG-WARN][46]) ([fdo#110913 ]) -> [PASS][47] +3 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl9/igt@gem_eio@in-flight-10ms.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl7/igt@gem_eio@in-flight-10ms.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-skl10/igt@gem_eio@in-flight-10ms.html * igt@gem_eio@reset-stress: - shard-snb: ([PASS][48], [FAIL][49]) ([fdo#109661]) -> [PASS][50] [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb4/igt@gem_eio@reset-stress.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb7/igt@gem_eio@reset-stress.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-snb1/igt@gem_eio@reset-stress.html * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive: - shard-apl: ([INCOMPLETE][51], [PASS][52]) ([fdo#103927]) -> [PASS][53] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl3/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl6/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl1/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing: - shard-iclb: [DMESG-WARN][54] ([fdo#110913 ]) -> [PASS][55] [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb5/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html * igt@gem_tiled_swapping@non-threaded: - shard-apl: ([DMESG-WARN][56], [PASS][57]) ([fdo#108686]) -> [PASS][58] [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl3/igt@gem_tiled_swapping@non-threaded.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl1/igt@gem_tiled_swapping@non-threaded.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl5/igt@gem_tiled_swapping@non-threaded.html * igt@gem_userptr_blits@map-fixed-invalidate-busy: - shard-snb: ([DMESG-WARN][59], [DMESG-WARN][60]) ([fdo#110913 ]) -> [PASS][61] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-busy.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup: - shard-apl: ([PASS][62], [DMESG-WARN][63]) ([fdo#110913 ]) -> [PASS][64] +3 similar issues [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html - shard-kbl: [DMESG-WARN][65] ([fdo#110913 ]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl3/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-kbl2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html - shard-hsw: ([DMESG-WARN][67], [PASS][68]) ([fdo#110913 ]) -> [PASS][69] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html - shard-snb: ([DMESG-WARN][70], [PASS][71]) ([fdo#110913 ]) -> [PASS][72] [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html * igt@gem_userptr_blits@sync-unmap-cycles: - shard-kbl: ([DMESG-WARN][73], [PASS][74]) ([fdo#110913 ]) -> [PASS][75] +2 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl4/igt@gem_userptr_blits@sync-unmap-cycles.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@gem_userptr_blits@sync-unmap-cycles.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-kbl4/igt@gem_userptr_blits@sync-unmap-cycles.html - shard-apl: ([DMESG-WARN][76], [DMESG-WARN][77]) ([fdo#110913 ]) -> [PASS][78] [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl4/igt@gem_userptr_blits@sync-unmap-cycles.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl2/igt@gem_userptr_blits@sync-unmap-cycles.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl3/igt@gem_userptr_blits@sync-unmap-cycles.html - shard-glk: ([DMESG-WARN][79], [PASS][80]) ([fdo#110913 ]) -> [PASS][81] +2 similar issues [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk8/igt@gem_userptr_blits@sync-unmap-cycles.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk2/igt@gem_userptr_blits@sync-unmap-cycles.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-glk9/igt@gem_userptr_blits@sync-unmap-cycles.html * igt@kms_big_fb@x-tiled-32bpp-rotate-180: - shard-snb: ([PASS][82], [SKIP][83]) ([fdo#109271]) -> [PASS][84] [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb7/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb4/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-snb5/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: ([DMESG-WARN][85], [PASS][86]) ([fdo#108566]) -> [PASS][87] [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-apl: [DMESG-WARN][88] ([fdo#108566]) -> [PASS][89] [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl5/igt@kms_cursor_crc@pipe-b-cursor-suspend.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-apl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html * igt@kms_cursor_legacy@cursor-vs-flip-varying-size: - shard-hsw: ([FAIL][90], [PASS][91]) ([fdo#103355]) -> [PASS][92] [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw8/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw2/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html * igt@kms_flip@2x-flip-vs-suspend: - shard-hsw: [SKIP][93] ([fdo#109271]) -> [PASS][94] +5 similar issues [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw1/igt@kms_flip@2x-flip-vs-suspend.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw7/igt@kms_flip@2x-flip-vs-suspend.html * igt@kms_flip@2x-plain-flip: - shard-hsw: ([PASS][95], [SKIP][96]) ([fdo#109271]) -> [PASS][97] +35 similar issues [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw7/igt@kms_flip@2x-plain-flip.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw1/igt@kms_flip@2x-plain-flip.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-hsw6/igt@kms_flip@2x-plain-flip.html * igt@kms_frontbuffer_tracking@fbc-badstride: - shard-iclb: [FAIL][98] ([fdo#103167]) -> [PASS][99] +8 similar issues [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-badstride.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-badstride.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-skl: ([INCOMPLETE][100], [PASS][101]) ([fdo#104108]) -> [PASS][102] [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl8/igt@kms_frontbuffer_tracking@fbc-suspend.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl2/igt@kms_frontbuffer_tracking@fbc-suspend.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-skl9/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: ([FAIL][103], [FAIL][104]) ([fdo#108145] / [fdo#110403]) -> [PASS][105] +1 similar issue [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [SKIP][106] ([fdo#109642]) -> [PASS][107] [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb7/igt@kms_psr2_su@frontbuffer.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb2/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@psr2_primary_mmap_gtt: - shard-iclb: [SKIP][108] ([fdo#109441]) -> [PASS][109] [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb7/igt@kms_psr@psr2_primary_mmap_gtt.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html #### Warnings #### * igt@gem_eio@in-flight-suspend: - shard-kbl: ([INCOMPLETE][110], [PASS][111]) ([fdo#103665]) -> [INCOMPLETE][112] ([fdo#103665]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl6/igt@gem_eio@in-flight-suspend.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@gem_eio@in-flight-suspend.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/shard-kbl6/igt@gem_eio@in-flight-suspend.html * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing: - shard-glk: ([DMESG-WARN][113], [PASS][114]) ([fdo#110913 ]) -> [DMESG-WARN][115] ([fdo#110913 ]) +2 similar issues [113]: https://intel-gfx-ci.01 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13281/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2] drm/i915: Refine eDP aux backlight enable/disable sequence 2019-06-14 6:09 [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Lee, Shawn C ` (3 preceding siblings ...) 2019-06-15 10:59 ` ✓ Fi.CI.IGT: " Patchwork @ 2019-06-21 3:02 ` Lee Shawn C 2019-06-21 2:53 ` Lee, Shawn C 4 siblings, 1 reply; 9+ messages in thread From: Lee Shawn C @ 2019-06-21 3:02 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, Cooper Chiou Modify aux backlight enable/disable sequence just like what we did for genernal eDP panel. 1. Setup PWM freq and brightness level before enable display backlight. 2. Set PWM to 0 after backlight enable was off. v2: Code structure was changed. Modify this patch to align the latest. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Jose Roberto de Souza <jose.souza@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 6b0b73479fb8..bbc579734238 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -216,13 +216,14 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st } } - set_aux_backlight_enable(intel_dp, true); intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level); + set_aux_backlight_enable(intel_dp, true); } static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state) { set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder), false); + intel_dp_aux_set_backlight(old_conn_state, 0); } static int intel_dp_aux_setup_backlight(struct intel_connector *connector, -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2] drm/i915: Refine eDP aux backlight enable/disable sequence 2019-06-21 3:02 ` [PATCH v2] " Lee Shawn C @ 2019-06-21 2:53 ` Lee, Shawn C 0 siblings, 0 replies; 9+ messages in thread From: Lee, Shawn C @ 2019-06-21 2:53 UTC (permalink / raw) To: intel-gfx@lists.freedesktop.org; +Cc: Nikula, Jani, Chiou, Cooper On Fri, 21 Jun 2019, Lee Shawn C <shawn.c.lee@intel.com> wrote: > >Modify aux backlight enable/disable sequence just like what we did for genernal eDP panel. >1. Setup PWM freq and brightness level before enable display backlight. >2. Set PWM to 0 after backlight enable was off. > >v2: Code structure was changed. Modify this patch to align the latest. > >Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >Cc: Jani Nikula <jani.nikula@intel.com> >Cc: Jose Roberto de Souza <jose.souza@intel.com> >Cc: Cooper Chiou <cooper.chiou@intel.com> > >Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> >--- > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c >index 6b0b73479fb8..bbc579734238 100644 >--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c >+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c >@@ -216,13 +216,14 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st > } > } > >- set_aux_backlight_enable(intel_dp, true); > intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level); >+ set_aux_backlight_enable(intel_dp, true); > } > > static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state) { > set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder), false); >+ intel_dp_aux_set_backlight(old_conn_state, 0); > } > > static int intel_dp_aux_setup_backlight(struct intel_connector *connector, >-- >2.7.4 > Please ignore this series change. I will push a new one instead of this series. Because of we don't need the change from patch #2 that applied unnecessary delay. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-06-21 2:53 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-06-14 6:09 [PATCH 1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Lee, Shawn C 2019-06-14 5:50 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork 2019-06-14 6:09 ` [PATCH 2/2] drm/i915: Add backlight enable on/off delay for DP aux backlight control Lee, Shawn C 2019-06-14 8:09 ` Jani Nikula 2019-06-14 8:38 ` Lee, Shawn C 2019-06-14 18:09 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Refine eDP aux backlight enable/disable sequence Patchwork 2019-06-15 10:59 ` ✓ Fi.CI.IGT: " Patchwork 2019-06-21 3:02 ` [PATCH v2] " Lee Shawn C 2019-06-21 2:53 ` Lee, Shawn C
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