[Intel-gfx] [PATCH 1/3] drm/i915: Assert requests within a context are submitted in order

[Intel-gfx] [PATCH 1/3] drm/i915: Assert requests within a context are submitted in order

[Chris Wilson]

Check the flow of requests into the hardware to verify that are
submitted in order along their timeline.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++++
 drivers/gpu/drm/i915/i915_request.c | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 16a023ac4604..13941d1c0a4a 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1622,6 +1622,7 @@ static bool can_merge_rq(const struct i915_request *prev,
 	if (!can_merge_ctx(prev->context, next->context))
 		return false;
 
+	GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno, next->fence.seqno));
 	return true;
 }
 
@@ -2142,6 +2143,9 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 				GEM_BUG_ON(last &&
 					   !can_merge_ctx(last->context,
 							  rq->context));
+				GEM_BUG_ON(last &&
+					   i915_seqno_passed(last->fence.seqno,
+							     rq->fence.seqno));
 
 				submit = true;
 				last = rq;
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index ca5361eb1f0b..35147df79655 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -737,6 +737,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
 	RCU_INIT_POINTER(rq->timeline, tl);
 	RCU_INIT_POINTER(rq->hwsp_cacheline, tl->hwsp_cacheline);
 	rq->hwsp_seqno = tl->hwsp_seqno;
+	GEM_BUG_ON(i915_request_completed(rq));
 
 	rq->rcustate = get_state_synchronize_rcu(); /* acts as smp_mb() */
 
@@ -1284,6 +1285,9 @@ __i915_request_add_to_timeline(struct i915_request *rq)
 	prev = to_request(__i915_active_fence_set(&timeline->last_request,
 						  &rq->fence));
 	if (prev && !i915_request_completed(prev)) {
+		GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno,
+					     rq->fence.seqno));
+
 		if (is_power_of_2(prev->engine->mask | rq->engine->mask))
 			i915_sw_fence_await_sw_fence(&rq->submit,
 						     &prev->submit,
-- 
2.25.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 2/3] drm/i915: Always propagate the invocation to i915_schedule

[Chris Wilson]

We only call i915_schedule() when we know we have changed the priority
on a request and so require to propagate any change in priority to its
signalers (for PI). By unconditionally checking all of our signalers, we
avoid skipping changes made prior to construction of the request (as the
request may be waited upon before submission when used in parallel).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_scheduler.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
index be770f2419b1..52f71e83e088 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -227,10 +227,10 @@ static void kick_submission(struct intel_engine_cs *engine,
 static void __i915_schedule(struct i915_sched_node *node,
 			    const struct i915_sched_attr *attr)
 {
+	const int prio = max(attr->priority, node->attr.priority);
 	struct intel_engine_cs *engine;
 	struct i915_dependency *dep, *p;
 	struct i915_dependency stack;
-	const int prio = attr->priority;
 	struct sched_cache cache;
 	LIST_HEAD(dfs);
 
@@ -238,9 +238,6 @@ static void __i915_schedule(struct i915_sched_node *node,
 	lockdep_assert_held(&schedule_lock);
 	GEM_BUG_ON(prio == I915_PRIORITY_INVALID);
 
-	if (prio <= READ_ONCE(node->attr.priority))
-		return;
-
 	if (node_signaled(node))
 		return;
 
-- 
2.25.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Always propagate the invocation to i915_schedule

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> We only call i915_schedule() when we know we have changed the priority
> on a request and so require to propagate any change in priority to its
> signalers (for PI). By unconditionally checking all of our signalers, we
> avoid skipping changes made prior to construction of the request (as the
> request may be waited upon before submission when used in parallel).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_scheduler.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
> index be770f2419b1..52f71e83e088 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler.c
> +++ b/drivers/gpu/drm/i915/i915_scheduler.c
> @@ -227,10 +227,10 @@ static void kick_submission(struct intel_engine_cs *engine,
>  static void __i915_schedule(struct i915_sched_node *node,
>  			    const struct i915_sched_attr *attr)
>  {
> +	const int prio = max(attr->priority, node->attr.priority);
>  	struct intel_engine_cs *engine;
>  	struct i915_dependency *dep, *p;
>  	struct i915_dependency stack;
> -	const int prio = attr->priority;
>  	struct sched_cache cache;
>  	LIST_HEAD(dfs);
>  
> @@ -238,9 +238,6 @@ static void __i915_schedule(struct i915_sched_node *node,
>  	lockdep_assert_held(&schedule_lock);
>  	GEM_BUG_ON(prio == I915_PRIORITY_INVALID);
>  
> -	if (prio <= READ_ONCE(node->attr.priority))
> -		return;
> -
>  	if (node_signaled(node))
>  		return;
>  
> -- 
> 2.25.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 3/3] drm/i915/gem: Limit struct_mutex to eb_reserve

[Chris Wilson]

We only need to serialise the multiple pinning during the eb_reserve
phase. Ideally this would be using the vm->mutex as an outer lock, or
using a composite global mutex (ww_mutex), but at the moment we are
using struct_mutex for the group.

Fixes: 003d8b9143a6 ("drm/i915/gem: Only call eb_lookup_vma once during execbuf ioctl")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 51 ++++++++-----------
 drivers/gpu/drm/i915/i915_drv.h               |  6 ---
 2 files changed, 20 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 7bb27f382af7..faa5b5c99a9a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -610,7 +610,7 @@ static int eb_reserve(struct i915_execbuffer *eb)
 	struct list_head last;
 	struct eb_vma *ev;
 	unsigned int i, pass;
-	int err;
+	int err = 0;
 
 	/*
 	 * Attempt to pin all of the buffers into the GTT.
@@ -626,8 +626,10 @@ static int eb_reserve(struct i915_execbuffer *eb)
 	 * room for the earlier objects *unless* we need to defragment.
 	 */
 
+	if (mutex_lock_interruptible(&eb->i915->drm.struct_mutex))
+		return -EINTR;
+
 	pass = 0;
-	err = 0;
 	do {
 		list_for_each_entry(ev, &eb->unbound, bind_link) {
 			err = eb_reserve_vma(eb, ev, pin_flags);
@@ -635,7 +637,7 @@ static int eb_reserve(struct i915_execbuffer *eb)
 				break;
 		}
 		if (!(err == -ENOSPC || err == -EAGAIN))
-			return err;
+			break;
 
 		/* Resort *all* the objects into priority order */
 		INIT_LIST_HEAD(&eb->unbound);
@@ -666,7 +668,9 @@ static int eb_reserve(struct i915_execbuffer *eb)
 		list_splice_tail(&last, &eb->unbound);
 
 		if (err == -EAGAIN) {
+			mutex_unlock(&eb->i915->drm.struct_mutex);
 			flush_workqueue(eb->i915->mm.userptr_wq);
+			mutex_lock(&eb->i915->drm.struct_mutex);
 			continue;
 		}
 
@@ -680,15 +684,20 @@ static int eb_reserve(struct i915_execbuffer *eb)
 			err = i915_gem_evict_vm(eb->context->vm);
 			mutex_unlock(&eb->context->vm->mutex);
 			if (err)
-				return err;
+				goto unlock;
 			break;
 
 		default:
-			return -ENOSPC;
+			err = -ENOSPC;
+			goto unlock;
 		}
 
 		pin_flags = PIN_USER;
 	} while (1);
+
+unlock:
+	mutex_unlock(&eb->i915->drm.struct_mutex);
+	return err;
 }
 
 static unsigned int eb_batch_index(const struct i915_execbuffer *eb)
@@ -1631,7 +1640,6 @@ static int eb_prefault_relocations(const struct i915_execbuffer *eb)
 
 static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
 {
-	struct drm_device *dev = &eb->i915->drm;
 	bool have_copy = false;
 	struct eb_vma *ev;
 	int err = 0;
@@ -1642,8 +1650,6 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
 		goto out;
 	}
 
-	mutex_unlock(&dev->struct_mutex);
-
 	/*
 	 * We take 3 passes through the slowpatch.
 	 *
@@ -1666,21 +1672,8 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
 		cond_resched();
 		err = 0;
 	}
-	if (err) {
-		mutex_lock(&dev->struct_mutex);
-		goto out;
-	}
-
-	/* A frequent cause for EAGAIN are currently unavailable client pages */
-	flush_workqueue(eb->i915->mm.userptr_wq);
-
-	err = i915_mutex_lock_interruptible(dev);
-	if (err) {
-		mutex_lock(&dev->struct_mutex);
+	if (err)
 		goto out;
-	}
-
-	GEM_BUG_ON(!eb->batch);
 
 	list_for_each_entry(ev, &eb->relocs, reloc_link) {
 		if (!have_copy) {
@@ -1738,9 +1731,11 @@ static int eb_relocate(struct i915_execbuffer *eb)
 	if (err)
 		return err;
 
-	err = eb_reserve(eb);
-	if (err)
-		return err;
+	if (!list_empty(&eb->unbound)) {
+		err = eb_reserve(eb);
+		if (err)
+			return err;
+	}
 
 	/* The objects are in their final locations, apply the relocations. */
 	if (eb->args->flags & __EXEC_HAS_RELOC) {
@@ -2690,10 +2685,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	if (unlikely(err))
 		goto err_context;
 
-	err = i915_mutex_lock_interruptible(dev);
-	if (err)
-		goto err_engine;
-
 	err = eb_relocate(&eb);
 	if (err) {
 		/*
@@ -2837,8 +2828,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 		eb_release_vmas(&eb);
 	if (eb.trampoline)
 		i915_vma_unpin(eb.trampoline);
-	mutex_unlock(&dev->struct_mutex);
-err_engine:
 	eb_unpin_engine(&eb);
 err_context:
 	i915_gem_context_put(eb.gem_context);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 123d0fadfafc..c081f4ec87df 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1734,12 +1734,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
 
 void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
 
-static inline int __must_check
-i915_mutex_lock_interruptible(struct drm_device *dev)
-{
-	return mutex_lock_interruptible(&dev->struct_mutex);
-}
-
 int i915_gem_dumb_create(struct drm_file *file_priv,
 			 struct drm_device *dev,
 			 struct drm_mode_create_dumb *args);
-- 
2.25.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 3/3] drm/i915/gem: Limit struct_mutex to eb_reserve

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> We only need to serialise the multiple pinning during the eb_reserve
> phase. Ideally this would be using the vm->mutex as an outer lock, or
> using a composite global mutex (ww_mutex), but at the moment we are
> using struct_mutex for the group.
>
> Fixes: 003d8b9143a6 ("drm/i915/gem: Only call eb_lookup_vma once during execbuf ioctl")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>

from other thread,
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 51 ++++++++-----------
>  drivers/gpu/drm/i915/i915_drv.h               |  6 ---
>  2 files changed, 20 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 7bb27f382af7..faa5b5c99a9a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -610,7 +610,7 @@ static int eb_reserve(struct i915_execbuffer *eb)
>  	struct list_head last;
>  	struct eb_vma *ev;
>  	unsigned int i, pass;
> -	int err;
> +	int err = 0;
>  
>  	/*
>  	 * Attempt to pin all of the buffers into the GTT.
> @@ -626,8 +626,10 @@ static int eb_reserve(struct i915_execbuffer *eb)
>  	 * room for the earlier objects *unless* we need to defragment.
>  	 */
>  
> +	if (mutex_lock_interruptible(&eb->i915->drm.struct_mutex))
> +		return -EINTR;
> +
>  	pass = 0;
> -	err = 0;
>  	do {
>  		list_for_each_entry(ev, &eb->unbound, bind_link) {
>  			err = eb_reserve_vma(eb, ev, pin_flags);
> @@ -635,7 +637,7 @@ static int eb_reserve(struct i915_execbuffer *eb)
>  				break;
>  		}
>  		if (!(err == -ENOSPC || err == -EAGAIN))
> -			return err;
> +			break;
>  
>  		/* Resort *all* the objects into priority order */
>  		INIT_LIST_HEAD(&eb->unbound);
> @@ -666,7 +668,9 @@ static int eb_reserve(struct i915_execbuffer *eb)
>  		list_splice_tail(&last, &eb->unbound);
>  
>  		if (err == -EAGAIN) {
> +			mutex_unlock(&eb->i915->drm.struct_mutex);
>  			flush_workqueue(eb->i915->mm.userptr_wq);
> +			mutex_lock(&eb->i915->drm.struct_mutex);
>  			continue;
>  		}
>  
> @@ -680,15 +684,20 @@ static int eb_reserve(struct i915_execbuffer *eb)
>  			err = i915_gem_evict_vm(eb->context->vm);
>  			mutex_unlock(&eb->context->vm->mutex);
>  			if (err)
> -				return err;
> +				goto unlock;
>  			break;
>  
>  		default:
> -			return -ENOSPC;
> +			err = -ENOSPC;
> +			goto unlock;
>  		}
>  
>  		pin_flags = PIN_USER;
>  	} while (1);
> +
> +unlock:
> +	mutex_unlock(&eb->i915->drm.struct_mutex);
> +	return err;
>  }
>  
>  static unsigned int eb_batch_index(const struct i915_execbuffer *eb)
> @@ -1631,7 +1640,6 @@ static int eb_prefault_relocations(const struct i915_execbuffer *eb)
>  
>  static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
>  {
> -	struct drm_device *dev = &eb->i915->drm;
>  	bool have_copy = false;
>  	struct eb_vma *ev;
>  	int err = 0;
> @@ -1642,8 +1650,6 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
>  		goto out;
>  	}
>  
> -	mutex_unlock(&dev->struct_mutex);
> -
>  	/*
>  	 * We take 3 passes through the slowpatch.
>  	 *
> @@ -1666,21 +1672,8 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
>  		cond_resched();
>  		err = 0;
>  	}
> -	if (err) {
> -		mutex_lock(&dev->struct_mutex);
> -		goto out;
> -	}
> -
> -	/* A frequent cause for EAGAIN are currently unavailable client pages */
> -	flush_workqueue(eb->i915->mm.userptr_wq);
> -
> -	err = i915_mutex_lock_interruptible(dev);
> -	if (err) {
> -		mutex_lock(&dev->struct_mutex);
> +	if (err)
>  		goto out;
> -	}
> -
> -	GEM_BUG_ON(!eb->batch);
>  
>  	list_for_each_entry(ev, &eb->relocs, reloc_link) {
>  		if (!have_copy) {
> @@ -1738,9 +1731,11 @@ static int eb_relocate(struct i915_execbuffer *eb)
>  	if (err)
>  		return err;
>  
> -	err = eb_reserve(eb);
> -	if (err)
> -		return err;
> +	if (!list_empty(&eb->unbound)) {
> +		err = eb_reserve(eb);
> +		if (err)
> +			return err;
> +	}
>  
>  	/* The objects are in their final locations, apply the relocations. */
>  	if (eb->args->flags & __EXEC_HAS_RELOC) {
> @@ -2690,10 +2685,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>  	if (unlikely(err))
>  		goto err_context;
>  
> -	err = i915_mutex_lock_interruptible(dev);
> -	if (err)
> -		goto err_engine;
> -
>  	err = eb_relocate(&eb);
>  	if (err) {
>  		/*
> @@ -2837,8 +2828,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>  		eb_release_vmas(&eb);
>  	if (eb.trampoline)
>  		i915_vma_unpin(eb.trampoline);
> -	mutex_unlock(&dev->struct_mutex);
> -err_engine:
>  	eb_unpin_engine(&eb);
>  err_context:
>  	i915_gem_context_put(eb.gem_context);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 123d0fadfafc..c081f4ec87df 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1734,12 +1734,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
>  
>  void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
>  
> -static inline int __must_check
> -i915_mutex_lock_interruptible(struct drm_device *dev)
> -{
> -	return mutex_lock_interruptible(&dev->struct_mutex);
> -}
> -
>  int i915_gem_dumb_create(struct drm_file *file_priv,
>  			 struct drm_device *dev,
>  			 struct drm_mode_create_dumb *args);
> -- 
> 2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Assert requests within a context are submitted in order

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Check the flow of requests into the hardware to verify that are
> submitted in order along their timeline.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++++
>  drivers/gpu/drm/i915/i915_request.c | 4 ++++
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 16a023ac4604..13941d1c0a4a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1622,6 +1622,7 @@ static bool can_merge_rq(const struct i915_request *prev,
>  	if (!can_merge_ctx(prev->context, next->context))
>  		return false;
>  
> +	GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno, next->fence.seqno));
>  	return true;
>  }
>  
> @@ -2142,6 +2143,9 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
>  				GEM_BUG_ON(last &&
>  					   !can_merge_ctx(last->context,
>  							  rq->context));
> +				GEM_BUG_ON(last &&
> +					   i915_seqno_passed(last->fence.seqno,
> +							     rq->fence.seqno));
>  
>  				submit = true;
>  				last = rq;
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index ca5361eb1f0b..35147df79655 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -737,6 +737,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
>  	RCU_INIT_POINTER(rq->timeline, tl);
>  	RCU_INIT_POINTER(rq->hwsp_cacheline, tl->hwsp_cacheline);
>  	rq->hwsp_seqno = tl->hwsp_seqno;
> +	GEM_BUG_ON(i915_request_completed(rq));
>  
>  	rq->rcustate = get_state_synchronize_rcu(); /* acts as smp_mb() */
>  
> @@ -1284,6 +1285,9 @@ __i915_request_add_to_timeline(struct i915_request *rq)
>  	prev = to_request(__i915_active_fence_set(&timeline->last_request,
>  						  &rq->fence));
>  	if (prev && !i915_request_completed(prev)) {
> +		GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno,
> +					     rq->fence.seqno));
> +
>  		if (is_power_of_2(prev->engine->mask | rq->engine->mask))
>  			i915_sw_fence_await_sw_fence(&rq->submit,
>  						     &prev->submit,
> -- 
> 2.25.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/3] drm/i915: Assert requests within a context are submitted in order

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Assert requests within a context are submitted in order
URL   : https://patchwork.freedesktop.org/series/74369/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs'

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Assert requests within a context are submitted in order

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Assert requests within a context are submitted in order
URL   : https://patchwork.freedesktop.org/series/74369/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8076 -> Patchwork_16856
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16856 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16856, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16856:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - fi-cfl-8109u:       NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-cfl-8109u/igt@runner@aborted.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@i915_selftest@live@ring_submission}:
    - fi-byt-j1900:       [PASS][2] -> [DMESG-FAIL][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-byt-j1900/igt@i915_selftest@live@ring_submission.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-byt-j1900/igt@i915_selftest@live@ring_submission.html

  * igt@runner@aborted:
    - {fi-kbl-7560u}:     NOTRUN -> [FAIL][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-kbl-7560u/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_16856 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@flink-lifetime:
    - fi-tgl-y:           [PASS][5] -> [DMESG-WARN][6] ([CI#94] / [i915#402]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html

  * igt@i915_selftest@live@gem_contexts:
    - fi-cfl-8109u:       [PASS][7] -> [INCOMPLETE][8] ([i915#424])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-cfl-8109u/igt@i915_selftest@live@gem_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-cfl-8109u/igt@i915_selftest@live@gem_contexts.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-tgl-y:           [FAIL][9] ([CI#94]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@i915_selftest@live@gt_mocs:
    - fi-snb-2520m:       [DMESG-WARN][11] -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-snb-2520m/igt@i915_selftest@live@gt_mocs.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-snb-2520m/igt@i915_selftest@live@gt_mocs.html

  * {igt@i915_selftest@live@ring_submission}:
    - fi-hsw-peppy:       [DMESG-FAIL][13] -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
    - fi-snb-2520m:       [INCOMPLETE][15] -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-snb-2520m/igt@i915_selftest@live@ring_submission.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-snb-2520m/igt@i915_selftest@live@ring_submission.html

  * igt@kms_addfb_basic@bad-pitch-63:
    - fi-tgl-y:           [DMESG-WARN][17] ([CI#94] / [i915#402]) -> [PASS][18] +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8076/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-63.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-63.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#504]: https://gitlab.freedesktop.org/drm/intel/issues/504


Participating hosts (45 -> 45)
------------------------------

  Additional (4): fi-hsw-4770r fi-skl-lmem fi-blb-e6850 fi-kbl-r 
  Missing    (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_8076 -> Patchwork_16856

  CI-20190529: 20190529
  CI_DRM_8076: bb93ee259288a580da4625a7a747bcd9bbedaf96 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5495: 22df72de8affcec22d9f354bb6148d77f60cc580 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16856: db242158bc8bf8624958f48705e4648475176312 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

db242158bc8b drm/i915/gem: Limit struct_mutex to eb_reserve
90bd5f316117 drm/i915: Always propagate the invocation to i915_schedule
2551a4bb7870 drm/i915: Assert requests within a context are submitted in order

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16856/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx