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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Deak, Imre" <imre.deak@intel.com>
Cc: "Swaminathan, Nivedita" <nivedita.swaminathan@intel.com>
Subject: Re: [Intel-gfx] [PATCH] i915/tgl: Fix TC-cold block/unblock sequence
Date: Thu, 6 Aug 2020 17:17:14 +0000	[thread overview]
Message-ID: <87e1dd98f92d054674d1f50b07e6ff0e4fb43092.camel@intel.com> (raw)
In-Reply-To: <20200805150056.24248-1-imre.deak@intel.com>

On Wed, 2020-08-05 at 18:00 +0300, Imre Deak wrote:
> The command register is the low PCODE MBOX low register not the high
> one as described by the spec. This left the system with the TC-cold
> power state being blocked all the time. Fix things by using the correct
> register.
> 
> Also to make sure we retry a request for at least 600usec, when the
> PCODE MBOX command itself succeeded, but the TC-cold block command
> failed, sleep for 1msec unconditionally after any fail.
> 
> The change was tested with JTAG register read of the HW/FW's actual
> TC-cold state, which reported the expected states after this change.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Tested-by: Nivedita Swaminathan <
> nivedita.swaminathan@intel.com
> >
> Cc: José Roberto de Souza <
> jose.souza@intel.com
> >
> Signed-off-by: Imre Deak <
> imre.deak@intel.com
> >
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 10 +++++-----
>  drivers/gpu/drm/i915/i915_reg.h                    |  4 ++--
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 9f0241a53a45..8f0b712ed7a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -3927,12 +3927,13 @@ tgl_tc_cold_request(struct drm_i915_private *i915, bool block)
>  	int ret;
>  
>  	while (1) {
> -		u32 low_val = 0, high_val;
> +		u32 low_val;
> +		u32 high_val = 0;
>  
>  		if (block)
> -			high_val = TGL_PCODE_EXIT_TCCOLD_DATA_H_BLOCK_REQ;
> +			low_val = TGL_PCODE_EXIT_TCCOLD_DATA_L_BLOCK_REQ;
>  		else
> -			high_val = TGL_PCODE_EXIT_TCCOLD_DATA_H_UNBLOCK_REQ;
> +			low_val = TGL_PCODE_EXIT_TCCOLD_DATA_L_UNBLOCK_REQ;
>  
>  		/*
>  		 * Spec states that we should timeout the request after 200us
> @@ -3951,8 +3952,7 @@ tgl_tc_cold_request(struct drm_i915_private *i915, bool block)
>  		if (++tries == 3)
>  			break;
>  
> -		if (ret == -EAGAIN)
> -			msleep(1);
> +		msleep(1);
>  	}
>  
>  	if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2b403df03404..e85c6fc1f3cb 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9226,8 +9226,8 @@ enum {
>  #define   DISPLAY_IPS_CONTROL			0x19
>  #define   TGL_PCODE_TCCOLD			0x26
>  #define     TGL_PCODE_EXIT_TCCOLD_DATA_L_EXIT_FAILED	REG_BIT(0)
> -#define     TGL_PCODE_EXIT_TCCOLD_DATA_H_BLOCK_REQ	0
> -#define     TGL_PCODE_EXIT_TCCOLD_DATA_H_UNBLOCK_REQ	REG_BIT(0)
> +#define     TGL_PCODE_EXIT_TCCOLD_DATA_L_BLOCK_REQ	0
> +#define     TGL_PCODE_EXIT_TCCOLD_DATA_L_UNBLOCK_REQ	REG_BIT(0)
>              /* See also IPS_CTL */
>  #define     IPS_PCODE_CONTROL			(1 << 30)
>  #define   HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL	0x1A
> 
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      parent reply	other threads:[~2020-08-06 17:17 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-05 15:00 [Intel-gfx] [PATCH] i915/tgl: Fix TC-cold block/unblock sequence Imre Deak
2020-08-05 15:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-08-05 15:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-08-05 15:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-08-05 21:06 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-08-06 18:20   ` Imre Deak
2020-08-06 17:17 ` Souza, Jose [this message]

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