[PATCH] drm/i915/mst: add beginnings of DP MST documentation

[PATCH] drm/i915/mst: add beginnings of DP MST documentation

[Jani Nikula]

Add a little bit of documentation around DP MST. This is nowhere near
complete nor does it have enough detail. But it's better than nothing,
and hopefully gives people a basic grasp of what's going on.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 32 +++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index c59c2c14679c..a9ce8b3a7ff5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -53,6 +53,38 @@
 #include "intel_vdsc.h"
 #include "skl_scaler.h"
 
+/*
+ * DP MST (DisplayPort Multi-Stream Transport)
+ *
+ * MST support on the source depends on the platform and port. DP initialization
+ * sets up MST for each MST capable encoder. This will become the primary
+ * encoder for the port.
+ *
+ * MST initialization of each primary encoder creates MST stream encoders, one
+ * per pipe, and initializes the MST topology manager. The MST stream encoders
+ * are sometimes called "fake encoders", because they're virtual, not
+ * physical. Thus there are (number of MST capable ports) x (number of pipes)
+ * MST stream encoders in total.
+ *
+ * Decision to use MST for a sink happens at detect on the connector attached to
+ * the primary encoder, and this will not change while the sink is connected. We
+ * always use MST when possible, including for SST sinks with sideband messaging
+ * support.
+ *
+ * The connectors for the MST streams are added and removed dynamically by the
+ * topology manager. Their connection status is also determined by the topology
+ * manager.
+ *
+ * On hardware, each transcoder may be associated with a single DDI
+ * port. Multiple transcoders may be associated with the same DDI port only if
+ * the port is in MST mode.
+ *
+ * On TGL+, all the transcoders streaming on the same DDI port will indicate a
+ * primary transcoder; the TGL_DP_TP_CTL and TGL_DP_TP_STATUS registers are
+ * relevant only on the primary transcoder. Prior to that, they are port
+ * registers.
+ */
+
 /* From fake MST stream encoder to primary encoder */
 static struct intel_encoder *to_primary_encoder(struct intel_encoder *encoder)
 {
-- 
2.39.5

✗ i915.CI.BAT: failure for drm/i915/mst: add beginnings of DP MST documentation

[Patchwork]

== Series Details ==

Series: drm/i915/mst: add beginnings of DP MST documentation
URL   : https://patchwork.freedesktop.org/series/141756/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15738 -> Patchwork_141756v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_141756v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_141756v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/index.html

Participating hosts (45 -> 44)
------------------------------

  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_141756v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_lmem_swapping@basic:
    - bat-dg2-8:          [PASS][1] -> [ABORT][2] +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/bat-dg2-8/igt@gem_lmem_swapping@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/bat-dg2-8/igt@gem_lmem_swapping@basic.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_ctx_create@basic-files:
    - {bat-mtlp-9}:       [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/bat-mtlp-9/igt@gem_ctx_create@basic-files.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/bat-mtlp-9/igt@gem_ctx_create@basic-files.html

  
Known issues
------------

  Here are the changes found in Patchwork_141756v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_tiled_blits@basic:
    - fi-pnv-d510:        [PASS][5] -> [SKIP][6] +2 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/fi-pnv-d510/igt@gem_tiled_blits@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/fi-pnv-d510/igt@gem_tiled_blits@basic.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [PASS][7] -> [ABORT][8] ([i915#12061]) +1 other test abort
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/bat-mtlp-8/igt@i915_selftest@live.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/bat-mtlp-8/igt@i915_selftest@live.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [ABORT][9] ([i915#12061]) -> [PASS][10] +1 other test pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
    - bat-mtlp-6:         [ABORT][11] ([i915#12061]) -> [PASS][12] +1 other test pass
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/bat-mtlp-6/igt@i915_selftest@live@workarounds.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         [SKIP][13] ([i915#9197]) -> [PASS][14] +2 other tests pass
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15738/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12695]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12695
  [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197


Build changes
-------------

  * Linux: CI_DRM_15738 -> Patchwork_141756v1

  CI-20190529: 20190529
  CI_DRM_15738: b21f1413ea1860e80fd278112e820e6dadfc9df9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8124: 8124
  Patchwork_141756v1: b21f1413ea1860e80fd278112e820e6dadfc9df9 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v1/index.html

Re: [PATCH] drm/i915/mst: add beginnings of DP MST documentation

[Imre Deak]

On Mon, Nov 25, 2024 at 05:19:33PM +0200, Jani Nikula wrote:
> Add a little bit of documentation around DP MST. This is nowhere near
> complete nor does it have enough detail. But it's better than nothing,
> and hopefully gives people a basic grasp of what's going on.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 32 +++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index c59c2c14679c..a9ce8b3a7ff5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -53,6 +53,38 @@
>  #include "intel_vdsc.h"
>  #include "skl_scaler.h"
>  
> +/*
> + * DP MST (DisplayPort Multi-Stream Transport)
> + *
> + * MST support on the source depends on the platform and port. DP initialization
> + * sets up MST for each MST capable encoder. This will become the primary
> + * encoder for the port.
> + *
> + * MST initialization of each primary encoder creates MST stream encoders, one
> + * per pipe, and initializes the MST topology manager. The MST stream encoders
> + * are sometimes called "fake encoders", because they're virtual, not
> + * physical. Thus there are (number of MST capable ports) x (number of pipes)
> + * MST stream encoders in total.
> + *
> + * Decision to use MST for a sink happens at detect on the connector attached to
> + * the primary encoder, and this will not change while the sink is connected. We
> + * always use MST when possible, including for SST sinks with sideband messaging
> + * support.
> + *
> + * The connectors for the MST streams are added and removed dynamically by the
> + * topology manager. Their connection status is also determined by the topology
> + * manager.
> + *
> + * On hardware, each transcoder may be associated with a single DDI
> + * port. Multiple transcoders may be associated with the same DDI port only if
> + * the port is in MST mode.
> + *
> + * On TGL+, all the transcoders streaming on the same DDI port will indicate a
> + * primary transcoder; the TGL_DP_TP_CTL and TGL_DP_TP_STATUS registers are
> + * relevant only on the primary transcoder. Prior to that, they are port
> + * registers.
> + */
> +
>  /* From fake MST stream encoder to primary encoder */
>  static struct intel_encoder *to_primary_encoder(struct intel_encoder *encoder)
>  {
> -- 
> 2.39.5
> 

✗ i915.CI.BAT: failure for drm/i915/mst: add beginnings of DP MST documentation (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/mst: add beginnings of DP MST documentation (rev2)
URL   : https://patchwork.freedesktop.org/series/141756/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15796 -> Patchwork_141756v2
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_141756v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_141756v2, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/index.html

Participating hosts (44 -> 43)
------------------------------

  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_141756v2:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@evict:
    - bat-mtlp-8:         NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-mtlp-8/igt@i915_selftest@live@evict.html

  * igt@i915_selftest@live@gt_tlb:
    - bat-twl-1:          [PASS][2] -> [ABORT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-twl-1/igt@i915_selftest@live@gt_tlb.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-twl-1/igt@i915_selftest@live@gt_tlb.html

  * igt@kms_addfb_basic@invalid-set-prop:
    - bat-arls-5:         [PASS][4] -> [DMESG-WARN][5] +1 other test dmesg-warn
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-arls-5/igt@kms_addfb_basic@invalid-set-prop.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-arls-5/igt@kms_addfb_basic@invalid-set-prop.html

  
Known issues
------------

  Here are the changes found in Patchwork_141756v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@load:
    - bat-adlp-6:         [PASS][6] -> [DMESG-WARN][7] ([i915#12253])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-adlp-6/igt@i915_module_load@load.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-adlp-6/igt@i915_module_load@load.html

  * igt@i915_module_load@reload:
    - bat-twl-1:          [PASS][8] -> [DMESG-WARN][9] ([i915#1982])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-twl-1/igt@i915_module_load@reload.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-twl-1/igt@i915_module_load@reload.html
    - bat-arls-5:         [PASS][10] -> [DMESG-WARN][11] ([i915#4423]) +1 other test dmesg-warn
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-arls-5/igt@i915_module_load@reload.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-arls-5/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - bat-dg2-11:         [PASS][12] -> [FAIL][13] ([i915#12903])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-dg2-11/igt@i915_pm_rpm@module-reload.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-dg2-11/igt@i915_pm_rpm@module-reload.html
    - bat-rpls-4:         [PASS][14] -> [FAIL][15] ([i915#12903])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-rpls-4/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live:
    - bat-twl-1:          [PASS][16] -> [ABORT][17] ([i915#12919])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-twl-1/igt@i915_selftest@live.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-twl-1/igt@i915_selftest@live.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         [PASS][18] -> [SKIP][19] ([i915#9197]) +3 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - fi-pnv-d510:        NOTRUN -> [SKIP][20] +31 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/fi-pnv-d510/igt@kms_psr@psr-primary-mmap-gtt.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload:
    - bat-jsl-3:          [DMESG-WARN][21] ([i915#1982]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-jsl-3/igt@i915_module_load@reload.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-jsl-3/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - bat-dg1-7:          [FAIL][23] ([i915#12903]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-dg1-7/igt@i915_pm_rpm@module-reload.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-dg1-7/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live:
    - bat-adlp-6:         [ABORT][25] ([i915#9413]) -> [PASS][26] +1 other test pass
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-adlp-6/igt@i915_selftest@live.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-adlp-6/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - {bat-arls-6}:       [ABORT][27] ([i915#12061]) -> [PASS][28] +1 other test pass
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-arls-6/igt@i915_selftest@live@workarounds.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-arls-6/igt@i915_selftest@live@workarounds.html
    - bat-mtlp-8:         [ABORT][29] ([i915#12061]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-mtlp-8/igt@i915_selftest@live@workarounds.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-mtlp-8/igt@i915_selftest@live@workarounds.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - bat-dg2-13:         [DMESG-WARN][31] ([i915#12253]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_pipe_crc_basic@hang-read-crc:
    - fi-cfl-8109u:       [DMESG-WARN][33] ([i915#12914]) -> [PASS][34] +1 other test pass
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/fi-cfl-8109u/igt@kms_pipe_crc_basic@hang-read-crc.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/fi-cfl-8109u/igt@kms_pipe_crc_basic@hang-read-crc.html

  
#### Warnings ####

  * igt@gem_exec_gttfill@basic:
    - fi-pnv-d510:        [ABORT][35] ([i915#13169]) -> [SKIP][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/fi-pnv-d510/igt@gem_exec_gttfill@basic.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [ABORT][37] ([i915#12061]) -> [INCOMPLETE][38] ([i915#13133])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15796/bat-mtlp-8/igt@i915_selftest@live.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/bat-mtlp-8/igt@i915_selftest@live.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12253]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12253
  [i915#12903]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12903
  [i915#12914]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12914
  [i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919
  [i915#13133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13133
  [i915#13169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13169
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
  [i915#9413]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413


Build changes
-------------

  * Linux: CI_DRM_15796 -> Patchwork_141756v2

  CI-20190529: 20190529
  CI_DRM_15796: 1b7746f770882ce40dacae683e8e65657c40c2b7 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8138: 8138
  Patchwork_141756v2: 1b7746f770882ce40dacae683e8e65657c40c2b7 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141756v2/index.html

Re: [PATCH] drm/i915/mst: add beginnings of DP MST documentation

[Jani Nikula]

On Wed, 04 Dec 2024, Imre Deak <imre.deak@intel.com> wrote:
> On Mon, Nov 25, 2024 at 05:19:33PM +0200, Jani Nikula wrote:
>> Add a little bit of documentation around DP MST. This is nowhere near
>> complete nor does it have enough detail. But it's better than nothing,
>> and hopefully gives people a basic grasp of what's going on.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Imre Deak <imre.deak@intel.com>

Thanks, pushed to drm-intel-next. This being a pure comment change, I
exceptionally chose to ignore the CI results.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 32 +++++++++++++++++++++
>>  1 file changed, 32 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> index c59c2c14679c..a9ce8b3a7ff5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> @@ -53,6 +53,38 @@
>>  #include "intel_vdsc.h"
>>  #include "skl_scaler.h"
>>  
>> +/*
>> + * DP MST (DisplayPort Multi-Stream Transport)
>> + *
>> + * MST support on the source depends on the platform and port. DP initialization
>> + * sets up MST for each MST capable encoder. This will become the primary
>> + * encoder for the port.
>> + *
>> + * MST initialization of each primary encoder creates MST stream encoders, one
>> + * per pipe, and initializes the MST topology manager. The MST stream encoders
>> + * are sometimes called "fake encoders", because they're virtual, not
>> + * physical. Thus there are (number of MST capable ports) x (number of pipes)
>> + * MST stream encoders in total.
>> + *
>> + * Decision to use MST for a sink happens at detect on the connector attached to
>> + * the primary encoder, and this will not change while the sink is connected. We
>> + * always use MST when possible, including for SST sinks with sideband messaging
>> + * support.
>> + *
>> + * The connectors for the MST streams are added and removed dynamically by the
>> + * topology manager. Their connection status is also determined by the topology
>> + * manager.
>> + *
>> + * On hardware, each transcoder may be associated with a single DDI
>> + * port. Multiple transcoders may be associated with the same DDI port only if
>> + * the port is in MST mode.
>> + *
>> + * On TGL+, all the transcoders streaming on the same DDI port will indicate a
>> + * primary transcoder; the TGL_DP_TP_CTL and TGL_DP_TP_STATUS registers are
>> + * relevant only on the primary transcoder. Prior to that, they are port
>> + * registers.
>> + */
>> +
>>  /* From fake MST stream encoder to primary encoder */
>>  static struct intel_encoder *to_primary_encoder(struct intel_encoder *encoder)
>>  {
>> -- 
>> 2.39.5
>> 

-- 
Jani Nikula, Intel